MCNIX MX27L256TI-25

MX27L256
256K-BIT [32Kx8] LOW VOLTAGE OPERATION
CMOS EPROM
FEATURES
•
•
•
•
•
•
•
•
•
32K x 8 organization
Wide Voltage range, 2.7V to 3.6V DC
+12.5V programming voltage
Fast access time: 120/150/200/250 ns
Totally static operation
GENERAL DESCRIPTION
Completely TTL compatible
Operating current: 10mA @ 3.6V, 5MHz
Standby current: 10uA
Package type:
- 28 pin plastic DIP
- 32 pin PLCC
- 28 pin 8 x 13.4mm TSOP(I)
The MX27L256 is a 256K-bit, ultraviolet Erasable Programmable Read Only Memory. It is organized as 32K
by 8 bits, operates from a single + 3volt supply, has a
static standby mode, and features fast single address
location programming. All programming signals are TTL
levels, requiring a single pulse. For programming from
outside the system, existing EPROM programmers
may be used. The MX27L256 supports intelligent fast
programming algorithm which can result in programming time of less than ten seconds.
PIN CONFIGURATIONS
BLOCK DIAGRAM
32
30
29
A9
A4
A11
A2
25
MX27L256
OE
A1
A10
A0
CE
21
20
Q4
Q3
NC
GND
17
22
23
24
25
26
27
28
1
2
3
4
5
6
7
MX27L256
Q0~Q7
INPUTS
.
.
.
.
.
.
Y-DECODER
X-DECODER
.
.
Y-SELECT
.
.
.
.
256K BIT
.
.
CELL
MAXTRIX
Q6
VCC
GND
VPP
Q5
13
14
PIN DESCRIPTION
8 x 13.4mm 28 -TSOP(I)
OE
A11
A9
A8
A13
A14
VCC
VPP
A12
A7
A6
A5
A4
A3
A0~A14
ADDRESS
Q7
NC
Q0
.
.
NC
9
OUTPUT
BUFFERS
A8
A5
A3
CONTROL
LOGIC
CE
OE
A13
1
A14
VCC
4
NC
5
VPP
A7
A6
Q2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Q1
MX27L256
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
A14
A13
A8
A9
A11
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
A12
PLCC
PDIP
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
This EPROM is packaged in industry standard 28 pin
dual-in-line packages, 32 lead PLCC, and 28 lead
TSOP(I) packages.
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
P/N: PM0248
SYMBOL
PIN NAME
A0~A14
Address Input
Q0~Q7
Data Input/Output
CE
Chip Enable Input
OE
Output Enable Input
VPP
Program Supply Voltage
NC
No Internal Connection
VCC
Power Supply Pin
GND
Ground Pin
REV. 3.3, SEP. 19, 2001
1
MX27L256
FUNCTIONAL DESCRIPTION
AUTO IDENTIFY MODE
THE PROGRAMMING OF THE MX27L256
The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of
automatically matching the device to be programmed
with its corresponding programming algorithm. This
mode is functional in the 25°C ± 5°C ambient
temperature range that is required when programming
the MX27L256.
When the MX27L256 is delivered, or it is erased, the
chip has all 256K bits in the "ONE" or HIGH state.
"ZEROs" are loaded into the MX27L256 through the
procedure of programming.
For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.
VCC must be applied simultaneously or before VPP, and
removed simultaneously or after VPP. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across VPP and ground to suppress spurious
voltage transients which may damage the device.
To activate this mode, the programming equipment
must force 12.0 ± 0.5 (VH) on address line A9 of the
device. Two identifier bytes may then be sequenced
from the device outputs by toggling address line A0 from
VIL to VIH. All other address lines must be held at VIL
during auto identify mode.
FAST PROGRAMMING
Byte 0 ( A0 = VIL) represents the manufacturer code,
and byte 1 (A0 = VIH), the device identifier code. For the
MX27L256, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (Q7)
defined as the parity bit.
The device is set up in the fast programming mode when
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and OE = VIH (Algorithm is shown in
Figure 1). The programming is achieved by applying a
single TTL low level 100us pulse to the CE input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address of the device. When the
programming mode is completed, the data in all address
is verified at VCC = VPP = 5V ± 10%.
READ MODE
The MX27L256 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable
(OE) is the output control and should be used to gate
data to the output pins, independent of device selection.
Assuming that addresses are stable, address access
time (tACC) is equal to the delay from CE to output (tCE).
Data is available at the outputs tOE after the falling edge
of OE, assuming that CE has been LOW and addresses
have been stable for at least tACC - tOE.
PROGRAM INHIBIT MODE
Programming of multiple MX27L256s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27L256 may be common. A
TTL low-level program pulse applied to an MX27L256
CE input with VPP = 12.5 ± 0.5 V and OE HIGH will
program that MX27L256. A high-level CE input inhibits
the other MX27L256s from being programmed.
STANDBY MODE
The MX27L256 has a CMOS standby mode which
reduces the maximum Vcc current to 10 uA. It is placed
in CMOS standby when CE is at VCC ± 0.3 V. The
MX27L 256 also has a TTL-standby mode which
reduces the maximum VCC current to 0.25 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.
PROGRAM VERIFY MODE
Verification should be performed on the programmed
bits to determine that they were correctly programmed.
The verification should be performed with CE and OE
at VIL, and VPP at its programming voltage.
P/N:PM0248
2
REV.3.3, SEP. 19, 2001
MX27L256
TWO-LINE OUTPUT CONTROL FUNCTION
SYSTEM CONSIDERATIONS
To accommodate multiple memory connections, a twoline control function is provided to allow for:
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
output capacitance loading of the device. At a minimum,
a 0.1 uF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
used between Vcc and GND for each eight devices. The
location of the capacitor should be close to where the
power supply is connected to the array.
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
MODE SELECT TABLE
PINS
MODE
CE
OE
A0
A9
VPP
OUTPUTS
Read
VIL
VIL
X
X
VCC
DOUT
Output Disable
VIL
VIH
X
X
VCC
High Z
Standby (TTL)
VIH
X
X
X
VCC
High Z
Standby (CMOS)
VCC±0.3V
X
X
X
VCC
High Z
Program
VIL
VIH
X
X
VPP
DIN
Program Verify
VIH
VIL
X
X
VPP
DOUT
Program Inhibit
VIH
VIH
X
X
VPP
High Z
Manufacturer Code(3)
VIL
VIL
VIL
VH
VCC
C2H
Device Code(3)
VIL
VIL
VIH
VH
VCC
10H
NOTES: 1. VH = 12.0 V ± 0.5 V
2. X = Either VIH or VIL
3. A1 - A8 = A10 - A14 = VIL(For auto select)
P/N:PM0248
4. See DC Programming characteristics for VPP voltage during
programming.
3
REV.3.3, SEP. 19, 2001
MX27L256
FIGURE 1. FAST PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V
VPP = 12.75V
X=0
PROGRAM ONE 100us PULSE
INCREMENT X
INTERACTIVE
SECTION
YES
X = 25?
NO
FAIL
VERIFY BYTE
?
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
YES
VCC = VPP = 5.25V
VERIFY SECTION
VERIFY ALL BYTES
?
FAIL
DEVICE FAILED
PASS
DEVICE PASSED
P/N:PM0248
4
REV.3.3, SEP. 19, 2001
MX27L256
SWITCHING TEST CIRCUITS
DEVICE
UNDER
TEST
1.8K ohm
+5V
DIODES = IN3064
OR EQUIVALENT
CL
6.2K ohm
CL = 100 pF including jig capacitance
SWITCHING TEST WAVEFORMS
2.0V
2.0V
TEST POINTS
AC driving levels
0.8V
0.8V
OUTPUT
INPUT
AC TESTING: AC driving levels are 2.4V/0.4V for both commercial grade and industrial grade.
Input pulse rise and fall times are < 20ns.
P/N:PM0248
5
REV.3.3, SEP. 19, 2001
MX27L256
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.
ABSOLUTE MAXIMUM RATINGS
RATING
VALUE
Ambient Operating Temperature
-40oC to 85oC
Storage Temperature
-65oC to 125oC
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to VCC + 0.5V
VCC to Ground Potential
-0.5V to 7.0V
A9 & Vpp
-0.5V to 13.5V
NOTICE:
Specifications contained within the following tables are subject to
change.
DC/AC Operating Conditions for Read Operation
MX27L256
Operating Temperature
Commercial
Industrial
Vcc Power Supply
-12
-15
-20
-25
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
2.7V to 3.6V
2.7V to 3.6V
2.7V to 3.6V
2.7V to 3.6V
DC CHARACTERISTICS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
VOH
Output High Voltage
VCC -0.3
V
IOH = -100uA, VCC =3.0V
VOL
Output Low Voltage
0.3
V
IOL = 2.1mA, VCC =3.0V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VIL
Input Low Voltage
-0.3
0.6
V
ILI
Input Leakage Current
-10
10
uA
VIN = 0 to 3.6V
ILO
Output Leakage Current
-10
10
uA
VOUT = 0 to 3.6V
ICC3
VCC Power-Down Current
10
uA
CE = VCC ± 0.3V
ICC2
VCC Standby Current
0.25
mA
CE = VIH
ICC1
VCC Active Current
10
mA
CE = VIL, f=5MHz, Iout = 0mA, VCC = 3.6V
IPP
VPP Supply Current Read
10
uA
CE = OE = VIL, VPP = VCC
CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only)
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
CIN
Input Capacitance
8
12
pF
VIN = 0V
COUT
Output Capacitance
8
12
pF
VOUT = 0V
VPP
VPP Capacitance
18
25
pF
VPP = 0V
P/N:PM0248
6
REV.3.3, SEP. 19, 2001
MX27L256
AC CHARACTERISTICS
27L256-12
27L256-15
27L256-20
27L256-25
MIN.
MIN.
MIN.
MIN.
SYMBOL
PARAMETER
tACC
Address to Output Delay
120
150
200
250
ns
CE = OE = VIL
tCE
Chip Enable to Output Delay
120
150
200
250
ns
OE = VIL
tOE
Output Enable to Output Delay
60
70
100
120
ns
CE = VIL
tDF
OE High to Output Float,
70
ns
0
MAX.
40
0
MAX.
50
0
MAX.
60
0
MAX. UNIT CONDITIONS
or CE High to Output Float
tOH
Output Hold from Address,
0
0
0
0
ns
CE or OE which ever occurred
first
DC PROGRAMMING CHARACTERISTICS TA = 25oC ± 5°C
SYMBOL
PARAMETER
MIN.
VOH
Output High Voltage
2.4
VOL
Output Low Voltage
VIH
Input High Voltage
VIL
MAX.
UNIT
CONDITIONS
V
IOH = -0.40mA
0.4
V
IOL = 2.1mA
2.0
VCC + 0.5
V
Input Low Voltage
-0.3
0.8
V
ILI
Input Leakage Current
-10
10
uA
VH
A9 Auto Select Voltage
11.5
12.5
V
ICC3
VCC Supply Current(Program & Verify)
40
mA
IPP2
VPP Supply Current(Program)
30
mA
VCC1
Fast Programming Supply Voltage
6.00
6.50
V
VPP1
Fast Programming Voltage
12.5
13.0
V
MAX.
UNIT
VIN = 0 to 3.6V
CE = VIL, OE = VIH
AC PROGRAMMING CHARACTERISTICS TA = 25°C ± 5°C
SYMBOL
PARAMETER
MIN.
tAS
Address Setup Time
2.0
us
tOES
OE Setup Time
2.0
us
tDS
Data Setup Time
2.0
us
tAH
Address Hold Time
0
us
tDH
Data Hold Time
2.0
us
tDFP
Output Enable to Output Float Delay
0
tVPS
VPP Setup Time
2.0
us
tVCS
VCC Setup Time
2.0
us
tOE
Data Valid from OE
tPW
PGM Program Pulse Width
P/N:PM0248
95
7
130
CONDITIONS
ns
150
ns
105
us
REV.3.3, SEP. 19, 2001
MX27L256
WVEFORMS
READ CYCLE
ADDRESS
INPUTS
DATA ADDRESS
tACC
CE
tCE
OE
tDF
DATA
OUT
VALID DATA
tOE
tOH
FAST PROGRAMMING ALGROITHM WAVEFORM
PROGRAM
PROGRAM VERIFY
VIH
Addresses
VIL
DATA
tAH
Hi-z
tAS
DATA OUT VALID
DATA IN STABLE
tDS
tDFP
tDH
VPP1
VPP
VCC
tVPS
VCC1
VCC
tVCS
VCC
VIH
CE
VIL
tOES
tPW
OE
P/N:PM0248
tOE
Max
VIH
VIL
8
REV.3.3, SEP. 19, 2001
MX27L256
ORDERING INFORMATION
PLASTIC PACKAGE
PART NO.
ACCESS TIME(ns)
OPERATING
STANDBY
OPERATING
CURRENT MAX.(mA)
CURRENT MAX.(uA)
TEMPERATURE
PACKAGE
MX27L256PC-12
120
10
10
0°C to 70°C
28 Pin DIP
MX27L256QC-12
120
10
10
0°C to 70°C
32 Pin PLCC
MX27L256TC-12
120
10
10
0°C to 70°C
28 Pin TSOP(I)
MX27L256PC-15
150
10
10
0°C to 70°C
28 Pin DIP
MX27L256QC-15
150
10
10
0°C to 70°C
32 Pin PLCC
MX27L256TC-15
150
10
10
0°C to 70°C
28 Pin TSOP(I)
MX27L256PC-20
200
10
10
0°C to 70°C
28 Pin DIP
MX27L256QC-20
200
10
10
0°C to 70°C
32 PinPLCC
MX27L256TC-20
200
10
10
0°C to 70°C
28 Pin TSOP(I)
MX27L256PC-25
250
10
10
0°C to 70°C
28 Pin DIP
MX27L256QC-25
250
10
10
0°C to 70°C
32 Pin PLCC
MX27L256TC-25
250
10
10
0°C to 70°C
28 Pin TSOP(I)
MX27L256PI-12
120
10
10
-40°C to 85°C
28 Pin DIP
MX27L256QI-12
120
10
10
-40°C to 85°C
32 Pin PLCC
MX27L256TI-12
120
10
10
-40°C to 85°C
28 Pin TSOP(I)
MX27L256PI-15
150
10
10
-40°C to 85°C
28 Pin DIP
MX27L256QI-15
150
10
10
-40°C to 85°C
32 Pin PLCC
MX27L256TI-15
150
10
10
-40°C to 85°C
28 Pin TSOP(I)
MX27L256PI-20
200
10
10
-40°C to 85°C
28 Pin DIP
MX27L256QI-20
200
10
10
-40°C to 85°C
32 PinPLCC
MX27L256TI-20
200
10
10
-40°C to 85°C
28 Pin TSOP(I)
MX27L256PI-25
250
10
10
-40°C to 85°C
28 Pin DIP
MX27L256QI-25
250
10
10
-40°C to 85°C
32 Pin PLCC
MX27L256TI-25
250
10
10
-40°C to 85°C
28 Pin TSOP(I)
P/N:PM0248
9
REV.3.3, SEP. 19, 2001
MX27L256
PACKAGE INFORMATION
28-PIN PLASTIC DIP (600 mil)
P/N:PM0248
10
REV.3.3, SEP. 19, 2001
MX27L256
32-PIN PLASTIC LEADED CHIP CARRIER (PLCC)
P/N:PM0248
11
REV.3.3, SEP. 19, 2001
MX27L256
8 x 13.4mm 28-PIN PLASTIC TSOP
P/N:PM0248
12
REV.3.3, SEP. 19, 2001
MX27L256
REVISION HISTORY
Revision No. Description
3.0
1) Eliminate Interactive Programming Mode.
2) Add 28-TSOP(I) package offering
3) AC driving levels are changed from 2.4V/0.3V to 2.4V/0.4V.
3.1
IPP1 100uA-->10uA
3.2
Cancel Ceramic DIP Package Type
3.3
Remove 28-pin SOP Package
Package Information format changed
P/N:PM0248
13
Page
P1,2,9,11
P1,9
P10~12
Date
6/17/1997
7/17/1997
FEB/29/2000
SEP/19/2001
REV.3.3, SEP. 19, 2001
MX27L256
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
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http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
14