FAIRCHILD 100ELT23M8

Preliminary
Revised September 2002
100ELT23
5V Dual Differential PECL to TTL Translator (Preliminary)
General Description
Features
The 100ELT23 is a dual differential PECL to TTL translator
operating from a single +5V supply.
■ Typical propagation delay of 3.5 ns
The dual gate design of the 100ELT23 makes it ideal for
applications which require the translation of a clock and a
data signal.
■ Flow through pinout
■ TTL output drive: IOH = 24 mA; IOL = −3 mA
■ Q Output will default to a LOW with the inputs left Open
■ Internal pull-down resistors on inputs
The 100 series is temperature compensated.
■ Fairchild MSOP-8 package is a drop-in replacement to
ON TSSOP-8
■ Typical ICCH of 23 mA, ICCL of 26 mA
■ Meets or exceeds JEDEC specification EIA/JESD78 IC
latch-up test
■ Moisture Sensitivity Level TBD
■ ESD Performance:
Human Body Model > TBD
Machine Model > TBD
Ordering Code:
Product
Order Number
Package
Code
Package Description
Number Top Mark
100ELT23M
M08A
KLT23
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
100ELT23M8
(Preliminary)
MA08D
KT23
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Top View
Pin Descriptions
Pin Name
Description
D0 , D0 , D1 , D1
PECL Differential Inputs
Q0, Q1
TTL Outputs
VCC
Positive Supply
GND
Ground
© 2002 Fairchild Semiconductor Corporation
DS500774
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100ELT23 5V Dual Differential PECL to TTL Translator (Preliminary)
September 2002
100ELT23
Preliminary
Absolute Maximum Ratings(Note 1)
PECL Supply Voltage (VCC)
0.0V to +7V
Recommended Operating
Conditions
Input Voltage (VI) VI ≤ VCC
0.0V to + 6V
Power Supply Operating
−65°C to + 150°C
Storage Temperature (TSTG)
Junction to Ambient (θJA) SOIC
0LFPM
500LFPM
TBD
Junction to Case (θJC)
std bd
TBD
Junction to Ambient (θJA) MSOP
Junction to Case (θJC)
MSOP
0.0V to VCC
−40°C to +85°C
Free Air Operating Temperature (TA)
Thermal Resistance
SOIC
VCC = 4.75V to 5.25V
ECL Input Voltage
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
TBD
0LFPM
TBD
500LFPM
TBD
std bd
TBD
PECL DC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 2)
Symbol
Parameter
−40°C
Min
25°C
Typ
Max
Min
85°C
Typ
Max
Min
Typ
Max
Units
VIH
Input HIGH Voltage (Single Ended)
3835
4120
3835
4120
3835
4120
mV
VIL
Input LOW Voltage (Single Ended)
3190
3525
3190
3525
3190
3525
mV
VIHCMR
Input HIGH Voltage Common
2.2
5.0
2.2
5.0
2.2
5.0
V
150
µA
Mode Range (Differential) (Note 3)
IIH
Input HIGH Current
IIL
Input LOW Current
150
0.5
150
0.5
µA
0.5
Note 2: VIH and VIL values vary 1 to 1 with VCC. VCC can vary ±0.25V.
Note 3: VIHCMR minimum varies 1 to 1 with GND. VIHCMR maximum varies 1 to 1 with VCC.
Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than
500LFPM maintained.
TTL DC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 4)
Symbol
Parameter
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
ICCH
Power Supply Current (Outputs set to HIGH)
ICCL
Power Supply Current (Outputs set to LOW)
IOS
Output Short Circuit Current (Note 5)
TA = −40°C to 85°C
Min
Typ
Max
26
−150
Condition
V
IOH = −3.0 mA
0.5
V
IOL = 24 mA
33
mA
36
mA
−60
mA
2.4
23
Units
Note 4: VCC can vary ±0.25V.
Note 5: For IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal chip heating and more
accurately reflect operational values. Otherwise, prolonged shorting of a HIGH output may raise the chip temperature well above normal and thereby cause
invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than
500LFPM maintained.
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2
Preliminary
Symbol
Parameter
−40°C
Min
Typ
25°C
Max
Min
85°C
Typ
Max
Min
Typ
Max
Units
Figure
Number
fMAX
Maximum Toggle Frequency
TBD
TBD
TBD
tJITTER
Cycle-to-Cycle Jitter
TBD
TBD
TBD
MHz
tPLH, tPHL
Propagation Delay to Output
2.0
5.5
2.0
5.5
2.0
5.5
ns
Figure 1
VPP
Input Swing
200
1000
200
1000
200
1000
mV
Figure 1
tr, tf
Output Rise Time (10% to 90%)
1.6
Output Fall Time (10% to 90%)
1.1
ns
Figure 2
ps
Note 6: VCC can vary ±0.25V.
Note 7: All Loading with 500Ω to GND, CL = 20 pF.
Switching Waveforms
Note: VM varies 1:1 with VEE
FIGURE 1. Differential PECL to TTL Output Propagation Delay
FIGURE 2. TTL Output Edge Rates
3
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100ELT23
AC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 6)(Note 7)
100ELT23
Preliminary
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M08A
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Preliminary
100ELT23 5V Dual Differential PECL to TTL Translator (Preliminary)
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Package Number MA08D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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