Revised November 1999 100201 Low Power 2-Input OR/NOR Gate/Inverter General Description Features The 100201 is a 2-input OR/NOR Gate and a single Inverter Gate in an eight pin SOIC package. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. The 100201 is ideal for single gate needs or for use as the feedback loop of a crystal oscillator circuit. ■ Small 8 lead 150 mil SOIC package ■ 2000V ESD protection ■ 300 MHz minimum F toggle ■ Temperature compensated ■ Voltage compensated operating range = −4.2V to −5.7V VEE Ordering Code: Order Number Package Number 100201SC M08A Package Description 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.50” Narrow Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Description Da, D1b, D2b Data Inputs Ob Data Outputs Oa, Ob Complementary Data Outputs © 1999 Fairchild Semiconductor Corporation DS011000 www.fairchildsemi.com 100201 Low Power 2-Input OR/NOR Gate/Inverter June 1992 100201 Absolute Maximum Ratings(Note 1) Storage Temperature (TSTG) −65°C to +150°C +150°C Maximum Junction Temperature (TJ) VEE Pin Potential to Ground Pin Recommended Operating Conditions Output Current (DC Output HIGH) −50 mA ESD (Note 2) ≥2000V −5.7V to −4.2V Supply Voltage (VEE) VEE to +0.5V Input Voltage (DC) 0°C to +85°C Operating Temperature (TC) −7.0V to +0.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V, VCC = GND, TC = 0°C to +85°C Min Typ Max Units VOH Symbol Output HIGH Voltage Parameter −1025 −955 −870 mV VOL Output LOW Voltage −1830 −1705 −1620 mV −1035 −1610 mV VOHC Output HIGH Voltage VOLC Output LOW Voltage mV Conditions Loading with VIN = VIH(Max) or VIL(Min) 50Ω to −2.0V Loading with VIN = VIH(Min) or VIL(Max) 50Ω to −2.0V VIH Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal for All Inputs VIL Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal for All Inputs IIL Input LOW Current 0.50 µA VIN = VIL(Min) IIH Input HIGH Current IEE Power Supply Current −29 −17 240 µA VIN = VIH(Max) −15 mA Inputs OPEN Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. SOIC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = GND Symbol Parameter tPLH Propagation Delay tPHL Data to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = 0°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 0.4 1.10 0.4 1.15 0.4 1.20 ns 0.40 1.20 0.40 1.20 0.40 1.20 ns Note 4: The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching. www.fairchildsemi.com 2 Conditions Figure 1Figure 2 (Note 4) Figure 1Figure 2 100201 Test Circuitry Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay and Transition Times 3 www.fairchildsemi.com 100201 Low Power 2-Input OR/NOR Gate/Inverter Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Package Number M08A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 4