MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M52760SP is IF signal-processing IC for VCRs and TVs. It enable the PLL detection system despite size as small as that of conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF limiter, FM detector and EQ AMP. FEATURES • • • • • Video detection output is 2VP-P. It has built-in EQ AMP. The package is a 20-pin shrink-DIP, suitable for space saving. The video detector uses PLL for full synchronous detection circuit. It produces excellent characteristics of DG, DP, 920kHz beat, and cross color. Dynamic AGC realizes high speed response with only single filter. 1 20 EQ F/B AFT OUT 2 19 APC FILTER RF AGC OUT 3 18 VIDEO OUT VIF IN 4 17 Vreg. OUT VIF IN 5 M52760SP • • • RF AGC DELAY 16 VCO COIL 15 VCO COIL GND 6 QIF DET IN 7 IF AGC FILTER 8 13 QIF OUT NFB 9 12 AFT SW/NPSW Video IF and sound IF signal processings are separated from each other. VCO output is used to obtain intercarrier. This PLL-SPLIT method provide good sound sensitivity and reduces buzz. As AFT output voltage uses the APC output voltage, VCO coil is not used. Audio FM demodulation uses PLL system, so it has wide frequency range with no external parts and no adjustment. QIF AMP has a fixed gain, and good characteristic for NICAM. 14 Vcc AUDIO OUT 10 11 LIMITER IN Outline 20P4B APPLICATION TV sets, VCR tuners RECOMMENDED OPERATING CONDITION In case of Vcc and Vreg. out short Supply voltage range....................................................4.75 to 5.25V Recommended supply voltage...................................................5.0V In case of Vreg. out open Supply voltage range......................................................8.5 to 12.5V BLOCK DIAGRAM EQ F/B 20 APC FILTER Vreg. OUT VCO COIL VIDEO OUT VCO COIL 19 18 17 15 16 QIF OUT LIMITER IN AFT SW/NPSW Vcc 13 14 12 11 Vcc REG VCO Inter LIM AMP Split AFT QIF DET EQ AMP VIDEO DET APC FM DET QIF AMP RF AGC IF AGC VIF AMP 1 2 3 4 RF AGC DELAY RF AGC OUT AFT OUT VIF IN 1 AF AMP 5 6 VIF IN GND 7 8 9 QIF DET IN NFB IF AGC FILTER 10 AUDIO OUT MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC ABSOLUTE MAXIMUM RATINGS (Ta=25°C, surge protection capacitance 200pF resistance 0 Ω, unless otherwise noted) Symbol VCC Vreg. OUT Parameter Supply voltage1 Ratings 13.2 Unit V Supply voltage Vreg. OUT 6 V Pd Topr Tstg Surge Power dissipation Operating temperature Storage temperature Surge voltage resistance 1524 -20 to +75 -40 to +150 ±200 mW °C °C V AMBIENT OPERATING CONDITION (Ta=25°C, unless otherwise noted) Supply voltage Supply voltage range Recommended supply voltage IN CASE OF VCC AND Vreg. OUT SHORT IN CASE OF Vreg. OUT OPEN 4.75 to 5.25V 5.0V 8.5 to 12.5V − ELECTRICAL CHARACTERISTICS (VCC=5V, Ta=25°C, unless otherwise noted) Symbol Parameter Test circuit Test point Input point Input SG Measurement condition switches set to position 1 unless V7 V8 V12 otherwise indicated Limits External power supply Unit Min. Typ. Max. 33 46 59 mA 33 46 59 mA 4.60 4.95 5.30 V 3.2 1.8 51 3.5 2.1 56 3.8 2.4 − V VP-P dB VIF section ICC1 Circuit current1 VCC=5V 1 A VIF IN SG1 − − 5 ICC2 Circuit current2 VCC=12V 1 A VIF IN SG1 − − 5 VCC2 Vreg voltage 1 TP17 − − − − 5 V18 Vo det Video S/N Video output DC voltage Video output voltage Video S/N 1 1 1 TP18A − TP18A VIF IN TP18A VIF IN − SG1 SG2 − − − 0 − − − − − BW Video band width 1 TP18A VIF IN SG3 − Vari able − 7.0 9.0 − MHz VIN MIN Input sensitivity Maximum allowable input AGC control range input IF AGC voltage 1 TP18A VIF IN SG4 − − − − 48 52 dBµ 1 TP18A VIF IN SG5 − − − 101 105 − dBµ VIN MAX GR V8 V8H V8L Maximum IF AGC voltage Minimum IF AGC voltage VCC=5V SW17=1, SW14=2 VCC=12.5V SW14=SW17=2 VCC=12.5V SW7=2 SW8=2 SW18=2 SW8=2 − − − − 1 TP8 VIF IN SG6 − − − − − − 50 2.9 57 3.2 − 3.5 dB V 1 TP8 − − − − − 4.0 4.4 − V 1 TP8 VIF IN SG7 − − − 2.2 2.4 2.6 V − − − V V3H Maximum RF AGC voltage 1 TP3 VIF IN SG6 − − − (VCC=9V) (VCC=12V) 4.2 8.0 11.0 4.7 8.9 11.9 V3L Minimum RF AGC voltage 1 TP3 VIF IN SG7 − − − (VCC=9V) (VCC=12V) − − − 0.1 0.2 0.2 0.5 0.7 0.7 V V3 RF AGC Operation voltage 1 TP3 VIF IN SG8 − − − 89 92 95 dBµ CL-U CL-L CL-T VCO ∆f µ Capture range U Capture range L Capture range T VCO SW ON Drift AFT sensitivity 1 1 1 1 1 TP18A VIF IN SG9 TP18A VIF IN SG9 − − − TP18A − − TP2 VIF IN SG10 − − − − − − − − − − − 0 − − 3.3 1.0 1.8 3.1 ±0 20 1.7 2.4 4.1 +20 30 − − − +40 60 MHz MHz MHz kHz mV/kHz 2 MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC ELECTRICAL CHARACTERISTICS (cont.) Symbol Test circuit Parameter Test point Input point Measurement condition switches set to position 1 unless V7 V8 V12 otherwise indicated Limits External power supply Min. 3.85 7.7 10.7 − − − 2.2 4.1 5.5 2.2 4.1 5.5 Typ. 4.15 8.1 11.1 0.7 0.7 0.7 2.5 4.5 6.0 2.5 4.5 6.0 35 40 V2H AFT maximum voltage 1 TP2 VIF IN SG10 − − 3.3 (VCC=9V) (VCC=12V) V2L AFT minimum voltage 1 TP2 VIF IN SG10 − − 3.3 (VCC=9V) (VCC=12V) AFT def1 AFT Defeat 1 1 TP2 VIF IN SG10 − − AFT def2 AFT Defeat 2 1 TP2 VIF IN SG10 − IM Inter modulation 1 TP18A VIF IN SG11 − 4.6 (VCC=9V) (VCC=12V) Vari − − able SW8=2 DG DP V13 SYNC RINV CINV SIF section Differential gain Differential phase 1 1 TP18A VIF IN SG12 TP18A VIF IN SG12 − − − − − − − − Sync. tip level 1 TP18A VIF IN − − − VIF input resister VIF input capacitance 2 2 TP4 TP4 QIF1 QIF output 1 1 TP13 QIF2 QIF output 2 1 TP13 SIF detection output AF output DC voltage AF output (4.5MHz) AF output (5.5MHz) output distortion THD AF1 AF (4.5MHz) output distortion THD AF2 AF (5.5MHz) Limiting sensitivity LIM1 (4.5MHz) Limiting sensitivity LIM2 (5.5MHz) AMR1 AM rejection (4.5MHz) AMR2 AM rejection (5.5MHz) AF S/N 1 AF S/N (4.5MHz) AF S/N 2 AF S/N (5.5MHz) RINS SIF input resistance CINS SIF input capacitance Control section QIF control Vos V1 VoAF1 VoAF2 CQIF VIF IN QIF IN VIF IN QIF IN VIF IN SIF IN SIF IN SIF IN Pin12 voltage (V) 0 to 0.6 0 to 2.3 1.0 to 2.3 2.7 to 4.0 2.7 to 5.0 4.4 to 5.0 AF PAL NTSC SG2 1 1 1 1 TP13 TP10 TP10 TP10 SG2 SG13 SG2 SG14 SG15 SG19 SG16 SG20 1 1.65 (VCC=9V) (VCC=12V) Unit Max. − − − 1.2 1.2 1.2 2.8 4.9 6.5 2.8 4.9 6.5 − V V V V dB 2 2 5 5 % deg 0.85 1.15 1.45 V − − 1.2 5 − − kΩ pF − − − 108 114 120 dBµ − − − 94 100 106 dBµ 0 − − − − − − − 5 5 5 0 94 1.6 320 255 100 2.2 560 450 106 2.8 800 645 dBµ V mVrms mVrms TP10 SIF IN SG16 − − 5 − 0.2 0.9 % 1 TP10 SIF IN SG20 − − 0 − 0.2 0.9 % 1 TP10 SIF IN SG17 − − 5 − 42 55 dBµ 1 TP10 SIF IN SG21 − − 0 − 42 55 dBµ 1 1 1 1 2 2 TP10 TP10 TP10 TP10 TP7 TP7 SIF IN SIF IN SIF IN SIF IN SG18 SG22 SG19 SG23 − − − − − − − − 5 0 5 0 55 55 55 55 − − 62 64 62 64 1.5 4 − − − − − − dB dB dB dB kΩ pF 1 TP7 − − Vari able − − − 0.7 1.0 V PIN12 VOLTAGE CONTROL 3 Input SG AFT NORMAL DEFEAT NORMAL DEFEAT SW7=2 SW7=2 MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC ELECTRICAL CHARACTERISTICS TEST METHOD Video S/N Input SG2 into VIF IN and measure the video out (Pin 18) noise in r.m.s at TP18B through a 5MHz (-3dB) L.P.F. S/N=20 log 0.7×Vo det NOISE V3 RF AGC operating voltage Input SG8 into VIF IN, and gradually reduce Vi and then measure the input level when RF AGC output TP3 reaches 1/2 V CC, as shown below. TP3 Voltage (dB) V3H BW Video band width 1. Measure the 1MHz component level of EQ output TP18A with a spectrum analyzer when SG3 (f2=57.75MHz) is input into VIF 1/2VCC IN. At that time, measure the voltage at TP8 with SW8, set to position 2, and then fix V8 at that voltage. 2. Reduce F2 and measure the value of (f2-f0) when the (f2-f0) V3L component level reaches -3dB from the 1MHz component level Vi as shown below. TP18 Vi (dBµ) CL-U Capture range 1. Increase the frequency of SG9 until the VCO is out of lockedoscillation. 2. Decrease the frequency of SG9 and measure the frequency fU when the VCO locks. -3dB CL-U=fU-58.75 (MHz) CL-L Capture range 1. Decrease the frequency of SG9 until the VCO is out of lockedoscillation. 1MHz BW ( f2 - f0 ) 2. Increase the frequency of SG9 and measure the frequency fL when the VCO locks. CL-L=58.75-fL (MHz) VIN MIN Input sensitivity Input SG4 (Vi=90dBµ) into VIF IN, and then gradually reduce Vi and measure the input level when the 20kHz component of EQ output CL-T Capture range CL-T=CL-U+CL-L (MHz) TP18A reaches -3dB from Vo det level. VIN MAX Maximum allowable input 1. Input SG5 (Vi=90dBµ) into VIF IN, and measure the level of the 20kHz component of EQ output. 2. Gradually increase the Vi of SG and measure the input level when the output reaches -3dB. VCO ∆f VCO SW on drift 1. Input SG2 into VIF IN . 2. Adjust the VCO coil so that AFT voltage can be reached to 1/2 Vcc in 10 seconds after the power switch is turned to on. 3. IF AGC FILTER (Pin8) is connected to GND (0V) after turning off the VIF input. 4. And then, measure each free running frequencies of 10 and 60 GR AGC control range GR=VIN MAX-VIN MIN (dB) seconds later. VCO ∆f (kHz) = frequency2 (60 sec. later) -frequency1 (10 sec. later) 4 MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC µ AFT sensitivity, V2H Maximum AFT voltage, V2L Minimum AFT voltage 1. Input SG10 into VIF IN , and set the frequency of SG10 so that the voltage of AFT output TP2 is 3V. This frequency is f (3). AMR AM Rejection 1. Input SG18 into SIF input, and measure the output level of AF output TP10. This level is VAM. 2. AMR is; 2. Set the frequency of SG10 so that the AFT output voltage is 2V. AMR=20log This frequency is f (2) VoAF (mVr.m.s) VAM (mVr.m.s) (dB) 3. IN the graph, maximum and minimum DC voltage are V 2H and AF S/N 1. Input SG19 into SIF input, and measure the output noise level of V2L, respectively. TP2 Voltage AF output TP1. This level is VN. 2. S/N is; 3V S/N=20log V2H VoAF (mVr.m.s) VN (mVr.m.s) (dB) CQIF QIF control Lower the voltage of V7, and measure the voltage of V7 when the 2V DC voltage of TP13 begins to change. V2L f (3) f (2) f (MHz) THE NOTE IN THE SYSTEM SETUP M52760SP has 2 power supply pins of Vcc (pin 14) and Vreg.OUT (pin 17) . µ= Pin 14 is for AFT output, RF AGC output circuits and 5V regulated 1000 (mV) (mV/kHz) f (2) - f (3) (kHz) power supply circuit and Pin 17 is for the other circuit blocks. In case M52760SP is used together with other ICs like VIF IM Intermodulation 1. Input SG11 into VIF IN, and measure EQ output TP18A with an oscilloscope. operating at more than 5V, the same supply voltage as that of connected ICs is applied to VCC and Vreg.Out is opened. The other circuit blocks, connected to Vreg.OUT are powered by internal 5V 2. Adjust AGC filter voltage V8 so that the minimum DC level of the output waveform is 1.0V. regulated power supply. In case the connecting ICs are operated at 5V, 5V is supplied to 3. At this time, measure, TP18A with a spectrum analyzer. both VCC and Vreg.OUT. The intermodulation is defined as a difference between 1.07MHz and 4.43MHz frequency components. LOGIC TABLE LIM Limiting sensitivity 1. Input SG17 (SG21) into SIF input, and measure the 400Hz AF 10k “H” component level of AF output TP10. 2. Input SG19 (SG23) into SIF input, and measure the 400Hz component level of AF output TP10. 3. The input limiting sensitivity is defined as the input level when a difference between each 400Hz components of audio output (TP10) is 30dB, as shown below. Audio output (mVrms) Audio output while SG17 (SG21) is input 30dB Audio output while SG19 (SG23) is input (dBµ) 5 SIF input 10k “L” 20k “H” 20k “L” 20k “H” 20k “L” NTSC PAL AFT DEFEAT NORMAL DEFEAT NORMAL MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC SG No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Signals (50Ω termination) f0=58.75MHz AM20kHz 77.8% 90dBµ f0=58.75MHz 90dBµ CW f1=58.75MHz 90dBµ CW (Mixed signal) f2=Frequency variable 70dBµ CW (Mixed signal) f0=58.75MHz AM20kHz 77.8% level variable f0=58.75MHz AM20kHz 14.0% level variable f0=58.75MHz 80dBµ CW f0=58.75MHz 110dBµ CW f0=58.75MHz CW level variable f0=Variable AM20kHz 77.8% 90dBµ f0=Variable 90dBµ CW f1=58.75MHz 90dBµ CW (Mixed signal) f2=55.17MHz 80dBµ CW (Mixed signal) f3=54.25MHz 80dBµ CW (Mixed signal) f0=58.75MHz 87.5% TV modulation ten-step waveform sync tip level 90dBµ f1=54.25MHz 95dBµ CW TYPICAL CHARACTERISTICS THERMAL DERATING (MAXIMUM RATING) 1750 POWER DISSIPATION Pd (mW) INPUT SIGNAL 1524 1500 1250 914 1000 750 500 250 0 -20 0 25 50 75 100 125 150 AMBIENT TEMPERATURE Ta (°C) f1=54.25MHz 75dBµ CW f1=58.75MHz 90dBµ CW (Mixed signal) f2=54.25MHz 70dBµ CW (Mixed signal) f0=4.5MHz 90dBµ FM400Hz±25kHz dev f0=4.5MHz FM400Hz±25kHz dev level variable f0=4.5MHz 90dBµ AM400Hz 30% f0=4.5MHz 90dBµ CW f0=5.5MHz 90dBµ FM400Hz±50kHz dev f0=5.5MHz FM400Hz±50kHz dev level variable f0=5.5MHz 90dBµ AM400Hz 30% f0=5.5MHz 90dBµ CW 6 MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC APPLICATION EXAMPLE 1 SW14 TP18B SW17 L TP18A P F 1 1 VCC A 2 2 SW18 SIF IN 1 2 made by Toko 5549 33µ 62 51 0.47µ TP13 TP12 390k 82p 19 20 V12 17 18 15 16 13 14 0.01µ 11 12 Vcc REG VCO Inter LIM AMP Split AFT QIF DET EQ AMP VIDEO DET APC FM DET QIF AMP RF AGC IF AGC AF AMP VIF AMP 2 1 30k 4 3 TP3 TP1 5 6 8 7 TP8 TP7 1:1 39k SW7 0.47µ 20k 0.01µ VCC 51 1 10 9 2.4k 10µ TP10 0.01µ 2 V7 7.5k 2 SW8 1 V8 150k 51 TP2 150k VIF IN ∗ Capacitors without an assignment are 0.01µF. ∗ The Measuring Circuit 1 is Mitsubishi standard evaluation fixture. 7 Units Resistance : Ω Capacitance : F MITSUBISHI ICs (TV) M52760SP PLL-SPLIT VIF/SIF IC APPLICATION EXAMPLE 2 20 19 18 17 15 16 13 14 12 11 Vcc REG VCO Inter LIM AMP Split AFT QIF DET EQ AMP VIDEO DET APC FM DET QIF AMP RF AGC IF AGC AF AMP VIF AMP 1 2 3 4 5 TP4 HI RX meter LO 6 8 7 9 10 TP7 HI RX meter LO ∗ All capacitor is 0.01µF, unless otherwise specified. 8