RENESAS M52342FP

M52342FP
PLL-Split VIF/SIF IC
REJ03F0165-0200
Rev.2.00
Jun 14, 2006
Description
The M52342FP is IF signal-processing IC for VCRs and TVs. It enables the PLL detection system despite size as small
as that of conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF limiter, FM detector, QIF AGC and EQ
AMP.
Features
• Video detection output is 2 VP-P. It has built-in EQ AMP.
• The package is a 24-pin flat package, suitable for space saving.
• The video detector uses PLL for full synchronous detection circuit. It produces excellent characteristics of DG, DP,
920 kHz beat, and cross color.
• Dynamic AGC realizes high-speed response with only single filter.
• Video IF and sound IF signal processing are separated from each other. VCO output is used to obtain intercarrier.
This PLL-SPLIT method and built-in QIF AGC provide good sound sensitivity and reduces buzz.
• As AFT output voltage uses the APC output voltage, VCO coil is not used.
• Audio FM demodulation uses PLL system, so it has wide frequency range with no external parts and no adjustment.
Application
TV sets, VCR tuners
Recommended Operating Condition
• In case of VCC and Vreg. OUT short
 Supply voltage range: 4.75 to 5.25 V
 Recommended supply voltage: 5.0 V
• Incase of Vreg. OUT open
 Supply voltage range: 8.5 to 12.5 V
Rev.2.00 Jun 14, 2006 page 1 of 18
M52342FP
Block Diagram
EQ F/B
24
APC
FILTER
23
VIDEO
OUT
22
Vreg.
OUT
21
Vreg.
OUT
20
VCO
COIL
19
VCO
COIL
18
VCO
VCC
17
QIF
OUT
15
VCC
16
VCC REG
Inter
AFT
LIMITER
SW/NPSW
IN
14
13
LIM AMP
Split
AFT
QIF DET
QIF AGC
EQ
AMP
VIDEO
DET
APC
QIF AMP
RF AGC
FM DET
IF AGC
VIF AMP
1
2
3
RF AGC AFT OUT RF AGC
OUT
DELAY
4
VIF IN
AF AMP
5
VIF IN
6
GND
7
GND
8
GND
9
QIF
DET IN
10
IF AGC
FILTER
Pin Arrangement
M52342FP
RF AGC DELAY
1
24 EQ F/B
AFT OUT
2
23 APC FILTER
RF AGC OUT
3
22 VIDEO OUT
VIF IN
4
21 Vreg. OUT
VIF IN
5
20 Vreg. OUT
GND
6
19 VCO COIL
GND
7
18 VCO COIL
GND
8
17 VCC
QIF DET IN
9
16 VCC
IF AGC FILTER 10
15 QIF OUT
14 AFT SW/NPSW
NFB 11
AUDIO OUT 12
13 LIMITER IN
(Top view)
Outline: PRSP0024GA-A (24P2Q-A)
Rev.2.00 Jun 14, 2006 page 2 of 18
11
NFB
12
AUDIO
OUT
M52342FP
Absolute Maximum Ratings
(Ta = 25°C, surge protection capacitance 200 pF resistance 0, unless otherwise noted)
Item
Supply voltage1
Symbol
VCC
Supply voltage Vreg. OUT
Vreg. OUT
Power dissipation
Operating temperature
Storage temperature
Surge voltage resistance
Pd
Topr
Tstg
Surge
Ratings
Unit
Condition
13.2
V
VCC and Vreg. OUT is not connected to
each other.
6.0
V
VCC and Vreg. OUT is not connected to
each other.
1524
−20 to +75
−40 to +150
200
mW
°C
°C
V
Ambient Operating Condition
(Ta = 25°C, unless otherwise noted)
Supply Voltage
In case of VCC and Vreg. OUT short
In case of Vreg. OUT open
Supply Voltage Range
4.75 to 5.25 V
8.5 to 12.5 V
Recommended Supply Voltage
5.0 V
Electrical Characteristics
(VCC = 5 V, Ta = 25°C, unless otherwise noted)
Test Conditions
Item
Sym
bol
Te
st
Ci
rc
uit
Test
Point
Input
Point
Input
SG
Min.
Typ.
Max.
Unit
External
Power Supply
Limits
V7
V8
V12
Switches set to
position 1
unless
otherwise
indicated
VIF section
Circuit
current1
VCC = 5V
ICC1
1
A
VIF IN
SG1
33
46
59
mA
5
VCC = 5V
SW17 = 1,
SW14 = 2
Circuit
current2
VCC = 12V
ICC2
1
A
VIF IN
SG1
33
46
59
mA
5
VCC = 12V
SW14 = SW17 =
2
Vreg
voltage
VCC2
1
TP17
4.60
4.95
5.30
V
5
Video
output DC
voltage
V18
1
TP18A
3.2
3.5
3.8
V
VCC = 12V
SW7 = 2
SW8 = 2
Video
output
voltage
Video S/N
VO
det
1
TP18A
VIF IN
SG1
1.8
2.1
2.4
VP-P
Video
S/N
BW
1
TP18B
VIF IN
SG2
51
56
—
dB
1
TP18A
VIF IN
SG3
7.0
9.0
—
MHz
VIN
MIN
1
TP18A
VIF IN
SG4
—
48
52
dBµ
Video
band width
Input
sensitivity
Rev.2.00 Jun 14, 2006 page 3 of 18
0
SW18 = 2
Va
ria
bl
e
SW8 = 2
M52342FP
(VCC = 5 V, Ta = 25°C, unless otherwise noted)
Test Conditions
Item
Sym
bol
Te
st
Ci
rc
uit
Test
Point
Input
Point
Input
SG
Min.
Typ.
Max.
Unit
1
TP18A
VIF IN
SG5
101
105
—
dBµ
50
57
—
dB
2.9
3.2
3.5
V
4.0
4.4
—
V
External
Power Supply
Limits
Maximum
allowable
input
VIN
MAX
AGC
control
range
input
GR
IF AGC
voltage
V8
1
TP8
Maximum
IF AGC
voltage
V8H
1
TP8
Minimum
IF AGC
voltage
V8L
1
TP8
VIF IN
SG7
2.2
2.4
2.6
V
Maximum
RF AGC
voltage
V3H
1
TP3
VIF IN
SG6
4.2
8.0
11.0
4.7
8.9
11.9
—
—
—
V
Minimum
RF AGC
voltage
V3L
V3
1
TP3
VIF IN
SG8
0.1
0.2
0.2
92
0.5
0.7
0.7
95
V
RF AGC
operation
voltage
—
—
—
89
dBµ
Capture
range U
CL-U
1
TP18A
VIF IN
SG9
1.0
1.7
—
MHz
Capture
range L
CL-L
1
TP18A
VIF IN
SG9
1.8
2.4
—
MHz
Capture
range T
CL-T
1
3.1
4.1
—
MHz
mV/
kHz
V
AFT
sensitivity
AFT
maximum
voltage
V2H
AFT
minimum
voltage
V2L
AFT
defeat1
AFT
def1
AFT
defeat2
Inter
modulation
AFT
def2
IM
1
TP3
VIF IN
VIF IN
SG6
SG7
VIF IN
SG10
20
30
60
1
TP2
VIF IN
SG10
3.85
7.7
10.7
4.15
8.1
11.1
—
—
—
—
—
—
0.7
0.7
0.7
1.2
1.2
1.2
V
2.2
4.1
2.5
4.5
2.8
4.9
V
5.5
2.2
4.1
6.0
2.5
4.5
6.5
2.8
4.9
5.5
35
6.0
40
6.5
—
1
1
1
TP2
TP2
TP18A
Rev.2.00 Jun 14, 2006 page 4 of 18
VIF IN
VIF IN
VIF IN
VIF IN
SG10
SG10
SG10
SG11
V12
(VCC = 9V)
(VCC = 12V)
TP2
TP2
V8
(VCC = 9V)
(VCC = 12V)
1
1
V7
Switches set to
position 1
unless
otherwise
indicated
3.3
3.3
(VCC = 9V)
(VCC = 12V)
3.3
(VCC = 9V)
(VCC = 12V)
1.6
5
V
(VCC = 9V)
(VCC = 12V)
4.6
(VCC = 9V)
(VCC = 12V)
dB
Va
ria
bl
e
SW8 = 2
M52342FP
(VCC = 5 V, Ta = 25°C, unless otherwise noted)
Test Conditions
Sym
bol
Te
st
Ci
rc
uit
Test
Point
Input
Point
Input
SG
V12
Switches set to
position 1
unless
otherwise
indicated
5
SW7 = 2
External
Power Supply
Limits
Min.
Typ.
Max.
Unit
Differential
gain
DG
1
TP18A
VIF IN
SG12
—
2
5
%
Differential
phase
DP
1
TP18A
VIF IN
SG12
—
2
5
deg
Sync. tip
level
V18
SYNC
1
TP18A
VIF IN
SG2
0.85
1.15
1.45
V
VIF input
resister
RINV
2
TP4
—
1.2
—
kΩ
VIF input
capacitanc
e
SIF section
CINV
2
TP4
—
5
—
pF
QIF
output1
QIF1
1
TP13
VIF IN
QIF IN
SG2
SG13
94
100
106
dBµ
QIF
output2
QIF2
1
TP13
100
106
dBµ
VOS
1
TP13
SG2
SG14
SG15
94
SIF
detection
output
VIF IN
QIF IN
VIF IN
94
100
106
dBµ
AF output
DC
voltage
V1
1
TP10
SIF IN
SG20
1.6
2.2
2.8
V
5
AF output
(4.5MHz)
VOAF
1
1
TP10
SIF IN
SG16
400
560
800
mVr
ms
5
AF output
(5.5MHz)
VOAF
2
1
TP10
SIF IN
SG21
320
450
630
0
AF output
distortion
(4.5MHz)
THD
AF1
1
TP10
SIF IN
SG16
—
0.2
0.9
mVr
ms
%
5
AF output
distortion
(5.5MHz)
THD
AF2
1
TP10
SIF IN
SG21
—
0.2
0.9
%
0
Limiting
sensitivity
(4.5MHz)
LIM1
1
TP10
SIF IN
SG17
SG19
—
42
55
dBµ
5
Limiting
sensitivity
(5.5MHz)
LIM2
1
TP10
SIF IN
SG22
SG24
—
42
55
dBµ
0
AM
rejection
(4.5MHz)
AMR1
1
TP10
SIF IN
SG18
55
62
—
dB
5
AM
rejection
(5.5MHz)
AMR2
1
TP10
SIF IN
SG23
55
64
—
dB
0
AF S/N
(4.5MHz)
AF
S/N1
1
TP10
SIF IN
SG20
55
62
—
dB
5
AF S/N
(5.5MHz)
AF
S/N2
1
TP10
SIF IN
SG25
55
64
—
dB
0
Item
Rev.2.00 Jun 14, 2006 page 5 of 18
V7
0
V8
M52342FP
(VCC = 5 V, Ta = 25°C, unless otherwise noted)
Test Conditions
Sym
bol
Te
st
Ci
rc
uit
Test
Point
Min.
Typ.
Max.
Unit
RINS
2
TP7
—
1.5
—
kΩ
CINS
SIF input
capacitanc
e
Control section
2
TP7
—
4
—
pF
1
TP7
—
0.7
1.0
V
Item
SIF input
resistance
CQIF
QIF
control
External
Power Supply
Limits
Input
Point
Input
SG
V7
V8
V12
Switches set to
position 1
unless
otherwise
indicated
SW7 = 2
Va
ria
bl
e
Pin 14 Voltage Control
Pin 14 Voltage (V)
0 to 0.6
1.0 to 2.3
0 to 2.3
2.7 to 5.0
2.7 to 4.0
4.4 to 5.0
AF
AFT
PAL
NORMAL
DEFEAT
NTSC
NORMAL
DEFEAT
Electrical Characteristics Test Method
Video S/N
Input SG2 into VIF IN and measure the video out (Pin 22) noise in r.m.s at TP22B through a 5 MHz (–3 dB) L.P.F.
S/N = 20 log
0.7 • Vo det
NOISE
(dB)
BW Video Band Width
1. Measure the 1MHz component level of EQ output TP22A with a spectrum analyzer when SG3 (f2 = 57.75 MHz) is
input into VIF IN. At that time, measure the voltage at TP10 with SW10, set to position 2, and then fix V10 at that
voltage.
2. Reduce f2 and measure the value of (f2 − f0) when the (f2 − f0) component level reaches −3 dB from the 1 MHz
component level as shown below.
TP18
–3 dB
1 MHz
Rev.2.00 Jun 14, 2006 page 6 of 18
BW
(f2 – f0)
M52342FP
VIN MIN Input sensitivity
Input SG4 (Vi = 90 dBµ) into VIF IN, and then gradually reduce Vi and measure the input level when the 20 kHz
component of EQ output TP22A reaches −3 dB from VO det level.
VIN MAX Maximum Allowable Input
1. Input SG5 (Vi = 90 dBµ) into VIF IN, and measure the level of the 20 kHz component of EQ output.
2. Gradually increase the Vi of SG and measure the input level when the output reaches −3 dB.
GR AGC Control Range
GR = VIN MAX − VIN MIN (dB)
V3 RF AGC Operating Voltage
Input SG8 into VIF IN, and gradually reduce Vi and then measure the input level when RF AGC output TP3 reaches
1/2 VCC, as shown below.
TP3
Voltage
V3H
1/2 VCC
V3L
Vi
Vi (dBµ)
CL-U Capture Range
1. Increase the frequency of SG9 until the VCO is out of locked-oscillation.
2. Decrease the frequency of SG9 and measure the frequency fU when the VCO locks.
CL-U = fU − 58.75 (MHz)
CL-L Capture Range
1. Decrease the frequency of SG9 until the VCO is out of locked-oscillation.
2. Increase the frequency of SG9 and measure the frequency fL when the VCO locks.
CL-L = 58.75 − fL (MHz)
CL-T Capture Range
CL-T = CL-U + CL-L (MHz)
Rev.2.00 Jun 14, 2006 page 7 of 18
M52342FP
µAFT Sensitivity, V2H Maximum AFT Voltage, V2L Minimum AFT Voltage
1. Input SG10 into VIF IN, and set the frequency of SG10 so that the voltage of AFT output TP2 is 3 V. This
frequency is named f (3).
2. Set the frequency of SG10 so that the AFT output voltage is 2 V. This frequency is named f (2).
3. IN the graph, maximum and minimum DC voltage are V2H and V2L, respectively.
TP2
Voltage
V2H
3V
2V
V2L
f (3)
µ=
1000 (mV)
f (2) – f (3) (kHz)
f (2)
f (MHz)
(mV/kHz)
IM Intermodulation
1. Input SG11 into VIF IN, and measure EQ output TP22A with an oscilloscope.
2. Adjust AGC filter voltage V10 so that the minimum DC level of the output waveform is 1.0 V.
3. At this time, measure, TP22A with a spectrum analyzer.
The intermodulation is defined as a difference between 920 kHz and 3.58 MHz frequency components.
LIM Limiting Sensitivity
1. Input SG17 (SG22) into SIF input, and measure the 400 Hz component level of AF output TP12.
2. Input SG19 (SG24) into SIF input, and measure the 400 Hz component level of AF output TP12.
3. The input limiting sensitivity is defined as the input level when a difference between each 400 Hz components of
audio output (TP12) is 30 dB, as shown below.
Audio output
(mVrms)
Audio output while
SG17 (SG22) is input
30 dB
Audio output while
SG19 (SG24) is input
(dBµ) SIF input
AMR AM Rejection
1. Input SG18 (SG23) into SIF input, and measure the output level of AF output TP12. This level is named VAM.
2. AMR is;
AMR = 20 log
VoAF (mVrms)
VAM (mVrms)
Rev.2.00 Jun 14, 2006 page 8 of 18
(dB)
M52342FP
AF S/N
1. Input SG19 (SG24) into SIF input, and measure the output noise level of AF output TP1. This level is named VN.
2. S/N is;
S/N = 20 log
VoAF (mVrms)
VN (mVrms)
(dB)
CQIF QIF Control
Lower the voltage of V9, and measure the voltage of V9 when DC voltage of TP15 begins to change.
The Note in The System Setup
M52342FP has 2 power supply pins of VCC (pin 16, 17) and Vreg. OUT (pin 20, 21) . VCC is for AFT output, RF AGC
output circuits and 5 V regulated power circuit and Vreg. OUT is for the other circuit blocks.
In case M52342FP is used together with other ICs like VIF operating at more than 5 V, the same supply voltage as that
of connected ICs is applied to VCC and Vreg. OUT is opened. The other circuit blocks, connected to Vreg. OUT are
powered by internal 5 V regulated power supply.
In case the connecting ICs are operated at 5 V, 5 V is supplied to both VCC and Vreg. OUT.
Logic Table
AF
10 k “H”
10 k “L”
20 k “H”
20 k “L”
20 k “H”
20 k “L”
Rev.2.00 Jun 14, 2006 page 9 of 18
NTSC
PAL
AFT
DEFEAT
NORMAL
DEFEAT
NORMAL
M52342FP
Input Signal
SG No.
1
2
3
4
5
6
7
8
9
10
11
12
Signals (50 Ω Termination)
f0 = 58.75 MHz AM 20 kHz 77.8% 90 dBµ
f0 = 58.75 MHz 90 dBµ CW
f1 = 58.75 MHz 90 dBµ CW (Mixed signal)
f2 = Frequency variable 70 dBµ CW (Mixed signal)
f0 = 58.75 MHz AM 20 kHz 77.8% level variable
f0 = 58.75 MHz AM 20 kHz 14.0% level variable
f0 = 58.75 MHz 80 dBµ CW
f0 = 58.75 MHz 110 dBµ CW
f0 = 58.75 MHz CW level variable
f0 = variable AM 20 kHz 77.8% 90dBµ
f0 = variable 90dBµ CW
f1 = 58.75 MHz 90 dBµ CW (Mixed signal)
f2 = 55.17 MHz 80 dBµ CW (Mixed signal)
f3 = 54.25 MHz 80 dBµ CW (Mixed signal)
f0 = 58.75 MHz 87.5%
TV modulation ten-step waveform
Sync tip level 90 dBµ
13
f1 = 54.25 MHz 95 dBµ CW
14
f1 = 54.25 MHz 75 dBµ CW
15
f1 = 58.75 MHz 90 dBµ CW (Mixed signal)
f2 = 54.25 MHz 70 dBµ CW (Mixed signal)
16
17
18
19
20
21
22
23
24
25
f0 = 4.5 MHz
f0 = 4.5 MHz
f0 = 4.5 MHz
f0 = 4.5 MHz
f0 = 4.5 MHz
f0 = 5.5 MHz
f0 = 5.5 MHz
f0 = 5.5 MHz
f0 = 5.5 MHz
f0 = 5.5 MHz
90 dBµ FM 400 Hz ± 25 kHz dev
FM 400 Hz ± 25 kHz dev level variable
90 dBµ AM 400 Hz 30%
90dBµ CW
CW level variable
90dBµ FM 400 Hz ± 50 kHz dev
FM 400 Hz ± 50 kHz dev level variable
90 dBµ AM 400 Hz 30%
90dBµ CW
CW level variable
Typical Characteristics
Thermal Derating (Maximum Rating)
Power Dissipation Pd (mW)
1750
1524
1500
1250
1000
914
750
500
250
0
–20
0
25
50
75
100 125 150
Ambient Temperature Ta (°C)
Rev.2.00 Jun 14, 2006 page 10 of 18
M52342FP
Typical Application Example (for 38.9 MHz Split)
VCC
8.5 to 12 V
GND
ON
18 H
OFF
47
300
10 k
180
1k
22 p 47 H
150
SFE 5.5MD
VCO COIL 5531
82 p
0.01 µ
62
100 H
+
10 p
+
1k
0.01 µ
33 µ
10 k
1p
0.47 µ 220 k
OFF
ON
20 k
24
23
22
21
20
19
18
VCO
17
16
VCC REG
15
Inter
14
13
LIM AMP
Split
AFT
QIF DET
QIF AGC
EQ
AMP
VIDEO
DET
APC
QIF AMP
RF AGC
FM DET
IF AGC
VIF AMP
1
2
3
0.01 µ
36 k
15 k
4
0.01 µ
AF AMP
5
6
7
8
9
10
0.56 H
12
2.4 k
+
0.47 µ
39 k
1k
11
+
10 µ
5.1 k
0.01 µ
SAW
150 k
150 k
0.01 µ
220 H 0.01 µ
390
0.01 µ
3.9 k
0.33
IF IN
0.01 µ
910
51
33
2200 p
Note: In case the other components are connected to the GND area nearby the VCO coil,
a leakage interference to them should be considered.
The bypass capacitors of 33 µF and 0.01 µF are grounded as close as possible to
the GND pins (pin 6, 7, 8) so as to minimize the interference.
Rev.2.00 Jun 14, 2006 page 11 of 18
Units R: Ω
C: F
M52342FP
Pin Description
Pin 1 (RF AGC DELAY)
VCC
An applied voltage to the pin 1 is for changing a RF AGC
delay point.
1
Pin 2 (AFT OUT)
Since an AFT output is provided by a high impedance
source, the detection sensitivity can be set by an external
resistor.
The muting operation will be on in following two cases;
1) the APC is out of locking,
2) the video output becomes small enough in a weak
electric field.
VCC
The maximum
outflow current
is 0.2 mA.
The maximum
inflow current
is 0.2 mA.
Tuner
2
VCC
(V2)
(in open-loop condition)
VCC
2
0
(fo)
Pin 3 (RF AGC OUT)
VCC
(supply to a tuner)
The maximum
inflow current
is 1.5 mA.
Tuner
3
A current mode output is available in the reverse AGC
operation.
The fluctuation of a bottom voltage is made small by
loading higher impedance for a deep saturation.
(in open-loop condition)
(V3)
0
Note:
(supply voltage to a tuner)
VCC
weak
electric field
strong
electric field
(IF input)
Connecting a nonpolarity capacitor of 1 µF between pin1 and pin3 improves AGC operating speed.
In that case, the capacitors between pin1/pin3 and ground should be removed.
Pin 4, Pin 5 (VIF IN)
Bias
5
1.2 k
1.2 k
SAW
4
Terminal voltage
: 1.45 V
Rev.2.00 Jun 14, 2006 page 12 of 18
It should be designed considering careful impedance
matching with the SAW filter.
M52342FP
Pin 6, Pin 7, Pin 8 (GND)
6
7
8
They are all groung pins.
Pin 9 (QIF DET IN)
Terminal voltage
: 2.4 V
5k
9
SAW
Bias
The input impedance is 1.5 kΩ.
In the intercarrier system application, the intercarrier output is
available in pin 15 by connecting pin 9 to ground.
1.5 k
Inter
1.5 k
Inter/Sprit
Pin 10 (IF AGC FILTER)
In spite of the 1-pin filter configuration, 2-pin filter
characteristics are available by utilizing the dynamic AGC
circuit.
VCC
(V10)
10
1k
0
weak
electric field
strong
electric field
(IF input)
Pin 11 (NFB)
Terminal voltage
: 2.1 V
11
5k
+
5k
Rev.2.00 Jun 14, 2006 page 13 of 18
The FM detector can respond to several kinds of SIF signals
without an adjustment and external components by adopting
the PLL technique.
It also is in compliance with the multi-SIF by selecting an
appropriate deemphasis and audio output amplifier using the
pin 14 switch.
The capacitor between pin 11 and 12, which fixes the
deemphasis characteristics, can be determined considering
the combination of an equivalent resistance of the IC and this
capacitor itself.
M52342FP
Pin 12 (AUDIO OUT)
In the 4.5 MHz application, the internal voltage gain is
increased by 6-dB in comparison with the other applications
and then the signals are delivered through an emitter
follower.
12
Terminal voltage: 2.2 V
Pin 13 (LIMITER IN)
Terminal voltage: 2.2 V
Bias
13
8k
The input impedance is 8 kΩ.
8k
Pin 14 (AFT SW/NPSW)
It works as a switch by connecting the resistor to 5 V (High)
or GND (Low), alternately.
SIF 4.5 MHz : H
Others
:L
10 k
VCC (5 V)
2k
14
22 k
AFT Defeat : H
AFT ON
:L
10k
H
H
L
L
20k
H
L
H
L
AF AMP
AFT
4.5 MHz Defeat
4.5 MHz Normal
Other
Defeat
Other
Normal
Pin 14
Applied Voltage
4.4 to 5.0 V
2.7 to 4.0 V
1.0 to 2.3 V
0 to 0.6 V
The terminal voltage is set by the external resistors because
of an open base input.
Pin 15 (QIF OUT)
Terminal voltage: 2.45 V
15
Drive current
: 0.5 mA.
In both the split and intercarrier system, the carrier signal to
SIF provided from pin 15 through an emitter follower.
Pin 16, Pin 17 (VCC)
VCC
16
+
17
Rev.2.00 Jun 14, 2006 page 14 of 18
The recommended supply voltage is 5 V or 9 to 12 V.
In the case of 5 V supply, these pins should be tied to pin 20
and pin 21.
In the case of 9 to 12 V supply, a regulated output of 5 V are
available in pin 20 and pin 21.
M52342FP
Pin 18, Pin 19 (VCO COIL)
850
850
18
19
466
466
Connecting a tuning coil and capacitor to these pins enables
an oscillation.
The tuning capacitor of about 30 pF is recommended.
The oscillation frequency is tuned in f0.
In the actual adjustment, the coil is tuned so that the AFT
voltage is reached to VCC/2 with f0 as an input.
The printed pattern around these pins should be designed
carefully to prevent an pull-in error of VCO, caused by the
laekage interference from the large signal level oscillator to
adjacent pins.
The interconnection also should be designed as short as
possible.
Pin 20, Pin 21 (Vreg. OUT)
21
20
12.1 k
+
It is a regulated 5 V output which has current drive capability
of approximately 15 mA.
3.8 k
Pin 22 (VIDEO OUT)
An output amplitude is positive 2 VP-P in the case of 87.5%
video modulation.
22
Internal driving current: 3 mA
1.1 VO-P
Rev.2.00 Jun 14, 2006 page 15 of 18
M52342FP
Pin 23 (APC FILTER)
Bias
In the locked state, the cut-off frequency of the filter is
adjusted effectively by an external resistor so that it will be in
the range of around 30 to 200 kHz.
In case the cut-off frequency is lower, the pull-in speed
becomes slow. On the other hand, a higher cut-off frequency
widen the pull-in range and band width, which results in a
degradation in the S/N ratio. So, in the actual TV system
design, the appropriate constant should be chosen for getting
desirable performance considering above conditions.
23
+
(Pin 23 output)
(V23)
3.4 VO-P
(FM mod. frequency)
fo
(IF input frequency)
100 kHz
In the application, an offset between AFT center frequency and VCO free-running frequency, can be improved by
connecting a 220 kΩ resistor to VCC supply (pin 21).
23
+
220 k
21
C
Rev.2.00 Jun 14, 2006 page 16 of 18
A buzz noise also decreases by connecting a capacitor from
pin 23 to VCC (pin 21) or GND. This effect utilizes the signal
interference on the printed circuit board. So, the
determination that which connection is effective, to VCC or
GND, is done by a cut and try method.
The capacitor of less than 680 pF, which depends on Q of
VCO coil, is recommended to prevent an APC pull-in range
from narrowing.
Taking it into consideration in the actual TV set design.
M52342FP
Pin 24 (EQ F/B)
Both the external coil and capacitor determine the frequency
response of EQ output.
The series connected resistor is for damping.
16.8 k
24
500
3.1 k
+
3.9 k
1.1 VO-P
In the intercarrier system, the following phenomenon should be considered;
a strong equalization (EQ) enlarge the sound carrier output from pin 22, because the EQ is applied before an audio trap.
In that case, the next two solutions are recommended;
decrease in S level of SAW, avoiding to peak a sound carrier in EQ.
Video
Det.
+
–
3.1 k
3.17 k
500
3.75 mA
22
Video output
Circuit Diagram of EQ Amp.
Rev.2.00 Jun 14, 2006 page 17 of 18
24
M52342FP
Package Dimensions
JEITA Package Code
P-SSOP24-5.3x10.1-0.80
RENESAS Code
PRSP0024GA-A
Previous Code
24P2Q-A
MASS[Typ.]
0.2g
E
13
*1
HE
24
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
F
1
12
Index mark
c
A2
A1
D
L
A
*2
*3
e
y
bp
Detail F
Rev.2.00 Jun 14, 2006 page 18 of 18
Reference Dimension in Millimeters
Symbol
D
E
A2
A
A1
bp
c
HE
e
y
L
Min Nom Max
10.0 10.1 10.2
5.2 5.3 5.4
1.8
2.1
0.1 0.2
0
0.3 0.35 0.45
0.18 0.2 0.25
0°
8°
7.5 7.8 8.1
0.65 0.8 0.95
0.10
0.4 0.6 0.8
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