MITSUBISHI M62359

MITSUBISHI<Dig.Ana.INTERFACE>
M62359P,FP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
PIN CONFIGURATION (TOP VIEW)
DESCRIPTION
The M62359 is a 8-channel 8-bit voltage output digital to analog
converter.
The M62359 includes data latch circuit and gain change circuit of
output amplifiers.
Input data is a easy-to-use three-wires serial interface.
It is able to cascading serial use with Do terminal.
Gain set up data change a case the each channel`s output
voltage range is change ,and each channel`s output voltage
range is able to change severally make use of gain set up data.
FEATURES
LD
CLK
1
18
R
2
17
VDD
DO
Ao4
Ao3
DI
3
16
Ao5
Ao6
4
15
5
14
Ao7
Ao8
6
13
7
12
Ao2
Ao1
GND
VrefL
8
11
Vcc
9
10
VrefU
Outline 18P4
•All channel includes gain change latch circuit with output
amplifiers.
•14-bit serial data input
•Built-in reset circuit
APPLICATION
Conversion from digital control data to analog control data
for home-use and industrial equipment.
Automatic adjustment by combination with EEPROM and
microcomputer(replacement of conventional half-fixed
resistor).
Signal gain control of DISPLAY-MONITOR or CTV.
LD
CLK
DI
1
20
2
19
3
18
Ao5
Ao6
Ao7
Ao8
NC
GND
4
17
5
16
6
15
7
14
8
13
9
12
VrefL
10
11
R
VDD
DO
Ao4
Ao3
Ao2
Ao1
NC
Vcc
VrefU
Outline 20P2N-A
NC:NO CONNECTION
BLOCK DIAGRAM
R
VDD
Do
Ao4
Ao3
GAIN
CHANGE
LATCH
Ao1
Ao2
G
G
- +
- +
- +
8-BIT
R-2R D-A
R-2R
R-2R
R-2R
L
VrefU
GND
VrefL
G
- +
8-BIT
LATCH
Vcc
L
L
8
8-BIT
LATCH
L
8-BIT
R-2R D-A
R-2R
L
L
2
GAIN
CHANGE
LATCH
LD
CLK
DI
Ao5
R-2R
R-2R
G
G
Ao6
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Ao7
G
Ao8
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MITSUBISHI<Dig.Ana.INTERFACE>
M62359P,FP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
EXPLANATION OF TERMINALS
Pin No.
3
16
2
1
17
11
8
10
9
18
12
13
14
15
4
5
6
7
Symbol
DI
DO
CLK
LD
VDD
Vcc
GND
VrefU
VrefL
R
Ao1
Ao2
Ao3
Ao4
Ao5
Ao6
Ao7
Ao8
Function
Serial data input terminal
Serial data output terminal
Serial clock input terminal
LD terminal input high level than latch circuit data load *1
Digital power supply terminal
Analog power supply terminal
Digital and Analog common GND
D-A converter high level reference voltage input terminal
D-A converter low level reference voltage input terminal
Reset terminal
8-bit D-A converter output terminal
*1 When the LD terminal is "H" input data has load.
ABSOLUTE MAXIMUM RATINGS(Ta=25°C, unless otherwise noted)
Symbol
VCC
Parameter
Supply voltage
VDD
VrefU
VIN
IDO
IAO
Topr
Tstg
Supply voltage
Conditions
D-A converter high level reference voltage
Input voltage
Output current
Buffer amplifier output current range
Operating temperature
Storage temperature
Ratings
Unit
-0.3~13.5
-0.3~7
V
V
VDD
-0.3~VDD+0.3
-5~+5
-5~+5
-20~+85
V
V
mA
mA
°C
-40~+125
°C
RECOMMENDED OPERATING CONDITIONS
•Digital supply voltage VDD 5V±10%
•Analog supply voltage Vcc VDD~13V
ELECTRICAL CHARACTERISTICS
Digital part(Vcc=13V,VDD=VrefU=5V, Ta=-25 to +85°C,unless otherwise noted)
Symbol
VDD
Supply voltage
IDD
Circuit current
VIL
Input low voltage
Input high voltage
VIH
VOL
VOH
Test conditions
Parameter
Output low voltage
Output high voltage
Min.
4.5
CLK=1MHz in action
Limits
Typ.
Max.
5.5
V
1
mA
0.2VDD
V
V
0.4
V
V
0.8VDD
IOL=1.0mA
IOH=-400µA
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VDD-0.4
Unit
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MITSUBISHI<Dig.Ana.INTERFACE>
M62359P,FP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
Analog part(Vcc=13V,VDD=VrefU=5V,Ta=-20°C~+85°C, unless otherwise noted)
Symbol
Test conditions
Parameter
Vcc
Supply voltage
Icc
Circuit current
Min.
Limits
Typ.
Unit
Max.
13
V
2
4
mA
1.2
2.5
mA
VDD
IrefU
D-A converter high level reference
input current
VrefU
D-A converter high level reference
voltage range
3.5
VDD
V
VrefL
D-A converter low level reference
voltage range
0
1.5
V
VAO
D-A converter output
voltage range
0.1
0.2
Vcc-0.1
-1.0
-1.5
-2
-2
1.0
1.5
2
2
LSB
LSB
-3
3
%
IAO
All ch‘s set up at 107/256
IAO =±500µA
IAO =±1mA
Buffer amplifier output current range
Differential nonlinearity
Guaranteed monotonic
Nonrineality
Zero code error
VrefU=4.79V
Full scale error
VrefL=0.95V without load
DNL
NL
EZ
EF
Eo
Gain error
SR
Output slew rate
V
Vcc-0.2
±2.5
0.2
mA
LSB
LSB
V/µs
TIMING CHART (MODEL)
R
LSB
MSB
DI
D13
D12
D0
D11
CLK
LD
AO
Input data is carried out LD signal Low besides CLK signal positive edge.
CLK,LD is keep generally High level.
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MITSUBISHI<Dig.Ana.INTERFACE>
M62359P,FP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
AC CHARACTERISTICS(Ta=25°C,Vcc=13V,VDD=VrefU=5V,VrefL=0V,unless otherwise noted)
Parameter
Symbol
Test conditions
Min
200
200
Clock "L"pulse width
tCKL
tCKH
tCR
tCF
tDCH
tCHD
tCHL
Clock "H"pulse width
Clock rise time
Clock fall time
Data set up time
Data hold time
Max
200
200
60
100
200
LD setup time
LD hold time
tLDC
tLDH
tDO
tLDD
Limits
Typ
CL=100pF
Without load
70
ns
ns
ns
ns
ns
ns
ns
350
ns
ns
ns
300
µs
100
100
LD "H" pulse width
Data output delay time
Data output setting time
Unit
TIMING CHART
tCKH
tCR
tCF
CLK
tCKL
DI
tDCH
tLDC
tCHD
tLDH
tCHL
LD
tLDD
D-A
OUTPUT
tDO
DO
OUTPUT
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MITSUBISHI<Dig.Ana.INTERFACE>
M62359P,FP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
DIGITAL FORMAT
•14 bit serial data
1
2
9
8
10
11
12
13
(LSB)
14
•DAC select data
DATA
CK
D10
D11
D12
0
0
0
0
DAC selection
Don‘t care
0
0
0
1
Ao1 selection
0
0
1
0
Ao2 selection
1
0
1
Ao3 selection
0
0
1
0
Ao4 selection
Ao5 selection
0
0
•Data assignment
0
•GAIN set up data
K
DAC output range
(VrefU=5V,VrefL=0V)
0
1
0~5V
1
0
1.6
0~8V
0
1
1.8
0~9V
1
1
2.4
0~12V
0
Ao8 selection
0
1
Don‘t care
0
1
0
Don‘t care
0
1
1
Don‘t care
1
0
0
Don‘t care
1
0
1
Don‘t care
1
1
1
0
Don‘t care
1
1
1
1
Don‘t care
1
1
(MSB)
D9
0
0
1
1
:DAC set up data
D8
Ao6 selection
Ao7 selection
1
1
:GAIN set up data
(LSB)
1
0
1
0
0
:DAC select data
0
1
1
D13
1
1
0
1
•DAC set up data
(MSB)
(LSB)
D0
0
D2
D3
D4
D5
D6
D7
0
0
0
0
0
0
DAC voltage
1
0
0
0
0
0
0
2/256•(VrefU-VrefL) •K +VrefL
1/256•(VrefU-VrefL) •K +VrefL
0
0
0
0
0
0
0
3/256•(VrefU-VrefL) •K +VrefL
1
0
0
0
0
0
0
4/256•(VrefU-VrefL) •K +VrefL
0
1
1
1
1
1
1
1
1
255/256•(VrefU-VrefL) •K +VrefL
1
1
1
1
0
Ao=
1
2
1
6
256/256•(VrefU-VrefL) •K +VrefL
7
2 X D0 + 2 X D1 + 2 X D2 +••••••••+ 2 X D6 + 2 X D7 + 1
• (VrefU - VrefL) •K + VrefL
256
K:Amplifiers gain
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MITSUBISHI<Dig.Ana.INTERFACE>
M62359P,FP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
APPLICATION CIRCUIT
Vcc=13.5V max
5V
10µF
VCC
Ao1
ch1
Ao2
ch2
Ao3
ch3
Ao4
ch4
Ao5
ch5
Ao6
ch6
Ao7
ch7
Ao8
ch8
VDD
VrefU
10µF
*1
LD
MICRO
COMPUTER
CLK
D1
GND
VrefL
This IC`s output amplifier has an advantage to capacitive
load.So it`s no problem at device action when connect
capacitor among output to GND for every noise eliminate.
*1 If be used in a cathode-ray tube sets and high voltage
sets,please connect capacitor among output to
GND,about 0.1µF~1µF,because keep off effect of spark
and electric discharge etc.
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