MITSUBISHI M62463AFP

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MITSUBISHI SOUND PROCESSORS
M62463AFP
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Dolby Pro Logic Surround Decoder
Description
Outline
The M62463AFP is a Single Chip Dolby Pro Logic
Surround Decoder.This LSI has all of required functions
for Dolby Pro Logic Surround.
Dolby and the double-D symbol are trademarks of Dolby Laboratories
Licensing Corporation.San Francisco,CA94103-4813,USA.
This device available only to licensees of Dolby Lab.
Licensing and application information may be obtained from Dolby Lab.
Outline 64P6N
0.8mm pitch QFP
(14.0mmx14.0mmx2.8mm)
Features
Includes all functions necessary for Dolby Pro Logic Surround
-Adaptive Matrix
-Input Auto-Balance
-Noise Sequencer
-Center Mode Control ON/OFF, WIDE/NORMAL/PHANTOM
-Modified Dolby B type Noise Reduction
-4 channel (Lch/Rch/Cch/Sch) / 3 channel (Lch/Rch/Cch)
-Digital delay Delay time:15.4 to 51.2msec
Cch/Sch Master Volume 0 to -87dB/1dB step, -∞
3-lines MCU control
Space Surround such as Disco, Hall and Live
Digital Echo for Karaoke Function Delay time 123,184msec
Current control oscillation circuit for system clock
System Configuration
M62463AFP
Lch IN
L
Input
AutoBalance
Control
Adaptive
Matrix
Lch
OUT
R
C
Rch IN
S'
L-R
Noise
Sequencer
7kHz
LPF
Rch
OUT
Center/
operating
mode
control
L+R
2
Surround
Master
Volume
Digital Delay
MCU Interface
MIC IN
DATA SCK REQ
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ELECTRIC
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Lch
Rch
Center
Master
Volume
Modified S
Dolby
B-NR
Master
Volume
Cch
OUT
Sch
OUT
CENTER
SURROUND
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M62463AFP
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Dolby Pro Logic Surround Decoder
LBPF2
51
RLC7
RLC4
RLC1
RLC2
RLC5
PSC4
PSC1
PSC5
PSC2
PSC6
PSC3
DBC3
DBC2
DBC1
BNR IN
44
43
42
41
40
39
38
37
36
35
34
33
RBPF1
54
C
R
D/A
CONTROL
LIN
57
L
SW4
R C
22kΩ
RIN
2
1
3
4
L+R
2
SERVO
A/D
56
L-R
RT
LOGIC
55
VCA
FBIN
31
LPF2 OUT
30
LPF2 IN2
29
LPF2 IN1
28
DAINT OUT
27
DAINT IN
26
DACONT
25
ADCONT
24
ADINT OUT
23
ADINT IN
22
LPF1 OUT
21
LPF1 IN2
20
LPF1 IN1
19
DSEL OUT
18
MICOUT
17
DVss
CENTER MODE
SW5
AUTO
BALANCE
SELECTOR
LT
NETWORKS
L
32
S'
BPF
53
MODIFIED
B-TYPE
NR DECODER
DUAL-TIME CONSTANT
AND THRESHOLD SWITCHES
COMBINING
VCA
52
RBPF2
LOG
DIFFERENCE
AMPLIFIERS
FULL WAVE
RECTIFIER
L+R L-R
LBPF1
45
LPF
50
46
10Kbit
SRAM
RLC6
47
F.B.
VOL
49
48
BPF
RLC8
RLC3
Pin Configuration
58
22kΩ
MIC
VOL
15
16
REQ
4
5
6
7
8
9
10
11
12
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ELECTRIC
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13
DVdd
3
MICIN
2
DVss
14
SCK
REQ
S
AGND
1
C
SCK
DVdd
VREFD
R
DATA
DATA
AGND
L
LPF
CLK
2
1
SW6
MCU INTERFACE
VOL
CMC
64
VOL
SVOLOUT
NGC1
SW2
SVOLIN
63
SW3
4
SOUT
NGC2
1
COUT
62
4
SW1
2
3
CVOLIN
NGC3
1
2
CVOLOUT
61
2 3
ROUT
IREF
VREF
60
IREF
VREF
1
AVcc
NOISE
SEQUENCER
59
LOUT
AVcc
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58
RIN
12
MICIN
57
SW6
2
L+R
2
1
4
3
MICOUT
18
MICVOL
1
SW4
2
L-R
INPUT
BALANCE
19
20
S'
SELECTOR
SW5
F.B.VOL
Logic
10Kbit SRAM
Digital Delay
ADAPTIVE
MATRIX
32
C
R
L
31
33
Modified BNR
WIDE
NORMAL
PHANTOM
OFF
CENTER
MODE
CONTROL
2
1
SW3
PROLOGIC
14
4
1
4
1
SCK REQ
15
16
MASTER
VOLUME
MASTER
VOLUME
SW2
3
2
3
2
SW1
MCU
Interface
MUTE
+/-
MUTE
BY-PASS
DATA
SPACE
SURROUND
PROLOGIC
SPACE
SURROUND
BY-PASS
6
7
8
3
4
5
2
1
SVOLOUT
CVOLOUT
ROUT
LOUT
Block Diagram
LPF
A/D
+
LIN
NOISE
SEQUENCER
LPF
PR
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MITSUBISHI SOUND PROCESSORS
M62463AFP
Dolby Pro Logic Surround Decoder
PR
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MITSUBISHI SOUND PROCESSORS
M62463AFP
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Dolby Pro Logic Surround Decoder
FUNCTIONAL DESCRIPTION
FUNCTION
1
2
Fundamental function for
Dolby Pro Logic Surround
Decoder
RAM for Digital Delay
DESCRIPTION
-Adaptive Matrix
-Input Auto-Balance
-Noise Sequencer
-Center Mode Control
ON/OFF
WIDE/NORMAL/PHANTOM
-Modified Dolby B type Noise Reduction
-4ch(L,R,C,S), 3ch(L,R,C) Mode Switch
10K-bit RAM
3 Surround Delay Time
15.4, 20.5, 25.6, 29.2msec
(for Dolby Pro Logic Surround)
51.2msec (for Space Surround)
4 Circuit for Space Surround
Digital delay circuit can be used for
Space Surround such as a Disco, Hall or Live,
and Karaoke echo.
5 Echo delay time
123,184 msec
6 Feedback Volume
Delay Signal Feedback Volume
-3 to -21 dB/3dB step, and -
7 Microphone Volume
Internal Microphone Volume
0 to -18 dB/3dB step, and -
8
0 to -87dB/1dB step, and -
Cch/Sch Master Volume
9 Bypass Switch
Bypass the decode circuit
10 Output Mute
Mute the Lch and Rch output
11 MCU Interface
Controlled by 3-lines serial data from MCU
Including the Chip Address (2 bit)
12 Current control oscillation circuit
Including the oscillation circuit without
external parts.
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ELECTRIC
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M62463AFP
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Dolby Pro Logic Surround Decoder
ABSOLUTE MAXIMUM RATINGS
(Ta=25 C Unless otherwise noted)
Symbol
Vcc
Vdd
Pd
Topr
Tstg
Parameter
Conditions
Ratings
10.5
6.5
Unit
V
V
1
W
-20 to +75
C
-40 to +125
C
Supply Voltage
Power
Dissipation
Operating
Temperature
Storage
Temperature
RECOMMENDED OPERATING CONDITION
Symbol
Vcc
Parameter
Condition
Supply Voltage
Vdd
Min
Limits
Typ
Max
8
9
10
V
4.5
5
5.5
V
Units
VIL
Input Voltage(L)
14,15,16pin
0
0.8
V
VIH
Input Voltage(H)
14,15,16pin
Vdd-1
Vdd
V
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ELECTRIC
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MITSUBISHI SOUND PROCESSORS
M62463AFP
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Dolby Pro Logic Surround Decoder
ELECTRICAL CHARACTERISTICS
(Ta=25 C,Vcc=9V,Vdd=5V ,Cch volume=0dB,at C-OUT 0dBd=300mVrms,f=1kHz unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Min
Typ
Max
Units
Total
Icc
Circuit current
No signal
25
40
mA
Circuit current
Auto-Balance
No signal
13
25
mA
IDD
CPR
CER
Capture range
Error collection
5
4
dB
dB
Adaptive Matrix
VoL
MR
Output level accuracy relative to Cch
L, R, Sch output
Matrix rejection
L, R, C, Sch output
-0.5
25
0
40
HRAM
L, R, C, Sch output
15
17
THDAM
Head room
Total harmonic distortion
SNAM
S/N ratio
Rg=0Ω,weighted CCIR/ARM 4ch mode
Noise Sequencer
Vno
Output noise level
Vno
Noise level accuracy relative to Cch
0.5
dB
dB
dB
0.2
%
70
0.05
80
L, R, C, Sch output
-15
-12.5
-10
dB
L, R, Sch output
-0.5
0
0.5
dB
L, R, Cch output
30kHzLPF
Modified B Noise Reduction (Sch Volume=0dB, 0dB reference is 300mVrms/100Hz at S-Out)
Gain between input and output
5.1
Vin=0dBd,f=100Hz
VGNR
DEC1
Vin=0dBd,f=1.0kHz
-0.1
-1.6
Decode character 1
DEC2
Decode character 2
Vin=-15dBd,f=1.4kHz
-3.0
-1.5
DEC3
DEC4
Decode character 3
Vin=-20dBd,f=1.4kHz
-4.9
-6.8
-3.4
THDNR
HRNR
SNNR
Decode character 4
Total harmonic distortion
Vin=-40dBd,f=5.0kHz
Vin=0dBd,f=1kHz 30kHzLPF
-5.3
0.07
dB
dB
1.4
0
-1.9
-3.8
0.3
dB
%
Head room
THD=1%
15
17
dB
S/N ratio
Rg=0Ω ,weighted CCIR/ARM
68
78
dB
Cch/Sch Master Volume
ATTmax
Maximum attenuator
ATTmin
Minimum attenuator
-95
-87
dB
0
3.0
dB
0.5
0.2
1.0
1.0
1.5
1.8
dB
68
83
ATT=-∞,Vi=2Vrms
-3.0
ATT=0dB
VOLS1
VOLS2
Volume step
Volume step
CTVOL
Volume cross-talk
ATT=0 to -40dB
ATT=-40 to -87dB
R input/CVOL,SVOL output
VnoVOL
Output noise voltage
ATT=-∞
dB
dB
2.6
5.2
µVrms
0.002
0.05
%
Line(Bypass mode)
THDLN
Total harmonic distortion
SNLN
S/N ratio
CTLN
Line cross-talk
Input impedance
Zi
L,Rch output
30kHzLPF
L,Rch output
L input/R output , R input/L output
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ELECTRIC
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95
100
dB
70
11
80
22
dB
kΩ
44
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MITSUBISHI SOUND PROCESSORS
M62463AFP
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Dolby Pro Logic Surround Decoder
(Ta=25 C,Vcc=9V,Vdd=5V ,Vin=200mVrms,f=1kHz unless otherwise noted)
Symbol
Parameter
Min
Limits
Typ
-8.1
-5.1
-2.1
dB
17.4
20.5
23.6
ms
Td=20.5ms
0.5
0.9
Td=51.2ms
1.2
2.2
Td=184ms
3.0
5.6
Td=20.5ms
-92
-80
Td=51.2ms
-84
-70
Td=184ms
-80
-65
Test Conditions
Max
Units
Digital Delay
GvD
Td
THDD
NoD
Input/output voltage gain LIN-LPF2OUT,surround L-R
Td=20.5ms
Delay time
Total harmonic distortion
Output noise voltage
30kHzLPF
Vin=0Vrms
JIS-A
Vomax
Maximum output voltage
THD=10%
LPFfc
LPF cut-off frequency
Td=15.4 to 51.2ms
Gv=-3dB (Dolby Pro Logic mode)
Td=123, 184ms(Echo mode)
Gv=-3dB
0.7
1.0
6.0
7.0
%
dBV
Vrms
8.0
kHz
kHz
3.0
Feedback Volume
FBATTmax
Maximum attenuation
ATT=-∞
FBATTmin
Minimum attenuation
ATT=-3dB
FBVOLS
Volume step
-6.0
-70
-60
dB
-3.0
0
dB
dB
3.0
Microphone Volume
MICATTmax
Maximum attenuation
ATT=-∞
MICATTmin
Minimum attenuation
ATT=0dB
MICVOLS
Volume step
VnoMIC
Output noise voltage
-3.0
-70
-60
dB
0
3.0
dB
dB
3.0
ATT=-∞
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2.0
4.0
µVrms
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M62463AFP
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Dolby Pro Logic Surround Decoder
SERIAL DATA CONTROL FORMAT
(1)Data Input Format
DATA is read at the rising edge of SCK, and loaded last 16 bits at the
rising edge of REQ.
DATA
D0
D1
D2
D3
D4
D5
D6
D7 D8
D9
D10 D11 D12 D13 D14 D15
"H"
SCK
REQ
D0
D1
L
D2 D3 D4 D5
Mode
Set
Pro
Logic
Mode
Center
Mode
L
H
Delay
Time
L
Noise
Sequencer
D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
AutoBalance
Sch Volume
set
to
"L"
L
H
Chip
Address
Cch Volume
Surround / Echo
Mode
H
H
Test Mode (user inhibit)
(2)Control condition
Control Mode
Contents
Normal Stereo / Dolby Pro Logic /
Space Surround or Echo/ Mute
1
Mode Set
2
Pro Logic Mode
4ch Pro Logic / 3ch stereo
3
Center Mode
Wide / Normal / Phantom / OFF
4 Delay Time
15.4, 20.5, 25.6, 29.2, 51.2 ms (for Surround)
123,184 ms
(for Echo)
5
Input Auto-Balance
Auto-Balance
6 Noise Sequencer
7 Surround /Echo mode
8
Cch/Sch Volume
9
Chip Address
ON / OFF
ON / OFF
Lch / Rch / Cch / Sch
Delay input L-R/ (L+R)/2 /MICin
Feedback volume , Microphone volume
Delay output mixing
0 to -87dB / 1dB step and Input data effect or not
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MITSUBISHI SOUND PROCESSORS
M62463AFP
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Dolby Pro Logic Surround Decoder
(3)Set Conditions
Mode Setting (D0="L",D1="L")
Condition
D2
D3
L
L
Normal stereo (bypass)
L
H
Dolby Pro Logic Surround
H
L
Space surround / Echo
H
H
Output Mute
Pro Logic Mode Setting(D0="L",D1="L")
Condition
D4
L
4ch Pro Logic
H
3ch Stereo
Center Mode Setting (D0="L",D1="L")
Condition
D5
D6
L
L
Wide
L
H
Normal
H
L
Phantom
H
H
OFF
Delay Time Setting (D0="L,D1="H")
D2
D3
D4
Delay time
Sampling frequency
L
L
L
L
L
15.4msec
H
20.5msec
500kHz
500kHz
L
L
H
L
25.6msec
400kHz
H
H
29.2msec
333kHz
H
L
L
51.2msec
200kHz
H
L
H
123msec
83.3kHz
H
H
L
184msec
55.6kHz
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ELECTRIC
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LPF cutoff
frequency
7kHz
3kHz
PR
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MITSUBISHI SOUND PROCESSORS
M62463AFP
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Dolby Pro Logic Surround Decoder
Auto-Balance Setting (D0="L",D1="H")
Condition
D5
L
Auto-Balance OFF
H
Auto-Balance ON
Noise Sequencer (D0="H",D1="L")
D2
L
H
D3
Condition
D4
Noise Sequencer OFF
-
-
L
L
L
H
H
L
Cch
H
H
Sch
Lch
Noise Sequencer ON
Rch
Surround / Echo mode (D0="H",D1="L")
Surround / Echo mode switch
D5
Condition
L
Surround
H
Echo
Delay input
D6
Delay Mixing polarity
Delay input
D7
Mixing polarity
L
L-R
L
L+Delay signal/R+Delay signal
H
(L+R )/2
H
L+Delay signal/R-Delay signal
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ELECTRIC
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MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
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Notice r;ametric limits
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some
Dolby Pro Logic Surround Decoder
Feedback Volume
D8
L
L
L
L
H
H
H
H
D9 D10
L
L
H
H
L
L
H
H
Microphone Volume
D11 D12 D13
Volume
L
-3dB
H
L
H
L
-6dB
-9dB
-12dB
-15dB
H
L
H
-18dB
-21dB
-∞
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
volume
L
0dB
H
L
H
L
-3dB
-6dB
-9dB
-12dB
H
L
H
-15dB
-18dB
-∞
Relation between mode setting and switch condition
Mode Setting
Normal stereo
(bypass)
Dolby Pro Logic Surround
Space surround
/ Echo
Pro Logic Surround/Echo Mode
Mode
(D0=H,D1=L)
(D0=L,D1=L)
D4
D5
D6
X
X
X
1
1
2
4
OFF
2
L
H
X
X
3
3
1
2
1
OFF
2
L
L
H
2
2
1
2
3
ON
2
2
4
OFF
1
2
4
OFF
2
X
X
Mute
Switch Condition
X
(Surround)
H
(Echo)
X
X
X
X:L or H
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SW1 SW2 SW3 SW4 SW5 SW6
Delay mixing ON
1
1
Delay mixing OFF
4
4
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MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
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Notice r;ametric limits
a
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some
Dolby Pro Logic Surround Decoder
Sch Volume Setting (D0="L",D1="L")
Cch Volume Setting (D0="L",D1="H")
Volume Level
D7
D8
D9
D10
D11
Volume
Level
0 dB
-2 dB
-4 dB
-6 dB
-8 dB
-10 dB
-12 dB
-14 dB
-16 dB
-18 dB
-20 dB
-22 dB
-24 dB
-26 dB
-28 dB
-30 dB
-32 dB
-34 dB
-36 dB
-40 dB
-44 dB
-48 dB
-52 dB
-56 dB
-60 dB
-64 dB
-68 dB
-72 dB
-76 dB
-80 dB
-84 dB
-
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
0 dB
-1 dB
-2 dB
-3 dB
Chip Address
D14
D15
L
H
Others
Data Read
Enable
Unable
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D12
D13
L
L
H
H
L
H
L
H
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final sp
to
MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
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Notice r;ametric limits
a
p
some
Dolby Pro Logic Surround Decoder
(4)Data timing
t1,t2
90%
DATA
10%
t6
t7
t1
t4
t2
90%
SCK
10%
t10
t5
t9
t8
t3
90%
REQ
10%
t1
Symbol
Name
Min
Typ
t2
Max
t1
t2
t3
Signal rise time
0.5
Units
µs
Signal fall time
0.5
µs
t4
t5
t6
SCK clock width
2
µs
SCK "H" pulse width
0.8
µs
SCK "L" pulse width
0.8
µs
DATA setup time
0.8
µs
t7
t8
DATA hold time
0.8
REQ rise hold time
1.6
µs
µs
t9
t10
REQ "H" pulse width
0.8
µs
SCK setup time
1.6
µs
MITSUBISHI
ELECTRIC
( 13 / 17 )
PR
ReY
A
n.
N
I
cificaticohange.
M
I
EL
final sp
to
MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
a
This is n
Notice r;ametric limits
a
p
some
Dolby Pro Logic Surround Decoder
Level Diagram
(1)Dolby Pro Logic Surround Mode
Cch
LIN
INPUT
BALANCE
CENTER
MODE
CONTROL
ADAPTIVE
MATRIX
RIN
Signal level
-3dB
0dB
VOLUME(ATT=0dB)
Ladder
Buffer
-2.5dB
0dB
CVOLOUT
Vref=4.5V
Vref=2.5V
Sch
S'
LIN
INPUT
BALANCE
ADAPTIVE
MATRIX
1
SW4
DIGITAL
DELAY
Modified
BNR
1
SW3
RIN
Signal level
-3dB
0dB
-5.1dB
-5.1dB
0dB
VOLUME(ATT=0dB)
Ladder
Buffer
-2.5dB
0dB
SVOLOUT
Vref=4.5V
Vref=2.5V
Vref=2.5V
Lch,Rch
LIN
INPUT
BALANCE
ADAPTIVE
MATRIX
RIN
Signal level
CENTER
MODE
CONTROL
LOUT
ROUT
0dB
Vref=4.5V
Signal level : 0dB=300mVrms(Typ.)
MITSUBISHI
ELECTRIC
( 14 / 17 )
PR
ReY
A
n.
N
I
cificaticohange.
M
I
EL
final sp
to
MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
a
This is n
Notice r;ametric limits
a
p
some
Dolby Pro Logic Surround Decoder
(2)Space Surround Mode
Sch
SW4
LIN
L-R
2
RIN
(L+R)/2
3
Signal level
0dB
DIGITAL
DELAY
-5.1dB
Modified
BNR
-5.1dB
SW3
0dB
VOLUME(ATT=0dB)
Ladder
Buffer
-2.5dB
0dB
SVOLOUT
Vref=4.5V
Vref=2.5V
Vref=2.5V
(3)Echo Mode
SW4
MICIN
DIGITAL
DELAY
4
0dB
Signal level
Vref=2.5V
MIC
VOLUME
(ATT=0dB)
0dB
MICOUT
Signal level
Signal level : 0dB=300mVrms(Typ.)
Vref=2.5V
Notice
Relation AVcc and DVdd at power supply
Digital Vdd must be supplied less than 0.7 seconds from analog Vcc supply.
AVcc
(AVccÅÑDVdd)
DVdd
Internal
reset signal
automatic reset cancel
0.7s(min.)
MITSUBISHI
ELECTRIC
( 15 / 17 )
PR
ReY
A
n.
N
I
cificaticohange.
M
I
EL
final sp
to
MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
a
This is n
Notice r;ametric limits
a
p
some
Dolby Pro Logic Surround Decoder
APPLICATION EXAMPLE
R18
4.7k
CA18
0.01µ
MICout
17
18
19
C18
C19 0.22µ
1µ
C20
4700p
20
0.1µ
22
0.1µ
C21
1000p
0.1µ
24
C25
26
27
28
29
30
C33
1µ
31
32
C32
1µ
C26
23
0.1µ
C29
4700p
25
C30
1000p
C23
21
C27
MCU
16
15
14
9
8
C
R
2
C3 10µ
61
1
L
60
C1 10µ
C58
10µ
100µ
Lin Rin
AVcc
+9V
MITSUBISHI
ELECTRIC
( 16 / 17 )
64
63
62
58
57
56
55
IREF
C59
C57
10µ
C2 10µ
22kΩ
R54 75k
54
53
C54 0.01µ
VREF
C60
220µ
C56 0.01µ
RA53 150k R53 47k
52
S
6
5
4
3
1
SEQUENCER
BPF
R52 75k
C53 680p
51
C52 0.01µ
RA51 150k R51 47k
C55 0.01µ
C51 680p
50
49
4
Cout
Rout
NOISE
59
48
C4
10µ
1
SW1
22kΩ
C50
0.1µ
4
VOL
3
2
AVcc
FULL WAVE
RECTIFIER
BPF
Sout
7
VOL
R C
SW2
SELECTOR
46
47
L+R L-R
C8 10µ
C6
10µ
SERVO
AUTO
BALANCE
VCA
LOG
DIFFERENCE
AMPLIFIERS
C9 0.1µ
3
2
C46 0.1µ
C49
0.022µ
13
10
C10 100µ
C45 0.047µ
C48 0.022µ
REQ
L+R
2
L
L
43
44
VCA
CONTROL
CENTER MODE
C
R
42
COMBINING
C43 0.1µ
C47 0.1µ
MICin
3
1
2
NETWORKS
45
2
SW3
C42 0.22µ
C44 0.047µ
4
L-R
S'
C41 0.22µ
AGND
DUAL-TIME CONSTANT
AND THRESHOLD SWITCHES
41
C40 4.7µ
SW4
C13
0.1µ
C12 1µ
1
2
1
DVdd
+5V
12
37
38
39
40
C39 4.7µ
SCK
SW6
SW5
C37 0.22µ
C38 0.22µ
MIC
VOL
11
F.B.
VOL
C36 0.68µ
DATA
LOGIC
DVdd
10Kbit
SRAM
LPF
36
R36 330k
A/D
CLK
MODIFIED
B-TYPE
NR DECODER
34
33
C35 0.047µ
35
C34 5600p
D/A
MCU interface
DVss
LPF
R61
100k
C64
47µ
C62 R63 C63
4.7µ 100k 6800p
Units
Resistance : Ω
Capacitance : F
Lout
PR
ReY
A
n.
N
I
cificaticohange.
M
I
EL
final sp
to
MITSUBISHI SOUND PROCESSORS
M62463AFP
ot a re subject
a
This is n
Notice r;ametric limits
a
p
some
Dolby Pro Logic Surround Decoder
EXTERNAL PARTS LIST
Parts No.
C1
C2
C3
C4
C6
C8
C9
C10
C12
C13
C18
CA18
C19
C20
C21
C23
C25
C26
C27
C29
C30
C32
C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
Values
Unit
10
10
10
10
10
10
0.1
100
10
0.1
0.22
0.01
1.0
4700
1000
0.1
0.1
0.1
0.1
4700
1000
1.0
1.0
5600
0.047
0.68
0.22
0.22
4.7
4.7
0.22
0.22
0.1
0.047
0.047
0.1
µF
µF
µF
µF
µF
µF
µF
Tol.
10%
µF
µF
µF
µF
µF
µF
pF
pF
µF
µF
µF
µF
µF
pF
µF
µF
non-polar
pF
µF
µF
pF
pF
µF
µF
5%
5%
10%
10%
10%
20%
20%
10%
10%
20%
5%
5%
20%
µF
µF
µF
µF
µF
µF
5%
5%
5%
5%
5%
5%
5%
5%
Parts No.
Values
Unit
C47
C48
C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C62
C63
C64
0.1
0.022
0.022
µF
µF
µF
µF
pF
µF
pF
µF
µF
µF
µF
µF
µF
µF
µF
pF
µF
20%
5%
5%
20%
5%
5%
5%
5%
5%
5%
R18
R36
R51
RA51
R52
R53
RA53
R54
R61
R63
4.7
330
47
150
75
47
150
75
100
100
kΩ
kΩ
kΩ
kΩ
kΩ
10%
10%
5%
5%
5%
5%
5%
5%
1%
5%
MITSUBISHI
ELECTRIC
( 17 / 17 )
0.1
680
0.01
680
0.01
0.01
0.01
10
10
100
220
4.7
6800
47
kΩ
kΩ
kΩ
kΩ
kΩ
Tol.
10%
5%