Order this document by MC12034A/D The MC12034A can be used with CMOS synthesizers requiring positive edges to trigger internal counters such as Motorola’s MC145xxx series in a PLL to provide tuning signals up to 2.0 GHz in programmable frequency steps. The MC12034B can be used with CMOS synthesizers requiring negative edges to trigger internal counters such as Fujitsu’s MB87001. A Divide Ratio Control (SW) permits selection of a 32/33 or 64/65 divide ratio as desired. The Modulus Control (MC) selects the proper divide number after SW has been biased to select the desired divide ratio. • 2.0 GHz Toggle Frequency • • • • • MECL PLL COMPONENTS ÷32/33, ÷64/65 DUAL MODULUS PRESCALER SEMICONDUCTOR TECHNICAL DATA Supply Voltage 4.5 to 5.5 V MC12034A for Positive Edge Triggered Synthesizers 12mA Maximum, –40 to 85°C, VCC = 5.5 Vdc 8 1 Modulus Control Input is Compatible with Standard CMOS and TTL Low–Power 8.5 mA Typical D SUFFIX PLASTIC PACKAGE CASE 751 (SO–8) FUNCTIONAL TABLE SW MC Divide Ratio H H 32 H L 33 L H 64 L L 65 NOTES: 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin, but this is not recommended due to increased power consumption. 2. MC: H = 2.0 V to VCC, L = GND to 0.8 V. Value Unit Internal Gate Count * Design Criteria 67 ea Internal Gate Propagation Delay 200 ps Internal Gate Power Dissipation 0.75 mW Speed Power Product 0.15 pJ NOTE: 8 1 P SUFFIX PLASTIC PACKAGE CASE 626 *Equivalent to a two–input NAND gate. PIN CONNECTIONS MAXIMUM RATINGS Characteristic Power Supply Voltage, Pin 2 Operating Temperature Range Storage Temperature Range Modulus Control Input, Pin 6 Symbol Range Unit VCC TA –0.5 to +7.0 Vdc –40 to +85 °C Tstg MC –65 to +150 °C –0.5 to +6.5 Vdc IN VCC SW OUT 1 8 2 7 3 6 4 5 IN NC MC Gnd (Top View) NOTES: 1. ESD data available upon request. 2. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND ≤ (Vin or Vout) ≤ VCC. ORDERING INFORMATION Operating Temp Range Device MC12034AD MC12034AP MC12034BD Package SO–8 TA = –40° to +85°C MC120348BP Motorola, Inc. 1997 Plastic SO–8 Plastic Rev 3 MC12034A MC12034B ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5 Vdc, TA = –40 to 85°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit ft 0.5 2.4 2.0 GHz ICC VIH1 VIL1 – 8.5 12 mA 2.0 – V – – VCC 0.8 VIH2 VIL2 VCC OPEN VCC OPEN VCC OPEN Vdc 1.0 1.6 – – 8.0 10.0 Vpp ns Input Voltage Sensitivity 500–2000 MHz Vout tSET Vin 100 – 1500 mVpp Output Current (CL = 12 pF, RL = 1.1 kΩ) IO – – 3.5 mA Toggle Frequency (Sine Wave) Supply Current Output Unloaded (Pin 2) Modulus Control Input High (MC) Modulus Control Input Low (MC) Divide Ratio Control Input High (SW) Divide Ratio Control Input Low (SW) Output Voltage Swing (CL = 12 pF, RL = 1.1 kΩ) Modulus Setup Time MC to Out Figure 1. Logic Diagram (MC12034A) D Q D A C In In Q D B QB C V – Figure 2. Modulus Setup Time Q PROP. DELAY C QB C M QB IN OUT MC MC MC SETUP D Q D D C QB D E QB C Q D F Q C QB G QB C D MC RELEASE QB H Q C S Q Out Modulus setup time MC to out is the MC setup or MC release plus the prop. delay. SW Figure 3. Typical Output Waveform 500 m ≈ 2 20 ns MOTOROLA RF/IF DEVICE DATA MC12034A MC12034B Figure 4. AC Test Circuit VCC = 4.5 Vdc to 5.5 Vdc C3 SINE WAVE GENERATOR C1 VCC SW IN 50 Ω OUT C2 RL IN MC CL EXTERNAL COMPONENTS C1 = C2 = 1000 pF C3 = 0.1 µF CL = 12 pF (INCLUDING SCOPE CL = AND JIG CAPACITANCE) RL = 1.1 kΩ GND MC INPUT 1250.0 10 710.0 5 400.0 0 225.0 –5 125.0 –10 71.0 –15 40.0 –20 22.5 –25 12.8 –30 7.10 –35 4.00 –40 2.25 –45 1.25 –50 0 mVrms AMPLITUDE (dBm) Figure 5. Input Signal Amplitude versus Input Frequency 15 0.71 260 520 780 1040 1300 1560 1820 2080 2340 2600 FREQUENCY (MHz) Divide Ratio = 65 Figure 6. Output Amplitude versus Input Frequency 2000 1200 800 0 260 520 780 1040 1300 1560 1820 2080 2340 2600 mVpp 1600 400 0 FREQUENCY (MHz) MOTOROLA RF/IF DEVICE DATA 3 MC12034A MC12034B OUTLINE DIMENSIONS 8 P SUFFIX PLASTIC PACKAGE CASE 626–05 ISSUE K 5 –B– 1 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 4 F –A– NOTE 2 L DIM A B C D F G H J K L M N C J –T– N SEATING PLANE D M K G H 0.13 (0.005) T A M B M 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 5 0.25 H E M B M 1 4 h B X 45 _ e q A C SEATING PLANE L 0.10 A1 B 0.25 C B M S A INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 10_ 0.030 0.040 M D SUFFIX PLASTIC PACKAGE CASE 751–06 (SO–8) ISSUE T D A MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 10_ 0.76 1.01 S DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ Motorola reserves the right to make changes without further notice to any products herein. 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