MOTOROLA SN54LS85

SN54/74LS85
4-BIT MAGNITUDE
COMPARATOR
The SN54/ 74LS85 is a 4-Bit Magnitude Camparator which compares two
4-bit words (A, B), each word having four Parallel Inputs (A0 – A3, B0 – B3); A3,
B3 being the most significant inputs. Operation is not restricted to binary
codes, the device will work with any monotonic code. Three Outputs are
provided: “A greater than B” (OA > B), “A less than B” (OA < B), “A equal to B”
(OA = B). Three Expander Inputs, IA > B, IA < B, IA = B, allow cascading without
external gates. For proper compare operation, the Expander Inputs to the
least significant position must be connected as follows: IA < B= IA > B = L, IA = B
= H. For serial (ripple) expansion, the OA > B, OA < B and OA = B Outputs are
connected respectively to the IA > B, IA < B, and IA = B Inputs of the next most
significant comparator, as shown in Figure 1. Refer to Applications section of
data sheet for high speed method of comparing large words.
The Truth Table on the following page describes the operation of the
SN54 / 74LS85 under all possible logic conditions. The upper 11 lines describe
the normal operation under all conditions that will occur in a single device or
in a series expansion scheme. The lower five lines describe the operation
under abnormal conditions on the cascading inputs. These conditions occur
when the parallel expansion technique is used.
• Easily Expandable
• Binary or BCD Comparison
• OA > B, OA < B, and OA = B Outputs Available
4-BIT MAGNITUDE
COMPARATOR
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC
16
A3
15
B2
14
A2
13
A1
12
B1
11
A0
10
B0
9
D SUFFIX
SOIC
CASE 751B-03
16
1
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
1
B3
2
3
IA<B IA=B
ORDERING INFORMATION
SN54LSXXJ
SN74LSXXN
SN74LSXXD
8
4
5
6
7
IA>B OA>B OA=B OA<B GND
Ceramic
Plastic
SOIC
LOGIC SYMBOL
PIN NAMES
LOADING (Note a)
HIGH
A0 – A3, B0 – B3
IA = B
IA < B, IA > B
OA > B
OA < B
OA = B
Parallel Inputs
A = B Expander Inputs
A < B, A > B, Expander Inputs
A Greater Than B Output (Note b)
B Greater Than A Output (Note b)
A Equal to B Output (Note b)
1.5 U.L.
1.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
10 U.L.
10 12 13 15 9 11 14 1
LOW
0.75 U.L.
0.75 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
FAST AND LS TTL DATA
5-84
4
2
3
A0 A1 A2 A3 B0 B1 B2 B3
OA>B
IA>B
OA<B
IA<B
OA=B
IA=B
VCC = PIN 16
GND = PIN 8
5
7
6
SN54/74LS85
LOGIC DIAGRAM
A3 (15)
B3
(1)
(5)
OA>B
A2
B2
(13)
(14)
(2)
A<B
(3)
A=B (4)
A>B
A1
B1
(6)
OA=B
(12)
(11)
(7)
OA<B
A0
B0
(10)
(9)
TRUTH TABLE
CASCADING
INPUTS
COMPARING INPUTS
A3,B3
A3>B3
A3<B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A2,B2
A1,B1
A0,B0
X
X
A2>B2
A2<B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
X
X
X
X
A1>B1
A1<B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
X
X
X
X
X
X
A0>B0
A0<B0
A0=B0
A0=B0
A0=B0
A0=B0
A0=B0
IA>B
X
X
X
X
X
X
X
X
H
L
X
H
L
IA<B
X
X
X
X
X
X
X
X
L
H
X
H
L
IA=B
X
X
X
X
X
X
X
X
L
L
H
L
L
OUTPUTS
OA>B
OA<B
OA=B
H
L
H
L
H
L
H
L
H
L
L
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
H = HIGH Level
L = LOW Level
X = IMMATERIAL
GUARANTEED OPERATING RANGES
Min
Typ
Max
Unit
VCC
Symbol
Supply Voltage
Parameter
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
– 55
0
25
25
125
70
°C
IOH
IOL
Output Current — High
54, 74
– 0.4
mA
Output Current — Low
54
74
4.0
8.0
mA
FAST AND LS TTL DATA
5-85
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
IA < B
SN54/74LS85 OA < B
OA = B
IA = B
L
L
H
Bn
B n1
B n2
B n3
An
A n1
A0 A1 A2 A3 B0 B1 B2 B3
A n2
A n3
SN54/74LS85
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
SN54/74LS85 OA < B
OA = B
IA = B
A>B
A<B
A=B
L = LOW LEVEL
H = HIGH LEVEL
Figure 1. Comparing Two n-Bit Words
APPLICATIONS
Figure 2 shows a high speed method of comparing two 24-bit words with only two levels of device delay. With the technique
shown in Figure 1, six levels of device delay result when comparing two 24-bit words. The parallel technique can be expanded
to any number of bits, see Table 1.
Table 1
WORD LENGTH
NUMBER OF PKGS.
1 – 4 Bits
5 – 24 Bits
25 – 120 Bits
1
2–6
8 – 31
NOTE:
The SN54/74LS85 can be used as a 5-bit comparator
only when the outputs are used to drive the A0–A3 and
B0–B3 inputs of another SN54/74LS85 as shown in
Figure 2 in positions #1, 2, 3, and 4.
INPUTS
(LSB)
A0 A1 A2 A3 B0 B1 B2 B3
L
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
#5
OA < B
IA < B
H
IA = B
L
(MSB)
A20 A21 A22 A23 B20 B21 B22 B23
A19
B19
L
OA = B
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
#1
OA < B
IA = B
OA = B
NC
INPUTS
A5 A6 A7 A8 B5 B6 B7 B8
A4
B4
L
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
#4
IA < B
OA < B
IA = B
OA = B
A15 A16 A17 A18 B15 B16 B17 B18
A10 A11 A12 A13 B10 B11 B12 B13
A9
B9
NC
L
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
#3
OA < B
IA < B
IA = B
OA = B
A14
B14
NC
L
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
#2
OA < B
IA < B
IA = B
OA = B
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
OA < B
#6
IA = B
OA = B
MSB = MOST SIGNIFICANT BIT
LSB = LEAST SIGNIFICANT BIT
L = LOW LEVEL
H = HIGH LEVEL
NC = NO CONNECTION
Figure 2. Comparison of Two 24-Bit Words
FAST AND LS TTL DATA
5-86
OUTPUTS
NC
SN54/74LS85
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
Min
Typ
Unit
2.0
54
V
V
Guaranteed Input LOW Voltage for
All Inputs
V
VCC = MIN, IIN = – 18 mA
0.8
– 0.65
– 1.5
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
0.7
74
54
2.5
3.5
V
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
54, 74
0.25
0.4
V
IOL = 4.0 mA
74
0.35
0.5
V
IOL = 8.0 mA
20
60
µA
VCC = MAX, VIN = 2.7 V
mA
VCC = MAX, VIN = 7.0 V
– 0.4
– 1.2
mA
VCC = MAX, VIN = 0.4 V
–100
mA
VCC = MAX
20
mA
VCC = MAX
Input HIGH Current
A < B, A > B
Other Inputs
IIH
Max
A < B, A > B
Other Inputs
0.1
0.3
IIL
Input LOW Current
A < B, A > B
Other Inputs
IOS
Output Short Circuit Current (Note 1)
ICC
Power Supply Current
– 20
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
tPLH
tPHL
Any A or B to A < B, A > B
24
20
36
30
ns
tPLH
tPHL
Any A or B to A = B
27
23
45
45
ns
tPLH
tPHL
A < B or A = B to A > B
14
11
22
17
ns
tPLH
tPHL
A = B to A = B
13
13
20
26
ns
tPLH
tPHL
A > B or A = B to A < B
14
11
22
17
ns
Test Conditions
VCC = 5.0 V
CL = 15 pF
AC WAVEFORMS
VIN
1.3 V
1.3 V
tPHL
VOUT
1.3 V
VIN
1.3 V
1.3 V
tPHL
tPLH
1.3 V
VOUT
Figure 3
1.3 V
Figure 4
FAST AND LS TTL DATA
5-87
tPLH
1.3 V