www.fairchildsemi.com FAN7310 LCD Back Light Inverter Drive IC Features Description • • • • • • • • • • The FAN7310 provides all the control functions for a series parallel resonant converter and also contains a pulse width modulation (PWM) controller to develop a supply voltage. Typical operating frequency range is between 30kHz and 250kHz depending on the CCFL and the transformer's characteristics. The FAN7310 has a patent-pending on new phase-shift control. High Efficiency Single Stage Power Conversion Wide Input Voltage Range 5V to 24V Back Light Lamp Ballast and Soft Dimming Reduce External Components Precision Voltage Reference Trimmed to 2% ZVS full-bridge topology Soft Start PWM Control at fixed frequency Analog and Burst Dimming Function Synchronizable Switching Frequency With An External Signal • Open Lamp Protection • Open Lamp Regulation • 20 Pin SSOP 20-SSOP 1 Rev. 1.0.2 ©2005 Fairchild Semiconductor Corporation FAN7310 Internal Block Diagram RT OUTA OSCILLATOR Output Driver max. 2V OUTB CT min. 0.5V Output Control Logic + S_S + SYNC PGND OUTC Output Driver OUTD EA_OUT Error Amp. 6uA S_S + ADIM + 1.4uA UVLO SET S Q EA_IN OLP + Q - CLR R 2V 2.7V UVLO + Solr - Sburst 85uA Voltage Reference & Internal Bias max. 2V min. 0.5V BCT + REF + - 1.4V VIN UVLO - 2 ENA VIN + AGND 2V 2.5VREF Sburst BDIM OLR Solr 105uA UVLO 5V FAN7310 Pin Assignments SYNC OUTB OUTA VIN PGND OUTC OUTD CT RT BCT 20 19 18 17 16 15 14 13 12 11 9 10 FAN7310 1 2 3 4 5 6 7 8 OLP OLR ENA S_S GND REF ADIM BDIM EA_IN EA_OUT Pin Definitions No Name 1 OLP Function Description No Name Open Lamp Protection 11 BCT Function Description Burst Dimming Timing Capacitor 2 OLR Open Lamp Regulation 12 RT Timing Resistor 3 ENA Enable Input 13 CT Timing Capacitor 4 S_S Soft Start 14 OUTD NMOSFET Drive Output D 5 GND Analog Ground 15 OUTC PMOSFET Drive Output C 6 REF 2.5V Reference Voltage 16 PGND Power Ground 7 ADIM Analog Dimming Input 17 VIN Supply Voltage 8 BDIM Burst Dimming Input 18 OUTA PMOSFET Drive Output A 9 EA_IN Error Amplifier Input 19 OUTB NMOSFET Drive Output B 10 EA_OUT Error Amplifier Output 20 SYNC Sychronization Input/Output 3 FAN7310 Absolute Maximum Ratings For typical values Ta=25°C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with -25°C ≤ Ta ≤ 85°C and 5V ≤ Vcc ≤ 24V, unless otherwise specified. Characteristics Symbol Value Unit Supply Voltage VCC 5 ~ 24 V Operating Temperature Range Topr -25 ~ 85 °C Storage Temperature Range Tstg -65 ~ 150 °C Thermal Resistance Junction-Air (Note1,2) RθJA 112 °C/W Pd 1.1 W Power Dissipation Note: 1. Thermal resistance test board Size: 76.2mm * 114.3mm * 1.6mm(1S0P) JEDEC standard: JESD51-3, JESD51-7 2. Assume no ambient airflow 4 FAN7310 Electrical Characteristics For typical values Ta=25°C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with -25°C ≤ Ta ≤ 85°C and 5V ≤ Vcc ≤ 24V, unless otherwise specified. Characteristics Symbol Test Condition Min. Typ. Max. Unit - 2 25 mV 2.45 2.5 2.55 V Ta = 25°C, Ct = 270pF Rt = 18k 108 115 122 Ct = 270pF, Rt = 18k 106 115 124 REFERENCE SECTION ( Recommend X7R Capacitor ) Line Regulation 2.5V Regulation Voltage ∆Vref 5 ≤ VCC ≤ 24V V25 - OSCILLATOR SECTION(MAIN) Oscillation Frequency fosc kHz CT High Voltage Vcth - - 2.0 - V CT Low Voltage Vctl - - 0.5 - V SYNC Threshold Voltage - - 1 - V Recommeded SYNC Input Pulse Width - - 10 - % OSCILLATOR SECTION(BURST) Oscillation Frequency foscb 195 225 255 Hz BCT High Voltage Vbcth Ctb = 10nF, Rt=18k - - 2 - V BCT Low Voltage Vbctl - - 0.5 - V - 80 - dB ERROR AMP SECTION Open Loop Gain Unit Gain Bandwidth - 1.5 - MHz Feedback Output High Voltage Veh EA_IN = 0V - 2.5 - V Output Sink Current lsin EA_OUT = 1.5V - - -1 mA Output Source Current lsur EA_OUT = 1.5V 1 - - mA EA_IN Driving Current On OLR Iolr 75 105 135 uA 61 85 109 uA EA_IN Driving Current On Burst Dimming Iburst Feedback High Voltage On Burst Dimming Vfbh R(EA_IN) = 60kΩ ISS S_S=2V Va+0.1 Va+0.4 Va+0.7 V SOFT START SECTION Soft Start Current Soft Start Clamping Voltage 4 6 8 uA Vssh - - 5 - V Open Lamp Protection Voltage Volp - 1.75 2 2.25 V Open Lamp Regulation Voltage Volr - 1.75 2 2.25 V Open Lamp Protection Charging Current Iolp 0.7 1.4 2.1 PROTECTION SECTION UNDER VOLTAGE LOCK OUT SECTION Start Threshold Voltage Vth - - 5 V Start Up Current Ist VCC = Vth-0.2 - - 130 - uA Operating Supply Current Iop VCC = 12V - 1.5 - mA Stand-by Current Isb VCC = 12V - 200 - uA V ON/OFF SECTION On State Input Voltage Von - 2 - 5 Off Stage Input Voltage Voff - - - 0.7 5 FAN7310 Electrical Characteristics (Continued) For typical values Ta=25°C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with -25°C ≤ Ta ≤ 85°C and 5V ≤ Vcc ≤ 24V, unless otherwise specified. Characteristics Symbol Test Condition Min. Typ. Max. Unit - Vcc - V OUTPUT SECTION PMOS Gate High Voltage Vpdhv VCC = 12V PMOS Gate Low Voltage Vphlv VCC = 12V NMOS Gate Drive Volgate Vndhv VCC = 12V Vcc-10.5 Vcc-8.5 Vcc-6 6 8.5 10.5 NMOS Gate Drive Volgate Vndhv VCC = 12V - 0 - PMOS Gate Voltage With UVLO Activated Vpuv VCC = Vth-0.2 Vcc-0.3 - - V NMOS Gate Voltage With UVLO Activated Vnuv VCC = Vth-0.2 - - 0.3 V V Rising Time Tr VCC = 12V, Cload=2nF - 200 500 ns Falling Time Tf VCC = 12V, Cload=2nF - 200 500 ns Min. Overlap between diagonal switches fosc=100KHz - 0 - % Max. Overlap betwwen diagonal switches fosc=100KHz - 100 - % PDR_A/NDR_B Rt=18k - 450 - ns PDR_C/NDR_D Rt=18k - 450 - ns MAX./MIN OVERLAP DELAY TIME 6 FAN7310 Function Description UVLO : The under voltage lockout circuit guarantees stable operation of the IC’s control circuit by stopping and starting it as a function of the Vin value. The UVLO circuit turns on the control circuit when Vin exceeds 5V. When Vin is lower than 5V, the IC’s standby current is less than 200uA. ENA : Applying the voltage higer than 2V to ENA pin enables the operation of the IC. Applying to the voltage lower than 0.7V to ENA pin will disable the operation of the inverter. Soft start :The soft start function is provided that S_S pin is connected through a capacitor to GND. A soft start circuit ensures a gradual increase in the input and output power. The capacitor connected to S_S pin determines the rate of rise of the duty ratio. It is charged by a current source of 6uA. Burst oscillator & burst dimming :Timing capacitor BCT are charged by the reference current source, formed by the timing resistor Rt whose voltage is regulated at 1.25V. The sawtooth waveform charges up to 2V. Once reached, capacitors begin discharging down to 0.5V. Next timing capacitors start charging again and a new switching cycle begins. The burst dimming frequency can be programmed with adjusting the values of Rt and BCT. The burst dimming frequency can be calculated as below. 3.75 f burst = ----------------------------------64 R BC T T The burst dimming frequency should be greater than 120Hz to avoid visible flicker. Main oscillator : Timing capacitor CT are charged by the reference current source, formed by the timing resistor Rt whose voltage is regulated at 1.25V. The sawtooth waveform charges up to 2V. Once reached, capacitors begin discharging down to 0.5V. Next timing capacitors start charging again and a new switching cycle begins. The main frequency can be programmed with adjusting the values of Rt and CT. The main frequency can be calculated as below. To compare the input of BDIM pin with the 0.5~2V triangular wave of burst oscillator makes the PWM pulse for burst dimming. The PWM pulse controls EA_OUT’s voltage by summing 85uA into EA_IN pin. 19 f op = ------------------------------32 R T C T 7 FAN7310 Open lamp regulation & open lamp protection : It is necessary to suspend power stage operation if an open lamp occurs, because the power stage has high gain. When a voltage higher than 2V is applied to the OLR pin, the part enters the regulation mode and controls EA_OUT voltage to limit the lamp voltage by summing 105uA into the feedback node. At the same time, the OLP capacitor, connected to the OLP pin, is charged by the 1.4uA internal current source. Once reached to 2V, IC enters shut down where all the output is high. SYNC: This pin is used as the frequency synchronization. The switching frequency can be synchronized with an external control signal. The threshold voltage of this pin is 1V. A resistor should be connected between this pin and GND for the safe operation. 8 OUTPUT DRIVES: The four output drives are designed so that switches A and B, C and D never turn on simultaneously. The OUTA-OUTB pair is intended to drive one half-bridge in the external power stage. The OUTC-OUTD pair will drive the other half-bridge. FAN7310 Timing Diagram FAN7310 use the improved phase-shfit control full-brdige to drive CCFL. As a result, the temperature difference between the left leg and the right legs is almost zero. The detail timing is shown as bellow. EA_OUT CT SYNC T T1 POUT A NOUT B POUT C NOUT D 9 FAN7310 Typical Application Circuit VCC C25 100u C27 1u IC1 FAN7310 C22 1u R6 100k OLP R25 0 RT1 0 OLR OUTB ENA OUTA S_S VIN 0 10k OUTB R24 ENA R26 0 10k OUTA 10k C28 10n 0 REF R4 22k 0 C2 REF C7 TX1 C6 1u GND PGND REF OUTC ADIM OUTD BDIM CT 10u 0 M2 FDS8958A OUTC 1u(X7R) R2 56k M1 FDS8958A 0 C1 1u 0 0 OUTD C5 220p DIM(0~3.3V) CCFL 0 0 C10 15p R5 27k C21 10n R3 20k EA_IN 0 RT C3 C4 4.7n EA_OUT 0 0 0 OLR 4.7n R8 R15 100k 2k FB R9 8.2k OLR R14 C16 100k 2.2n OLP1 R1 330k Q1 KST2222 C9 1u D1 D1N4148 0 10 R22 10k D11 D1N4148 C19 2.2n 0 0 FB D4 BAV99 C14 20n 0 0 OLP OLP1 0 0 BCT 0 0 D6 BAV99 R16 1.5k 0 0 FAN7310 Mechanical Dimensions Package Dimensions in millimeters 20-SSOP 11 FAN7310 Ordering Information Product number Package Operating Temperature FAN7310G 20-SSOP -25°C ~ 85°C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 2/22/05 0.0m 001 Stock#DSxxxxxxxx © 2005 Fairchild Semiconductor Corporation