Order this document by MC33565/D The MC33565 Low Dropout Regulator is designed for computer peripheral card applications complying with the instantly available requirements as specified by ACPI objectives. The MC33565 permits glitch–free transitions from “sleep” to “active” system modes and has internal logic circuitry to detect whether the system is being powered from the motherboard main 5V power supply or the 3.3V aux supply. The MC33565 provides a regulated output voltage of 3.3V via either an internal low drop out 5.0V–to–3.3V voltage regulator or an external P–channel MOSFET, depending on the operating status of the system in which the card is installed. During normal operating mode (5V main supply available) the 3.3V output is provided from the internal low dropout regulator at an output current of 200mA. When the motherboard enters sleep mode, the MC33565 operates from the 3.3V aux supply and routes the aux current to the output via the external P–channel MOSFET bypass transistor controlled by the drive out pin. As a result, the output voltage provided to the peripheral card remains constant at 3.3V even during transitions to and from sleep mode. 200 mA INTELLIGENT LDO REGULATOR WITH SMART BYPASS CONTROL SEMICONDUCTOR TECHNICAL DATA 8 MC33565 Features: • • • • • • • • 1 Output Regulated to 2% Over Temperature Output current up to 200mA Excellent Line and Load Regulation +5 Vin Low Dropout Voltage 1 8 2 7 Drive out N/C 3 Prevents reverse current flow during sleep mode +3.3 Vin Glitch–free transfer from sleep mode to active mode Gnd MC33565 6 Sense in 5 4 +3.3 Vout N/C Compatible with Instantly Available PC systems Evaluation Kit Available: (P.N. MC33565EVK) D SUFFIX PLASTIC PACKAGE CASE 751–06 (SO–8) Simplified Block Diagram +3.3 Vin Hyst sw Comp Driver Drive out Compensation & Hysteresis External P–channel MOSFET ORDERING INFORMATION +3.3 Vout Ref & Detect Pins 2 and 5 Not Connected Device Type Package MC33565D 3.3V SO–8 5V detect Vref +3.3 Vout +5 Vin Sense in LDO External 4.7 µF cap Motorola, Inc. 1999 MOTOROLA ANALOG IC DEVICE DATA Rev 0, 6/99 1 MC33565 MAXIMUM RATINGS (TC = 25°C, unless otherwise noted) Parameter Symbol Max Value Unit Vmax 7.0 Vdc Vmin –0.5 Vdc Operating Ambient Temperature Ta –5 to +70 °C Operating Junction Temperature TJ – 5 to +150 °C Lead Temperature (Soldering, 10 seconds) TL 300 °C Tstg RθJA1 – 55 to +150 °C 180 °C/W Input Voltage, VCC Storage Temperature Range Package Thermal Resistance, Junction to Ambient NOTES: 1. Mounted on recommended minimum PCB pad on FR4, 2–oz. copper circuit board. AC ELECTRICAL SPECIFICATIONS(3) (4) Parameter Symbol Min Typ Max Unit Drive High Delay (Vin ramping up) CDrive = 1.2 nF, measured from +5 Vin = VthresHi to VDrive = 2V tDH 0.5 3.5 µS Drive Low Delay (Vin ramping down) CDrive = 1.2 nF, measured from +5 Vin = VthresLo to VDrive = 2V tDL 0.5 3.5 µS NOTES: (1.) See 5V Detect Thresholds Diagram. (2.) Recommended source impedance for 5V supply: ≤ 0.25W. This will ensure that Io x Rsource < Vhyst, thus avoiding driveout toggling during 5V detect threshold transitions. (3.) See Figure 2. Application Block Diagram. (4.) See Timing Diagram. PIN ASSIGNMENTS AND FUNCTIONS PIN # PIN NAME 1 +5 Vin 2,5 N/C 3 +3.3 Vin PIN DESCRIPTION This is the input supply for the IC. Typical voltage 5 V. (1) (2) Reserved Auxiliary input. Typical voltage 3.3 V. 4 Gnd 6 Sense in Logic and Power Gnd. Load–sense voltage input to internal regulator. 7 +3.3 Vout 3.3V output provided to the application circuit (output current is sourced to this pin from the 5V input.) 8 Drive out This output drives a P–channel MOSFET with up to 2000pF of “effective” gate capacitance. Recommended device is MGSF1P02ELT MOSFET. Drive out has active internal pull–up and pull–down circuitry to guarantee fast transitions. DEVICE MARKING 2 Device Type MC33565D 3.3 V Sub–type Marking (1st Line) MC565 MOTOROLA ANALOG IC DEVICE DATA MC33565 DC ELECTRICAL CHARACTERISTICS(1) Characteristic Symbol Min Typ Max Unit +5 Vin 4.3 5.0 5.5 Vdc Ireverse — — 25 µA VAux quiescent current — — 3.0 mA +5 Vin quiescent current, operating — — 10 mA 4.7 22 — mF 3.267 3.234 3.30 3.30 3.333 3.366 Vd 3.0 — — Vdc Voutmax 3.1 3.3 3.5 Vdc Line Regulation (Io = 200 mA) — — 0.4 % Load Regulation (Io = 0 to 200 mA) — — 0.4 % +5 Vin Supply Voltage Range Reverse Leakage Current from Output Load Capacitance(2) Cload REGULATOR OUTPUT Output Voltage (4.3V ≤ Vin ≤ 5.5V, 0mA ≤ Io ≤ 200mA) TA = 25°C (TA = –5°C to 150°C) In–to–Out Voltage (3.9V ≤ Vin ≤ 4.3V, Vaux = 3.3V) Voltage Out at Max Voltage In (Vin = 7V) +3.3 Vout Vdc 5V DETECT Low Threshold Voltage (+5 Vin falling) VthresLo 3.9 4.05 4.3 Vdc High Threshold Voltage (+5 Vin rising) VthresHi — 4.2 4.3 Vdc VHyst 0.12 0.15 0.18 Vdc Output peak source Current (+5 Vin > VthresHi) Ipeak 15 — — mA Output peak sink Current (+5 Vin < VthresLo) Ipeak 15 — — mA Low Output Voltage (IoL = 200 µA, Vin < VthresLo) VoL — 100 200 mVdc High Output Voltage (IoH = 200 µA) VoH 3.4 V5–0.8 — Vdc Hysteresis DRIVE OUTPUT NOTE: 1. (–5°C<Ta<70°C, 4.3V<5V<5.5V, Cload = 4.7µF unless otherwise noted) NOTE: 2. 4.7µF minimum over temperature; 22µF recommended; 500mW ESR maximum. MOTOROLA ANALOG IC DEVICE DATA 3 MC33565 +3.3 Vin External P–channel MOSFET Hyst sw Comp Driver Drive out Compensation & Hysteresis +3.3 Vout Ref & Detect 5V detect Vref +3.3 Vout +5 Vin Sense in External 4.7 µF cap LDO Figure 1. Functional Block Diagram FUNCTIONAL DESCRIPTION Input Blocking – The internal NPN pass transistor of the LDO regulator ensures that no significant reverse current will flow from +3.3 Vout back to the +5 Vin input when the 5V input is not powered and the 3.3 Vin supply is present. 5 Volt Detect – Internal circuitry detects the presence of the 5V input supply. When the 5V supply drops below a given threshold, the +3.3 Vin bypass transistor (an external P–channel MOSFET) is enabled. The 5V detect logic is active throughout the entire range of ramp–up from 0 to 5.5V. Additionally, the Drive out signal is never turned ON or OFF inappropriately during ramp–up of the +5 Vin supply. Also, +3.3 Vout never drops below 3.0V while +5 Vin is above the 5V detect minimum threshold. Glitch–free Transfer – The design of the 5V detect circuitry and Drive out control circuitry guarantees that the +3.3 Vout will not exceed the output voltage specification listed in the table of DC Operating Specifications even with +5 Vin ramping up and down at the extremes of the slew rates in the table of AC Operating Specifications (provided the device is used with an MGSF1P02ELT PMOS FET on Drive out along with a minimum 4.7µF capacitor on the +3.3 Vout). Offset Voltage Performance – To ensure performance when external offsets are present on the +5 Vin and +3.3 Vin power inputs, the device has been designed to be capable of operating with either one or both of these inputs rising from or falling to zero volts, or with offsets of 0.05V to 0.9V as the inputs ramp up and down. 3.3V aux Motherboard/ Mainboard PCI Slot 5V Drive out +5 Vin 1 8 2 7 +3.3 Vout N/C MC33565 +3.3 Vin PCI NIC/Card Circuitry Sense in 3 6 4 5 N/C Gnd 4.7 µF Figure 2. Application Block Diagram 4 MOTOROLA ANALOG IC DEVICE DATA MC33565 4.4V 4.4V VHYST VTH(HI) VIN VIN VTH(LO) 3.8V 3.8V tDH DR 2.0V DR 2.0V Figure 3. 5V Detect Thresholds Diagram 2.0V Figure 4. Timing Diagram 200 200 Vout capacitor 5µF 20mW ESR Phase Margin ° or Gain (dB) Vout capacitor 5µF 20mW ESR Phase Margin ° or Gain (dB) 2.0V NOTE: (1) VIN rise and fall times (10% to 90%) to be ≤ 100ns. NOTE: (1) VIN rise and fall times (10% to 90%) to be ≥ 100µs. 100 tDL Phase Margin ° 100 Phase Margin ° Gain dB 0 101 103 Gain dB 105 Frequency (Hz) 0 101 103 105 Frequency (Hz) NOTE: Vout capacitor ≥ 4.7µF over operating temperature range. Maximum ESR permissable = 500mW over operating temperature range. Figure 5. Predicted Gain and Phase at Zero Load Current MOTOROLA ANALOG IC DEVICE DATA Figure 6. Predicted Gain and Phase at Full Load Current 5 MC33565 OUTLINE DIMENSIONS D SUFFIX PLASTIC PACKAGE CASE 751–06 (SO–8) ISSUE T D A 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 6 M C B S A S DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ MOTOROLA ANALOG IC DEVICE DATA MC33565 NOTES MOTOROLA ANALOG IC DEVICE DATA 7 MC33565 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. 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