ONSEMI MC74VHC1GT66

MC74VHC1GT66
Advance Information
Analog Switch
The MC74VHC1GT66 is an advanced high speed CMOS bilateral
analog switch fabricated with silicon gate CMOS technology. It
achieves high speed propagation delays and low ON resistances while
maintaining CMOS low power dissipation. This bilateral switch
controls analog and digital voltages that may vary across the full
power–supply range (from VCC to GND).
The MC74VHC1GT66 is compatible in function to a single gate of
the very High Speed CMOS MC74VHCT4066. The device has been
designed so that the ON resistances (RON) are much lower and more
linear over input voltage than RON of the metal–gate CMOS or High
Speed CMOS analog switches.
The ON/OFF Control input is compatible with TTL–type input
thresholds allowing the device to be used as a logic–level translator
from 3.0V CMOS logic to 5.0V CMOS logic or from 1.8V CMOS
logic to 3.0V CMOS logic while operating at the high–voltage power
supply. The input protection circuitry on this device allows
overvoltage tolerance on the input, which provides protection when
voltages of up to 7V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT66 to be used to interface 5V circuits to 3V
circuits.
• Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
• Diode Protection Provided on Inputs and Outputs
• Improved Linearity and Lower ON Resistance over Input Voltage
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; MM > 200 V, CDM > 1500 V
IN/OUT XA
1
OUT/IN YA
2
5
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SC–88A / SOT–353
DF SUFFIX
CASE 419A
MARKING DIAGRAM
VEd
Pin 1
d = Date Code
PIN ASSIGNMENT
1
IN/OUT XA
2
OUT/IN YA
3
GND
4
ON/OFF CONTROL
5
VCC
VCC
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
GND
3
4
ON/OFF CONTROL
FUNCTION TABLE
5–Lead SOT–353 Pinout (Top View)
LOGIC SYMBOL
ON/OFF CONTROL
State of Analog Switch
L
H
Off
On
X1
1
1
U
U
IN/OUT XA
On/Off Control Input
OUT/IN YA
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
 Semiconductor Components Industries, LLC, 1999
November, 1999 – Rev. 2
1
Publication Order Number:
MC74VHC1GT66/D
MC74VHC1GT66
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Unit
DC Supply Voltage
Characteristics
VCC
–0.5 to +7.0
V
Digital Input Voltage
VIN
–0.5 to VCC +0.5
V
Analog Output Voltage
VIS
–0.5 to VCC + 0.5
V
Digital Input Diode Current
IIK
–20
mA
DC Supply Current, VCC and GND
ICC
+25
mA
Power dissipation in still air, SC–88A †
PD
200
mW
Lead temperature, 1 mm from case for 10 s
TL
260
°C
Tstg
–65 to +150
°C
Storage temperature
†Derating — SC–88A Package: –3 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Max
Unit
DC Supply Voltage
Characteristics
VCC
4.5
5.5
V
Digital Input Voltage
VIN
GND
VCC
V
Analog Input Voltage
VIS
GND
VCC
V
Static or Dynamic Voltage Across Switch
VIO*
1.2
V
Operating Temperature Range
TA
Input Rise and Fall Time
ON/OFF Control Input
tr , tf
–55
+85
°C
ns/V
VCC = 3.3V ± 0.3V
0
100
VCC = 5.0V ± 0.5V
0
20
* For voltage drops across the switch greater than 1.2V (switch on), excessive VCC current may be drawn; i.e. the current out of the switch may
contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
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2
MC74VHC1GT66
DC ELECTRICAL CHARACTERISTICS
VCC
Symbol
VIH
Parameter
Test Conditions
Minimum High–Level
Input Voltage
ON/OFF Control Input
RON = Per Spec
Maximum Low–Level
Input Voltage
ON/OFF Control Input
RON = Per Spec
IIN
Maximum Input
Leakage Current
ON/OFF Control Input
ICC
VIL
TA ≤ 85°C
TA = 25°C
(V)
Min
3.0
4.5
5.5
1.2
2.0
2.0
Typ
Max
Min
Max
TA ≤ 125°C
Min
Max
Unit
V
1.2
2.0
2.0
1.2
2.0
2.0
V
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
VIN = VCC or GND
0 to
5.5
±0.1
±1.0
±1.0
µA
Maximum Quiescent
Supply Current
VIN = VCC or GND
VIO = 0V
5.5
2.0
20
40
µA
ICCT
Quiescent
Supply Current
ON/OFF
3.4V
at
5.5
1.35
1.5
1.65
mA
RON
Maximum ”ON”
Resistance
VIN = VIH
VIS = VCC or GND
|IIS| ≤ 10mA (Figure 1)
3.0
4.5
5.5
30
20
15
50
30
20
70
40
35
100
50
45
Endpoints
VIN = VIH
VIS = VCC or GND
|IIS| ≤ 10mA (Figure 1)
3.0
4.5
5.5
25
12
8
50
20
15
65
26
23
90
40
32
Control
W
W
IOFF
Maximum Off–Channel
Leakage Current
VIN = VIL
VIS = VCC or GND
Switch Off (Figure 2)
5.5
0.1
0.5
1.0
µA
ION
Maximum On–Channel
Leakage
Current
VIN = VIH
VIS = VCC or GND
Switch On (Figure 3)
5.5
0.1
0.5
1.0
µA
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AC ELECTRICAL CHARACTERISTICS (Cload = 50 pF, Input tr/tf = 3.0ns)
Symbol
tPLH,
tPHL
tPLZ,
tPHZ
tPZL,
tPZH
CIN
Parameter
Test Conditions
VCC
(V)
7
4
2
1
ns
35
15
10
7
46
20
13
9
57
25
17
11
ns
15
8
6
4
35
15
10
7
46
20
13
9
57
25
17
11
ns
3
10
10
10
pF
4
4
10
10
10
10
10
10
1
0
0
0
5
2
1
1
2.0
3.0
4.5
5.5
15
8
6
4
2.0
3.0
4.5
5.5
RL = 1000
Maximum
Propogation Delay,
ON/OFF Control to
Analog Output
RL = 1000
Maximum Input
C
Capacitance
it
ON/OFF Control Input
0.0
Contol Input = GND
Analog I/O
Feedthrough
5.0
Figure 5
6
3
1
1
2.0
3.0
4.5
5.5
Maximum
Propogation Delay,
ON/OFF Control to
Analog Output
Figure 5
Unit
Max
YA = Open
Min
TA ≤ 125°C
Max
Typ
Maximum
Propogation Delay,
Input X to Y
Figure 4
TA ≤ 85°C
TA = 25°C
Min
Max
Min
Typical @ 25°C, VCC = 5.0V
CPD
Power Dissipation Capacitance (Note NO TAG)
pF
18
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no–load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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MC74VHC1GT66
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ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Symbol
Parameter
Test Conditions
VCC
Limit
25°C
Unit
BW
Maximum On–Channel
Bandwidth or Minimum
Frequency Response
Figure 7
fin = 1 MHz Sine Wave
Adjust fin voltage to obtain 0 dBm at VOS
Increase fin = frequency until dB meter reads –3dB
RL = 50 , CL = 10 pF
3.0
4.5
5.5
150
175
200
MHz
ISOoff
Off–Channel Feedthrough
Isolation
Figure 8
fin = Sine Wave
Adjust fin voltage to obtain 0 dBm at VIS
fin = 10 kHz, RL = 600 , CL = 50 pF
3.0
4.5
5.5
–50
–50
–50
dB
3.0
4.5
5.5
–40
–40
–40
3.0
4.5
5.5
45
60
130
3.0
4.5
5.5
25
30
60
fin = 1.0 kHz, RL = 50 , CL = 10 pF
NOISEfeed
Feedthrough Noise Control to
Switch
Figure 9
Vin ≤ 1 MHz Square Wave (tr = tf = 2ns)
Adjust RL at setup so that Is = 0 A
RL = 600 , CL = 50 pF
RL = 50 , CL = 10 pF
THD
Total Harmonic Distortion
Figure 10
fin = 1 kHz, RL = 10k , CL = 50 pF
THD = THDMeasured – THDSource
VIS = 3.0 VPP sine wave
VIS = 4.0 VPP sine wave
VIS = 5.0 VPP sine wave
mVPP
%
3.3
4.5
5.5
0.20
0.10
0.06
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no–load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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MC74VHC1GT66
PLOTTER
POWER
SUPPLY
–
DC PARAMETER
ANALYZER
COMPUTER
+
VCC
VCC
1
VCC
5
1
2
2
VIH
3
5
VCC
VIL
A
4
3
Figure 1. On Resistance Test Set–Up
VCC
4
Figure 2. Maximum Off–Channel Leakage Current
Test Set–Up
VCC
1
A
5
1
2
N/C
VCC
3
2
TEST
POINT
VIH
5
4
VIH
3
Figure 3. Maximum On–Channel Leakage Current
Test Set–Up
4
Figure 4. Propagation Delay Test Set–Up
Switch to Position 1 when testing tPLZ and tPZL
Switch to Position 2 when testing tPHZ and tPZH
VCC
TEST POINT
VCC
VCC
1
1
2
A
5
1
1
N/C
2
5
RL
2
VCC
N/C
CL*
3
3
4
4
2
*Includes all probe and jig capacitance.
Figure 5. Propagation Delay Output Enable/Disable
Test Set–Up
Figure 6. Power Dissipation Capacitance Test
Set–Up
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MC74VHC1GT66
VOS
VIS
VCC
0.1 mF
fin
1
dB
Meter
VCC
0.1 mF
fin
5
2
CL*
VOS
1
2
VIH
3
dB
Meter
4
CL*
RL
*Includes all probe and jig capacitance.
To Distortion
Meter
(VCC)/2
VCC
RL
1
5
v 1 MHz
IN
t r + t + 2 ns
f
CL*
2
3
RL
5
VIH
3
4
*Includes all probe and jig capacitance.
Figure 10. Total Harmonic Distortion Test Set–Up
Control
VCC
tf
90%
10%
50% VCC
tPZL
50% VCC
50% VCC
50% VCC
High
Impedance
10%
Analog Out
VOL
50% VCC
tPZH
Figure 11. Propagation Delay,
Analog In to Analog Out Waveforms
VIH
tPLZ
tPHL
VOH
YA
1
2
tr
tPLH
fin
CL*
VIH
GND
4
Figure 9. Feedthrough Noise, ON/OFF Control to
Analog Out, Test Set–Up
50%
VCC
VOS
*Includes all probe and jig capacitance.
XA
VIS
0.1 mF
V
IS
4
Figure 8. Off–Channel Feedthrough Isolation Test
Set–Up
(VCC)/2
VOS
3
*Includes all probe and jig capacitance.
Figure 7. Maximum On–Channel Bandwidth
Test Set–Up
RL
5
90%
VOL
VOH
High
tPHZ Impedance
Figure 12. Propagation Delay, ON/OFF Control
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MC74VHC1GT66
DEVICE ORDERING INFORMATION
Device Nomenclature
Device Order Number
Circuit
Indicator
Temp
Range
Identifier
MC74VHC1GT66DFT1
MC
74
Technology
Device
Function
Package
Suffix
Tape &
Reel
Suffix
Package
Type
Tape and Reel
Size
VHC1G
T66
DF
T1
SC–88A /
SOT–353
7–Inch/3000 Unit
PACKAGE DIMENSIONS
SC–88A / SOT–353
DF SUFFIX
5–LEAD PACKAGE
CASE 419A–01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MM.
A
G
V
5
DIM
A
B
C
D
G
H
J
K
N
S
V
4
–B–
S
1
2
3
D 5 PL
0.2 (0.008)
M
B
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
–––
0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
0.012
0.016
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
–––
0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
0.30
0.40
M
J
C
K
0.4 mm (min)
H
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
1.9 mm
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7
0.65 mm 0.65 mm
0.5 mm (min)
N
MC74VHC1GT66
10 PITCHES
CUMULATIVE
TOLERANCE ON
TAPE
±0.2 mm
(±0.008”)
P0
K
P2
D
t
TOP
COVER
TAPE
E
A0
+
K0
SEE
NOTE 2
B1
SEE NOTE 2
F
+
B0
W
+
D1
FOR COMPONENTS
2.0 mm × 1.2 mm
AND LARGER
P
EMBOSSMENT
FOR MACHINE REFERENCE
ONLY
INCLUDING DRAFT AND RADII
CONCENTRIC AROUND B0
CENTER LINES
OF CAVITY
USER DIRECTION OF FEED
*TOP COVER
TAPE THICKNESS (t1)
0.10 mm
(0.004”) MAX.
R MIN.
TAPE AND COMPONENTS
SHALL PASS AROUND RADIUS “R”
WITHOUT DAMAGE
EMBOSSED
CARRIER
BENDING RADIUS
100 mm
(3.937”)
MAXIMUM COMPONENT ROTATION
10°
EMBOSSMENT
1 mm MAX
TYPICAL
COMPONENT CAVITY
CENTER LINE
TAPE
1 mm
(0.039”) MAX
TYPICAL
COMPONENT
CENTER LINE
250 mm
(9.843”)
CAMBER (TOP VIEW)
ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250 mm
Figure 13. Carrier Tape Specifications
EMBOSSED CARRIER DIMENSIONS (See Notes 1 and 2)
Tape
Size
B1
Max
8 mm
4.35 mm
(0.171”)
D
D1
E
F
K
P
P0
P2
R
T
W
1.5 +0.1/
–0.0 mm
(0.059
+0.004/
–0.0”)
1.0 mm
Min
(0.039”)
1.75
±0.1 mm
(0.069
±0.004”)
3.5
±0.5 mm
(1.38
±0.002”)
2.4 mm
(0.094”)
4.0
±0.10 mm
(0.157
±0.004”)
4.0
±0.1 mm
(0.156
±0.004”)
2.0
±0.1 mm
(0.079
±0.002”)
25 mm
(0.98”)
0.3
±0.05 mm
(0.01
+0.0038/
–0.0002”)
8.0
±0.3 mm
(0.315
±0.012”)
1. Metric Dimensions Govern–English are in parentheses for reference only.
2. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
0.50 mm max. The component cannot rotate more than 10° within the determined cavity
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8
MC74VHC1GT66
t MAX
13.0 mm ±0.2 mm
(0.512” ±0.008”)
1.5 mm MIN
(0.06”)
A
20.2 mm MIN
(0.795”)
50 mm MIN
(1.969”)
FULL RADIUS
G
Figure 14. Reel Dimensions
REEL DIMENSIONS
Tape
Size
8 mm
A Max
G
t Max
330 mm
(13”)
8.400 mm, +1.5 mm, –0.0
(0.33”, +0.059”, –0.00)
14.4 mm
(0.56”)
DIRECTION OF FEED
BARCODE LABEL
POCKET
Figure 15. Reel Winding Direction
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9
HOLE
MC74VHC1GT66
CAVITY
TAPE
TOP TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
COMPONENTS
DIRECTION OF FEED
Figure 16. Tape Ends for Finished Goods
“T1” PIN ONE TOWARDS
SPROCKET HOLE
SC–88A/SOT–353 (5 Pin)
DEVICE
User Direction of Feed
Figure 17. Reel Configuration
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TAPE LEADER
NO COMPONENTS
400 mm MIN
MC74VHC1GT66
Notes
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ON Semiconductor and
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