SN74LS42 One-of-Ten Decoder The LSTTL / MSI SN74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families. • Multifunction Capability • Mutually Exclusive Outputs • Demultiplexing Capability • Input Clamp Diodes Limit High Speed Termination Effects http://onsemi.com LOW POWER SCHOTTKY GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C TA Operating Ambient Temperature Range IOH Output Current – High – 0.4 mA IOL Output Current – Low 8.0 mA 16 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Device Semiconductor Components Industries, LLC, 1999 December, 1999 – Rev. 6 1 Package Shipping SN74LS42N 16 Pin DIP 2000 Units/Box SN74LS42D 16 Pin 2500/Tape & Reel Publication Order Number: SN74LS42/D SN74LS42 CONNECTION DIAGRAM DIP (TOP VIEW) VCC A0 A1 A2 A3 9 8 7 16 15 14 13 12 11 10 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 GND LOADING (Note a) HIGH PIN NAMES A0 – A3 0 to 9 Address Inputs Outputs, Active LOW LOW 0.5 U.L. 10 U.L. 0.25 U.L. 5 U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW. LOGIC SYMBOL 15 14 13 12 A0 A1 A2 A3 0 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 9 10 11 VCC = PIN 16 GND = PIN 8 LOGIC DIAGRAM A0 A1 15 1 0 2 1 3 2 A2 14 4 3 A3 13 5 6 4 5 7 6 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS http://onsemi.com 2 12 9 7 10 8 11 9 SN74LS42 FUNCTIONAL DESCRIPTION The most significant input A3 produces a useful inhibit function when the LS42 is used as a one-of-eight decoder. The A3 input can also be used as the Data input in an 8-output demultiplexer application. The LS42 decoder accepts four active HIGH BCD inputs and provides ten mutually exclusive active LOW outputs, as shown by logic symbol or diagram. The active LOW outputs facilitate addressing other MSI units with LOW input enables. The logic design of the LS42 ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. TRUTH TABLE A0 A1 A2 A3 0 1 2 3 4 5 6 7 8 9 L H L H L H L H L H L H L H L H L L H H L L H H L L H H L L H H L L L L H H H H L L L L H H H H L L L L L L L L H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H = HIGH Voltage Level L = LOW Voltage Level http://onsemi.com 3 SN74LS42 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Min Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL O Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current IOS Short Circuit Current (Note 1) ICC Power Supply Current Typ Max 2.0 0.8 – 0.65 2.7 – 1.5 3.5 Unit Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = – 18 mA V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 0.25 0.4 V IOL = 4.0 mA 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V 0.1 mA VCC = MAX, VIN = 7.0 V – 0.4 mA VCC = MAX, VIN = 0.4 V –100 mA VCC = MAX 13 mA VCC = MAX – 20 Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C) Limits Symbol Min Parameter Typ Max Unit tPLH tPHL Propagation Delay (2 Levels) 15 15 25 25 ns tPLH tPHL Propagation Delay (3 Levels) 20 20 30 30 ns VIN 1.3 V Test Conditions Figure 2 Figure 1 VCC = 5.0 V CL = 15 pF AC WAVEFORMS VIN VOUT 1.3 V 1.3 V tPHL tPLH 1.3 V 1.3 V tPLH tPHL VOUT 1.3 V Figure 1. 1.3 V 1.3 V Figure 2. http://onsemi.com 4 SN74LS42 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. –A– 16 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M T A M http://onsemi.com 5 DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 SN74LS42 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 9 1 8 –B– P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 0.25 (0.010) M B S G R K F X 45 _ C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S http://onsemi.com 6 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 SN74LS42 Notes http://onsemi.com 7 SN74LS42 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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