74LVC3G07 Triple buffer with open-drain output Rev. 03 — 01 February 2005 Product data sheet 1. General description The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. 2. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: ◆ JESD8-7 (1.65 V to 1.95 V) ◆ JESD8-5 (2.3 V to 2.7 V) ◆ JESD8-B/JESD36 (2.7 V to 3.6 V). ESD protection: ◆ HBM EIA/JESD22-A114-B exceeds 2000 V ◆ MM EIA/JESD22-A115-A exceeds 200 V. −24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C. 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C. Symbol Parameter Conditions Min Typ Max Unit tPLZ, tPZL propagation delay VCC = 1.8 V; input nA to output nY CL = 30 pF; RL = 1 kΩ - 2.9 - ns VCC = 2.5 V; CL = 30 pF; RL = 500 Ω - 1.7 - ns VCC = 2.7 V; CL = 50 pF; RL = 500 Ω - 2.3 - ns VCC = 3.3 V; CL = 50 pF; RL = 500 Ω - 2.1 - ns VCC = 5.0 V; CL = 50 pF; RL = 500 Ω - 1.5 - ns - 2.5 - pF - 6.5 - pF input capacitance CI [1] [2] power dissipation VCC = 3.3 V capacitance per gate CPD [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. [2] The condition is VI = GND to VCC. 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74LVC3G07DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G07DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC3G07GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 5. Marking Table 3: Marking codes Type number Marking code 74LVC3G07DP V07 74LVC3G07DC V07 74LVC3G07GT V07 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 2 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 6. Functional diagram 1 1A 1Y 7 3 2A 2Y 5 6 3A 3Y 2 1A 2A 3A 1 1 7 3 1 5 6 1 2 1Y 2Y 3Y mnb137 mnb136 Fig 1. Logic symbol Fig 2. IEC logic symbol Y A GND mna591 Fig 3. Logic diagram (one driver) 7. Pinning information 7.1 Pinning 07 1A 1 8 VCC 3Y 2 7 1Y 6 3A 5 2Y 2A 3 GND 4 07 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 001aab022 001aac022 Transparent top view Fig 4. Pin configuration VSSOP8 and TSSOP8 9397 750 14542 Product data sheet Fig 5. Pin configuration XSON8 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 3 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 7.2 Pin description reserved Table 4: Pin description Symbol Pin Description 1A 1 data input 3Y 2 data output 2A 3 data input GND 4 ground (0 V) 2Y 5 data output 3A 6 data input 1Y 7 data output VCC 8 supply voltage 8. Functional description 8.1 Function table Table 5: Function table [1] Input nA Output nY L L H Z [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 9. Limiting values Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI VO Conditions Max Unit −0.5 +6.5 V input voltage [1] −0.5 +6.5 V output voltage [1] −0.5 +6.5 V [1] [2] −0.5 +6.5 V active mode Power-down mode IIK input diode current VI < 0 V - −50 mA IOK output diode current VO < 0 V - −50 mA IO output sink current VO = 0 V to 6.5 V - 50 mA ICC, IGND VCC or GND current - ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation - 300 mW Tamb = −40 °C to +125 °C [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. 9397 750 14542 Product data sheet Min © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 4 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 10. Recommended operating conditions Table 7: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VO output voltage Tamb ambient temperature tr, tf input rise and fall times active mode 0 - VCC V Power-down mode; VCC = 0 V 0 - 5.5 V −40 - +125 °C VCC = 1.65 V to 2.7 V 0 - 20 ns/V VCC = 2.7 V to 5.5 V 0 - 10 ns/V 11. Static characteristics Table 8: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = −40 °C to +85 VIH VIL VOL Conditions Min Typ Max Unit °C [1] HIGH-level input voltage LOW-level input voltage LOW-level output voltage VCC = 1.65 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7 × VCC - - V VCC = 1.65 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3 × VCC V IO = 100 µA; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.45 V VI = VIH or VIL IO = 8 mA; VCC = 2.3 V - - 0.3 V IO = 12 mA; VCC = 2.7 V - - 0.4 V IO = 24 mA; VCC = 3.0 V - - 0.55 V IO = 32 mA; VCC = 4.5 V - - 0.55 V ILI input leakage current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V - ±0.1 ±5 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - ±0.1 ±10 µA Ioff power-off leakage current VI or VO = 5.5 V; VCC = 0 V - ±0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - 0.1 10 µA ∆ICC additional quiescent VI = VCC − 0.6 V; IO = 0 A; supply current per pin VCC = 2.3 V to 5.5 V - 5 500 µA CI input capacitance - 2.5 - pF 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 5 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output Table 8: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min VCC = 1.65 V to 1.95 V Typ Max Unit 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7 × VCC - - V VCC = 1.65 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3 × VCC V IO = 100 µA; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.45 V Tamb = −40 °C to +125 °C HIGH-level input voltage VIH LOW-level input voltage VIL LOW-level output voltage VOL VI = VIH or VIL IO = 12 mA; VCC = 2.7 V - - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.80 V ILI input leakage current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V - - ±20 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - ±10 µA Ioff power-off leakage current VI or VO = 5.5 V; VCC = 0 V - - ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 40 µA ∆ICC additional quiescent VI = VCC − 0.6 V; IO = 0 A; supply current per pin VCC = 2.3 V to 5.5 V - - 5000 µA Typ Max Unit [1] All typical values are measured at nominal VCC and Tamb = 25 °C. 12. Dynamic characteristics Table 9: Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = −40 °C to +85 tPLZ, tPZL Conditions propagation delay input nA to output nY see Figure 6 and 7 VCC = 1.65 V to 1.95 V 1.0 2.9 6.7 ns VCC = 2.3 V to 2.7 V 0.5 1.7 4.3 ns VCC = 2.7 V 1.0 2.3 4.2 ns VCC = 3.0 V to 3.6 V 0.5 2.1 3.7 ns VCC = 4.5 V to 5.5 V 0.5 1.5 2.9 ns 9397 750 14542 Product data sheet Min °C [1] © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 6 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output Table 9: Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol CPD Parameter Conditions power dissipation capacitance per gate Min Typ Max Unit - 6.5 - pF VCC = 1.65 V to 1.95 V 1.0 - 8.4 ns VCC = 2.3 V to 2.7 V 0.5 - 5.5 ns VCC = 2.7 V 1.0 - 5.3 ns VCC = 3.0 V to 3.6 V 0.5 - 4.7 ns VCC = 4.5 V to 5.5 V 0.5 - 3.7 ns [2] [3] VCC = 3.3 V Tamb = −40 °C to +125 °C tPLZ, tPZL propagation delay input nA to output nY see Figure 6 and 7 [1] All typical values are measured at nominal VCC and Tamb = 25 °C. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. [3] The condition is VI = GND to VCC. 13. Waveforms VI VM nA input GND t PLZ t PZL VCC nY output VM VOL VX mna528 Measurement points are given in Table 10. VOL is typical output voltage drop that occurs with the output load. Fig 6. The input (nA) to output (nY) propagation delays 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 7 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output Table 10: Measurement points Supply voltage Input Output VCC VM VI VM VX 1.65 V to 1.95 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V 2.3 V to 2.7 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.15 V 2.7 V 1.5 V 2.7 V 1.5 V VOL + 0.3 V 3.0 V to 3.6 V 1.5 V 2.7 V 1.5 V VOL + 0.3 V 4.5 V to 5.5 V 0.5 × VCC VCC 0.5 × VCC VOL + 0.3 V VEXT VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL mna616 Test data are given in Table 11. Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 7. Load circuitry for switching times Table 11: Test data Supply voltage Input Load VCC VI tr = tf CL RL tPZL, tPLZ 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ 2 × VCC 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω 2 × VCC 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω 6V 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω 6V 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω 2 × VCC 9397 750 14542 Product data sheet VEXT © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 8 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 14. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 (A3) A1 pin 1 index θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Fig 8. Package outline SOT505-2 (TSSOP8) 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 9 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D E SOT765-1 A X c y HE v M A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 4 e L detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ mm 1 0.15 0.00 0.85 0.60 0.12 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.40 0.15 0.21 0.19 0.2 0.13 0.1 0.4 0.1 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 MO-187 Fig 9. Package outline SOT765-1 (VSSOP8) 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 10 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4× (2) L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 2.0 1.9 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT833-1 --- MO-252 --- EUROPEAN PROJECTION ISSUE DATE 04-07-22 04-11-09 Fig 10. Package outline SOT833-1 (XSON8) 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 11 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 15. Revision history Table 12: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74LVC3G07_3 20050201 Product data sheet - 9397 750 14542 74LVC3G07_2 Modifications: • Changed: type number 74LVC3G07GT (XSON8 package). 74LVC3G07_2 20041027 Product data sheet - 9397 750 13791 74LVC3G07_1 74LVC3G07_1 20040608 Product data sheet - 9397 750 13267 - 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 12 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 16. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions 18. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 19. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 14542 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 01 February 2005 13 of 14 74LVC3G07 Philips Semiconductors Triple buffer with open-drain output 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information . . . . . . . . . . . . . . . . . . . . 13 © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 01 February 2005 Document number: 9397 750 14542 Published in The Netherlands