PHILIPS 74LVC1G11

74LVC1G11
Single 3-input AND gate
Rev. 01 — 30 November 2004
Product data sheet
1. General description
The 74LVC1G11 is a high-performance, low-voltage, Si-gate CMOS device and superior
to most advanced CMOS compatible TTL families.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry
disables the output, preventing the damaging backflow current through the device when
it is powered down.
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and
fall times.
The 74LVC1G11 provides a single 3-input AND gate.
2. Features
■
■
■
■
■
■
■
■
■
■
■
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
◆ JESD8-7 (1.65 V to 1.95 V)
◆ JESD8-5 (2.3 V to 2.7 V)
◆ JESD8-B/JESD36 (2.7 V to 3.6 V).
±24 mA output drive (VCC = 3.0 V)
ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C.
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
Symbol
Parameter
Conditions
tPHL, tPLH propagation delay A, CL = 50 pF; VCC = 3.3 V
B and C to Y
input capacitance
CI
power dissipation
capacitance
CPD
[1] [2]
VCC = 3.3 V
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[2]
The condition is VI = GND to VCC.
Min
Typ
Max
Unit
1.0
2.6
4.3
ns
-
4
-
pF
-
13
-
pF
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC1G11GW
−40 °C to +125 °C
SC-88
plastic surface mounted package; 6 leads
SOT363
74LVC1G11GV
−40 °C to +125 °C
SC-74
plastic surface mounted package; 6 leads
SOT457
5. Marking
Table 3:
Marking
Type number
Marking code
74LVC1G11GW
VU
74LVC1G11GV
V11
6. Functional diagram
1
3
6
&
A
1
B
Y
4
6
C
001aac033
Fig 1. Logic symbol
9397 750 14209
Product data sheet
4
3
001aac029
Fig 2. IEC logic symbol
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
2 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
A
B
Y
C
001aac030
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
A
1
GND
2
B
3
11
6
C
5
VCC
4
Y
001aac032
Fig 4. Pin configuration
7.2 Pin description
Table 4:
Pin description
Symbol
Pin
Description
A
1
data input
GND
2
ground (0 V)
B
3
data input
Y
4
data output
VCC
5
supply voltage
C
6
data input
9397 750 14209
Product data sheet
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
3 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
8. Functional description
8.1 Function table
Table 5:
Function table [1]
Input
Output
A
B
C
Y
H
H
H
H
L
X
X
L
X
L
X
L
X
X
L
L
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
Conditions
VCC
supply voltage
VI
input voltage
output voltage
VO
Max
Unit
−0.5
+6.5
V
[1]
−0.5
+6.5
V
active mode
[1] [2]
−0.5
VCC + 0.5 V
Power-down mode
[1] [2]
−0.5
+6.5
V
IIK
input diode current
VI < 0 V
-
−50
mA
IOK
output diode current
VO > VCC or VO < 0 V
-
±50
mA
IO
output source or sink VO = 0 V to VCC
current
-
±50
mA
ICC, IGND
VCC or GND current
-
±100
mA
Tstg
storage temperature
−65
+150
°C
Ptot
power dissipation
-
250
mW
Tamb = −40 °C to +125 °C
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
9397 750 14209
Product data sheet
Min
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
4 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
10. Recommended operating conditions
Table 7:
Recommended operating conditions
Symbol
Parameter
VCC
Conditions
Min
Typ
Max
Unit
supply voltage
1.65
-
5.5
V
VI
input voltage
0
-
5.5
V
VO
output voltage
active mode
0
-
VCC
V
Power-down mode;
VCC = 0 V
0
-
5.5
V
−40
-
+125
°C
VCC = 1.65 V to 2.7 V
0
-
20
ns/V
VCC = 2.7 V to 5.5 V
0
-
10
ns/V
Tamb
ambient temperature
tr, tf
input rise and fall times
11. Static characteristics
Table 8:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = −40 °C to +85
VIH
VIL
VOH
VOL
Conditions
Min
Typ
Max
Unit
0.65 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
V
V
°C [1]
HIGH-level input voltage VCC = 1.65 V to 1.95 V
LOW-level input voltage
HIGH-level output
voltage
LOW-level output
voltage
VCC = 4.5 V to 5.5 V
0.7 × VCC
-
-
VCC = 1.65 V to 1.95 V
-
-
0.35 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
V
VCC = 4.5 V to 5.5 V
-
-
0.3 × VCC
V
IO = −100 µA; VCC = 1.65 V to 5.5 V
VCC − 0.1
-
-
V
IO = −4 mA; VCC = 1.65 V
1.2
1.54
-
V
VI = VIH or VIL
IO = −8 mA; VCC = 2.3 V
1.9
2.15
-
V
IO = −12 mA; VCC = 2.7 V
2.2
2.50
-
V
IO = −24 mA; VCC = 3.0 V
2.3
2.62
-
V
IO = −32 mA; VCC = 4.5 V
3.8
4.11
-
V
IO = 100 µA; VCC = 1.65 V to 5.5 V
-
-
0.10
V
IO = 4 mA; VCC = 1.65 V
-
0.07
0.45
V
IO = 8 mA; VCC = 2.3 V
-
0.12
0.30
V
VI = VIH or VIL
IO = 12 mA; VCC = 2.7 V
-
0.17
0.40
V
IO = 24 mA; VCC = 3.0 V
-
0.33
0.55
V
IO = 32 mA; VCC = 4.5 V
-
0.39
0.55
V
ILI
input leakage current
VI = 5.5 V or GND; VCC = 5.5 V
-
±0.1
±5
µA
Ioff
power-off leakage
current
VI or VO = 5.5 V; VCC = 0 V
-
±0.1
±10
µA
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Product data sheet
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Rev. 01 — 30 November 2004
5 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
Table 8:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
ICC
quiescent supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
0.1
10
µA
∆ICC
additional quiescent
supply current per pin
VI = VCC − 0.6 V; IO = 0 A;
VCC = 2.3 V to 5.5 V
-
5
500
µA
CI
input capacitance
-
4
-
pF
Tamb = −40 °C to +125 °C
0.65 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
V
VCC = 4.5 V to 5.5 V
0.7 × VCC
-
-
V
HIGH-level input voltage VCC = 1.65 V to 1.95 V
VIH
LOW-level input voltage
VIL
VOH
HIGH-level output
voltage
LOW-level output
voltage
VOL
VCC = 1.65 V to 1.95 V
-
-
0.35 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
V
VCC = 4.5 V to 5.5 V
-
-
0.3 × VCC
V
IO = −100 µA; VCC = 1.65 V to 5.5 V
VCC − 0.1
-
-
V
IO = −4 mA; VCC = 1.65 V
0.95
-
-
V
IO = −8 mA; VCC = 2.3 V
1.7
-
-
V
VI = VIH or VIL
IO = −12 mA; VCC = 2.7 V
1.9
-
-
V
IO = −24 mA; VCC = 3.0 V
2.0
-
-
V
IO = −32 mA; VCC = 4.5 V
3.4
-
-
V
VI = VIH or VIL
IO = 100 µA; VCC = 1.65 V to 5.5 V
-
-
0.10
V
IO = 4 mA; VCC = 1.65 V
-
-
0.70
V
IO = 8 mA; VCC = 2.3 V
-
-
0.45
V
IO = 12 mA; VCC = 2.7 V
-
-
0.60
V
IO = 24 mA; VCC = 3.0 V
-
-
0.80
V
IO = 32 mA; VCC = 4.5 V
-
-
0.80
V
ILI
input leakage current
VI = 5.5 V or GND; VCC = 5.5 V
-
-
±100
µA
Ioff
power-off leakage
current
VI or VO = 5.5 V; VCC = 0 V
-
-
±200
µA
ICC
quiescent supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
200
µA
∆ICC
additional quiescent
supply current per pin
VI = VCC − 0.6 V; IO = 0 A;
VCC = 2.3 V to 5.5 V
-
-
5000
µA
[1]
All typical values are measured at Tamb = 25 °C.
9397 750 14209
Product data sheet
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Rev. 01 — 30 November 2004
6 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
12. Dynamic characteristics
Table 9:
Dynamic characteristics
GND = 0 V; see Figure 6 for test circuit.
Symbol
Parameter
Tamb = −40 °C to +85
tPHL, tPLH
propagation delay
A, B and C to Y
power dissipation
capacitance
CPD
Conditions
Min
Typ
Max
Unit
VCC = 1.65 V to 1.95 V
1.5
4.7
17.2
ns
VCC = 2.3 V to 2.7 V
1.0
3.0
6.2
ns
VCC = 2.7 V
1.0
3.0
6.0
ns
VCC = 3.0 V to 3.6 V
1.0
2.6
4.9
ns
VCC = 4.5 V to 5.5 V
1.0
1.9
3.5
ns
-
13
-
pF
VCC = 1.65 V to 1.95 V
1.5
-
21.5
ns
VCC = 2.3 V to 2.7 V
1.0
-
7.8
ns
VCC = 2.7 V
1.0
-
7.5
ns
VCC = 3.0 V to 3.6 V
1.0
-
6.2
ns
VCC = 4.5 V to 5.5 V
1.0
-
4.4
ns
°C [1]
see Figure 5
VCC = 3.3 V
[2] [3]
Tamb = −40 °C to +125 °C
tPHL, tPLH
propagation delay
A, B and C to Y
see Figure 5
[1]
All typical values are measured at Tamb = 25 °C and nominal VCC.
[2]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[3]
The condition is VI = GND to VCC.
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Product data sheet
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Rev. 01 — 30 November 2004
7 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
13. Waveforms
VI
A, B, C
input
VM
GND
tPHL
tPLH
VOH
VM
Y output
VOL
tTHL
001aac031
Measurement points are given in Table 10.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig 5. The input (A, B, C) to output (Y) propagation delays
Table 10:
Measurement points
Supply voltage
Input
Output
VCC
VM
VM
1.65 V to 1.95 V
0.5 × VCC
0.5 × VCC
2.3 V to 2.7 V
0.5 × VCC
0.5 × VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5 × VCC
0.5 × VCC
VEXT
VCC
PULSE
GENERATOR
VI
RL
VO
D.U.T.
RT
CL
RL
mna616
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance
RT = Termination resistance should be equal to the output impedance Zo of the pulse
generator.
Fig 6. Load circuitry for switching times
9397 750 14209
Product data sheet
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Rev. 01 — 30 November 2004
8 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
Table 11:
Test data
Supply voltage
Input
Load
VCC
VI
tr = tf
CL
RL
tPLH, tPHL
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 kΩ
open
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500 Ω
open
9397 750 14209
Product data sheet
VEXT
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
9 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
14. Package outline
Plastic surface mounted package; 6 leads
SOT363
D
E
B
y
X
A
HE
6
5
v M A
4
Q
pin 1
index
A
A1
1
2
e1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
SOT363
JEDEC
JEITA
SC-88
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
04-11-08
Fig 7. Package outline SOT363 (SC-88)
9397 750 14209
Product data sheet
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
10 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
Plastic surface mounted package; 6 leads
SOT457
D
E
B
y
A
HE
6
X
v M A
4
5
Q
pin 1
index
A
A1
c
1
2
3
Lp
bp
e
w M B
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
c
D
E
e
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.1
0.013
0.40
0.25
0.26
0.10
3.1
2.7
1.7
1.3
0.95
3.0
2.5
0.6
0.2
0.33
0.23
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
SOT457
JEDEC
JEITA
SC-74
EUROPEAN
PROJECTION
ISSUE DATE
01-05-04
04-11-08
Fig 8. Package outline SOT457 (SC-74)
9397 750 14209
Product data sheet
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
11 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
15. Revision history
Table 12:
Revision history
Document ID
Release date
Data sheet status
Change notice
Doc. number
Supersedes
74LVC1G11_1
20041130
Product data sheet
-
9397 750 14209
-
9397 750 14209
Product data sheet
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
12 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
16. Data sheet status
Level
Data sheet status [1]
Product status [2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
18. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
19. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: [email protected]
9397 750 14209
Product data sheet
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Rev. 01 — 30 November 2004
13 of 14
74LVC1G11
Philips Semiconductors
Single 3-input AND gate
20. Contents
1
2
3
4
5
6
7
7.1
7.2
8
8.1
9
10
11
12
13
14
15
16
17
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Contact information . . . . . . . . . . . . . . . . . . . . 13
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 30 November 2004
Document number: 9397 750 14209
Published in The Netherlands