74AHC1G09 2-input AND gate with open-drain output Rev. 01 — 26 September 2005 Product data sheet 1. General description The 74AHC1G09 is a high-speed Si-gate CMOS device. The 74AHC1G09 provides the 2-input AND function with open-drain output. The output of the 74AHC1G09 is an open drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For digital operation this device must have a pull-up resistor to establish a logic HIGH level. 2. Features ■ High noise immunity ■ ESD protection: ◆ HBM JESD22-A114-C exceeds 2000 V ◆ MM JESD22-A115-A exceeds 200 V ■ Low power dissipation ■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C. 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol Parameter Conditions Min Typ Max Unit tPZL, tPLZ propagation delay A and B to Y VCC = 4.5 V to 5.5 V; CL = 15 pF - 3.2 5.5 ns Ci input capacitance - 1.5 10 pF - 5 - pF CPD [1] power dissipation capacitance CL = 50 pF; fi = 1 MHz; VI = GND to VCC [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; (CL × VCC2 × fo) = dissipation due to the output if the combination of the pull up voltage and resistance results in VCC at the output. 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 4. Ordering information Table 2: Ordering information Type number Package 74AHC1G09GW Temperature range Name Description Version −40 °C to +125 °C plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 TSSOP5 5. Marking Table 3: Marking Type number Marking code 74AHC1G09GW A9 6. Functional diagram B A 1 4 2 1 Y & 2 001aad598 4 001aad599 Fig 1. Logic symbol Fig 2. IEC logic symbol Y A GND B 001aad600 Fig 3. Logic diagram 7. Pinning information 7.1 Pinning B 1 A 2 GND 3 5 VCC 4 Y 09 001aad601 Fig 4. Pin configuration SOT353-1 (TSSOP5) 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 2 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 7.2 Pin description Table 4: Pin description Symbol Pin Description B 1 data input B A 2 data input A GND 3 ground (0 V) Y 4 data output Y VCC 5 supply voltage 8. Functional description 8.1 Function table Table 5: Function table [1] Input Output A B Y L L L L H L H L L H H Z [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 9. Limiting values Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Max Unit −0.5 +7.0 V input voltage [1] −0.5 +7.0 V output voltage active mode [1] −0.5 +7.0 V high-impedance mode [1] −0.5 +7.0 V input clamping current VI < −0.5 V [1] - −20 mA IOK output clamping current VO < −0.5 V [1] - ±20 mA VO > −0.5 V supply voltage VCC VI VO IIK IO output current - 25 mA ICC quiescent supply current - ±75 mA IGND GND current - ±75 mA Tstg storage temperature −65 +150 °C - 250 mW Ptot total power dissipation Tamb = −40 °C to +125 °C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP5 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. 74AHC1G09_1 Product data sheet Min © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 3 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 10. Recommended operating conditions Table 7: Recommended operating operations Symbol Parameter VCC Min Typ Max Unit supply voltage 2.0 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage active mode 0 - VCC V high-impedance mode 0 - 6.0 V −40 +25 +125 °C VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.5 V - - 20 ns/V Tamb ambient temperature tr, tf input rise and fall times Conditions 11. Static characteristics Table 8: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit HIGH-level input voltage VCC = 2.0 V 1.5 - - V VCC = 3.0 V 2.1 - - V VCC = 5.5 V 3.85 - - V VCC = 2.0 V - - 0.5 V VCC = 3.0 V - - 0.9 V VCC = 5.5 V - - 1.65 V IO = 50 µA; VCC = 2.0 V - 0 0.1 V IO = 50 µA; VCC = 3.0 V - 0 0.1 V IO = 50 µA; VCC = 4.5 V - 0 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 V Tamb = 25 °C VIH VIL VOL LOW-level input voltage LOW-level output voltage VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - ±0.1 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - ±0.25 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 µA Ci input capacitance - 1.5 10 pF VCC = 2.0 V 1.5 - - V VCC = 3.0 V 2.1 - - V VCC = 5.5 V 3.85 - - V VCC = 2.0 V - - 0.5 V VCC = 3.0 V - - 0.9 V VCC = 5.5 V - - 1.65 V Tamb = −40 °C to +85 °C VIH VIL HIGH-level input voltage LOW-level input voltage 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 4 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output Table 8: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V - - 0.1 V IO = 50 µA; VCC = 3.0 V - - 0.1 V IO = 50 µA; VCC = 4.5 V - - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V IO = 8.0 mA; VCC = 4.5 V - - 0.44 V ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - ±1.0 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - ±2.5 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 µA HIGH-level input voltage VCC = 2.0 V 1.5 - - V VCC = 3.0 V 2.1 - - V VCC = 5.5 V 3.85 - - V LOW-level input voltage VCC = 2.0 V - - 0.5 V VCC = 3.0 V - - 0.9 V VCC = 5.5 V - - 1.65 V IO = 50 µA; VCC = 2.0 V - - 0.1 V IO = 50 µA; VCC = 3.0 V - - 0.1 V IO = 50 µA; VCC = 4.5 V - - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.55 V Tamb = −40 °C to +125 °C VIH VIL VOL LOW-level output voltage VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - ±2.0 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 20 µA 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 5 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 12. Dynamic characteristics Table 9: Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 6. Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C tPZL, tPLZ propagation delay A and B to Y power dissipation capacitance CPD see Figure 5 VCC = 3.0 V to 3.6 V; CL = 15 pF [1] - 4.6 7.5 ns VCC = 4.5 V to 5.5 V; CL = 15 pF [1] - 3.2 5.5 ns VCC = 3.0 V to 3.6 V; CL = 50 pF [1] - 6.5 11.0 ns VCC = 4.5 V to 5.5 V; CL = 50 pF [1] - 4.6 7.5 ns [2] - 5 - pF VCC = 3.0 V to 3.6 V; CL = 15 pF 1.0 - 8.5 ns VCC = 4.5 V to 5.5 V; CL = 15 pF 1.0 - 6.5 ns VCC = 3.0 V to 3.6 V; CL = 50 pF 1.5 - 12.0 ns VCC = 4.5 V to 5.5 V; CL = 50 pF 1.5 - 8.0 ns VCC = 3.0 V to 3.6 V; CL = 15 pF 1.0 - 9.0 ns VCC = 4.5 V to 5.5 V; CL = 15 pF 1.0 - 7.0 ns VCC = 3.0 V to 3.6 V; CL = 50 pF 1.5 - 12.5 ns VCC = 4.5 V to 5.5 V; CL = 50 pF 1.5 - 8.5 ns CL = 50 pF; fi = 1 MHz; VI = GND to VCC Tamb = −40 °C to +85 °C tPZL, tPLZ propagation delay A and B to Y see Figure 5 Tamb = −40 °C to +125 °C tPZL, tPLZ propagation delay A and B to Y see Figure 5 [1] All typical values are measured at nominal VCC. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; (CL × VCC2 × fo) = dissipation due to the output if the combination of the pull up voltage and resistance results in VCC at the output. 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 6 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 13. Waveforms VI A, B input VM GND t PLZ t PZL VCC Y output VM VX VOL 001aad602 VM = 0.5VCC; VI = GND to VCC. VOL is the typical voltage output drop that occur with the output load. Fig 5. The data input (A, B) to output (Y) propagation delays S1 VCC PULSE GENERATOR VI RL = 1000 Ω VO VCC open GND D.U.T. CL RT mna232 Test data is given in Table 10. Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Load circuitry for switching times Table 10: Test data Input Load S1 VI tr, tf RL CL tPHZ, tPZH tPLZ, tPZL tPLH, tPHL GND to VCC ≤ 3.0 ns 1000 Ω 15 pF GND VCC open GND to VCC ≤ 3.0 ns 1000 Ω 50 pF GND VCC open 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 7 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 14. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 7. Package outline SOT353-1 (TSSOP5) 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 8 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 15. Abbreviations Table 11: Abbreviations Acronym Description CMOS Complementary Metal Oxide semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 16. Revision history Table 12: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74AHC1G09_1 20050926 Product data sheet - - - 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 9 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 17. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 20. Trademarks 19. Disclaimers Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 21. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 74AHC1G09_1 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 — 26 September 2005 10 of 11 74AHC1G09 Philips Semiconductors 2-input AND gate with open-drain output 22. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contact information . . . . . . . . . . . . . . . . . . . . 10 © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 26 September 2005 Document number: 74AHC1G09_1 Published in The Netherlands