VISHAY SI9113

Si9113
New Product
Vishay Siliconix
High-Voltage Current Mode PWM Controller for
ISDN Power Supplies
BiC/DMOS Technology
Current Mode Control
Max 50% Duty Cycle Operation
1.3-MHz Error Amp
Up to 500-kHz Internal Oscillator
Soft-Start
0.6-V Fast Over-Current Protection
<5-A Supply Current for +VIN <18 V
23.5-V to 200-V Input Voltage Range
Programmable Start/Stop Capability
Internal Start-Up Circuit
Power_Good Output
Si9113 is a current mode PWM controller for ISDN power
supplies. In a 14-pin SOIC package, it provides all necessary
functions to implement a single-switch PWM with a minimum
of external parts. To maximize the circuit integration, the
Si9113 is designed with a 200-V depletion mode MOSFET
capable of powering directly off the high input bus without an
external start-up circuit. The Start and Stop input voltage
thresholds can be programmed within the operating input
voltage range by means of a resistor divider, provided +VIN
(Start) > +VIN (Stop). The internal clock frequency is set with
a single external resistor and is capable of capacitor-coupled
external synchronization. In order to satisfy the stringent
ambient temperature requirements, the Si9113 is rated to
handle the industrial range of –40C to 85C.
VIN (23.5 V to 200 V)
VOUT
Start-Up
Drive
Current
Stop/Start
Power_Good
VREF = 1.3 V
Comparator
Fast
Current
Limit
Comparator
For Detailed Block Diagram See Page 7
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
.
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Si9113
New Product
Vishay Siliconix
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 V
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Power Dissipation (Package)a
14-Pin SOIC (Y Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Logic Inputs (OSC IN, OSC OUT, PWR_GOOD) . . . –0.3 V to VCC + 0.3 V
or 10 mA
Linear Inputs (FB, VREF, SENSE, SS) . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 to 85C
Thermal Impedance (QJA)
14-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.2 mW/C above 25C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23.5 V to 200 V
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 14 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VCC
Linear Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VCC – 3 V
FOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 kHz to 500 kHz
SPECIFICATIONSa
Limits
Test Conditions
Unless Otherwise Specified
–40 to 85C
Symbol
VCC = 10 V, +VIN = 48 V, ROSC = 390 kW
Tempb
Minc
Typd
Maxc
Unit
Output Voltage
VREF
OSCIN = – VIN (OSC Disabled)
RL = 10 MW
Room
Full
1.275
1.26
1.3
1.3
1.325
1.34
V
Short Circuit Current
ISREF
VREF = –VIN
Room
–25
–10
mA
IREF = 0 to –0.5 mA
Full
10
40
VCC = 10 to 14 V
Full
2
5
VUVSTART
Turn-On
Full
8.10
8.8
9.50
VUVSTOP
Turn-Off
Full
8.10
8.8
9.50
Parameter
Reference
Load Regulation
Line Regulation
DVREF
mV
UVLO
Under Voltage Lockout
Input Bias Current
ISTART
ISTOP
VSTOP = 8 V, VSTART = 8 V
Room
0.05
Room
0.05
Pre-Regulated VCC
VREG
Room
8.5
9.0
9.5
UVLO for VCC
VCCUV
Room
7.9
8.4
8.9
VREG – VCCUV
VD
Room
0.3
0.6
V
mA
V
PWR_Good Comparator
Rise Time
trpg
Fall Time
tfpg
Output Logic Low
CPWR_Good
PWR Good = 100 nF
ISINK = 2.5 mA
Room
35
Room
25
Room
0.4
mS
mS
0.8
V
Soft-Start
SS Current
ISS
Room
11
mA
Output Inhibit Voltage
VSS
Room
3.3
V
Oscillator
Maximum Frequencye
Initial Accuracy
fMAX
fOSC
Df/f
Voltage Stability
Temperature Coefficiente
TOSC
Maximum Duty Cycle
DMAX
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ROSC = 0
Room
ROSC = 390 k (Note f)
Room
500
80
100
120
ROSC = 180 k (Note f )
Room
160
200
240
Df/f = (f [14 V] – f [10 V]) / f [10 V]
Room
10
15
%
Full
450
650
ppm/C
fOSC = 100 kHz
Room
50
kHz
kH
%
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
Si9113
New Product
Vishay Siliconix
SPECIFICATIONSa
Limits
Test Conditions
Unless Otherwise Specified
–40 to 85C
Symbol
VCC = 10 V, +VIN = 48 V, ROSC = 390 kW
Tempb
Minc
Typd
Open Loop Voltage Gaine
AVOL
OSC IN = – VIN
Room
50
60
Input BIAS Current
IBIAS
VFB = 1.3 V
Room
–1
1
mA
Feedback Input Voltage
VFB
FB Tied to COMP, OSC IN = – VIN
Full
1.28
1.32
V
Parameter
Maxc
Unit
Error Amplifier
Dynamic Output Impedancee
ZOUT
Room
Unity Gain Bandwidthe
BW
Room
Output Current
IOUT
Power Supply Rejectione
1
1
dB
2
1.3
–5
kW
MHz
Source VFB = 0.8 V
Room
–1
Sink VFB = 1.8 V
Room
0.12
0.15
Room
50
70
0.5
0.6
0.7
V
100
150
ns
mA
PSRR
dB
Current Limit Comparator
Threshold Voltage
VSOURCE
VFB = 0 V
Full
td
VSENSE = 0.85 V, See Figure 1
Full
Output High Voltage
VOH
IOUT = –10 mA
Room
Full
Output Low Voltage
VOL
IOUT = 10 mA
Room
Full
Rise Time
tr
Fall Time
tf
CL = 500 p
pF
(10% to
t 90%)
Delay to
Outpute
Output Drive
9.7
9.5
0.3
0.5
Room
40
75
Room
40
75
V
ns
Supply
ICC
VCC = 10 V, ROSC = 390 kW
VUVUP vVIN v 200 V
Full
1
1.4
IVIN
Excluding I From Resistive Divider of
Stop and Start Pins
Room
75
100
IVIN
+VIN v 18 V, VSTART (Pin 14) < 8.8 V
Room
2
5
Supply Current
Supply Current UVLO Mode
mA
m
mA
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25C, Full = –40 to 85C.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f.
CSTRAY Pin 8 = v 5 pF.
SENSE
0.85 V –
50%
tr v 10 ns
0
td
VCC
90%
OUTPUT
0 –
FIGURE 1. Delay Time for Current Sense
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
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Si9113
New Product
Vishay Siliconix
VREF vs. Temperature (VIN = 48 V)
1.306
VUVSTART/VUVSTOP vs. Temperature
9.1
9.0
VCC = 14 V
VUVSTART /VUVSTOP (v)
VREF – (V)
1.304
1.302
VCC = 12 V
VCC = 10 V
1.300
8.9
8.8
8.7
8.6
8.5
1.298
–50
–25
0
25
50
75
8.4
–50
100
–25
0
50
75
100
Temperature (C)
Temperature (C)
Output Frequency vs. Oscillator Resistance
Supply Current vs. Output Frequency
2.0
300
1.6
VCC = 10 V
VCC = 14 V
I CC (mA)
FOUT (kHz)
25
100
1.2
VCC = 10 V
VCC = 12 V
0.8
0.4
0
10
10
100
1000
0
2000
50
100
FOSC (kW)
Output Frequency vs. Supply Voltage
200
250
300
Soft-Start Current vs. Temperature
24
13
ROSC = 1 MW
12
22
85C
VCC = 10 V
11
25C
20
I SS ( m A)
FOUT (kHz)
150
FOUT (kHz)
–40C
18
10
9
16
8
14
9
10
11
12
VCC (V)
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13
14
15
7
–40
–20
0
20
40
60
80
100
Temperature (C)
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
Si9113
New Product
Vishay Siliconix
UVLO Supply Current vs. VIN
Output Rise Time vs. Load
80
10
VCC = 10 V
Rise/Fall Time (nS)
60
I IN ( (mA)
85C
1
25C
40
20
–40C
0
0.1
11
13
15
17
19
21
0
200
VIN (V)
400
600
800
COUT (pF)
Efficiency vs. Output Power
90
VIN = 28 V
80
Efficiency (%)
70
VIN = 48 V
60
VIN = 99 V
50
40
30
20
10
0
200
400
600
800
1000
WO (mW)
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
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Si9113
New Product
Vishay Siliconix
SOIC-14
STOP
1
14 START
VIN
2
13 COMP
SENSE
3
12 FB
Si9113
PWR_GOOD
4
–VIN
5
10 SS
DRIVER
6
9
OSCOUT
VCC
7
8
OSCIN
Part Number
11 VREF
Si9113DY
Package
Bulk
–40 to 85C
Si9113DY-T1
Eval Kit
Top View
Temperature Range
Tape and Reel
Temperature Range
Board Type
–10 to 70C
Surface Mount and
Th H l
Thru-Hole
Si9113D1
Si9113D2
Pin Number
Name
1
STOP
2
+VIN
3
SENSE
4
PWR_GOOD
5
–VIN
6
DRIVER
7
VCC
8
OSCIN
9
OSCOUT
10
SS
11
VREF
12
FB
Set up the stop threshold of +VIN for VCC via resistive dividers
Input voltage to UVLO and Start-Up circuitry
Current sense amplifier input for current mode control and OCP.
Logic high PWR_Good signal indicates FB voltage is within regulation.
Ground pin
MOSFET gate drive signal.
Supply voltage to internal circuitry and MOSFET gate drive.
ROSC terminal
ROSC terminal, square waveform output
Soft-Start, time programmed by capacitor value.
1.3-V reference. Decoupled with 0.1-F capacitor.
Inverting input of an error amplifier.
13
COMP
Error amplifier output for external compensation network.
14
START
Set up the start threshold of +VIN for VCC via resistive dividers
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Function
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
Si9113
New Product
Vishay Siliconix
8
COMP
13
9
VCC
OSCIN
OSCOUT
OSC
PWR_GOOD
FB
VREF
Clock (1/2 fOSC)
4
Error
Amplifier
12
–
11
3.6 V
+ –
+
–
PWM
Comparator
R
+
Q
MOS Driver
S
SS
6
+
Ref
Gen
–
10
DRIVER
C/L
Comparator
5
0.6 V
3
VCC
VIN
STOP
START
–VIN
SENSE
7
2
1
14
Enable
Programmable
Start/Stop
Circuit
Start-Up
Pre-Regulator
Start-Up
The Si9113 start-up circuit prevents the internal circuits from
turning on until the voltage on the +VIN pin, via the resistor
divider R3, R4, R5, is sufficiently positive such that the voltage
across R3 (VSTART) is >8.8 V (typical value for the internal
reference VUVSTART [see Figure 2]). When this occurs, the
internal 1.3-V reference, soft-start and oscillator circuits are
enabled. A constant current source provides the current to the
external soft-start capacitor, which allows the output voltage to
rise gradually without overshoot. The output drive circuit is
disabled until the soft-start voltage reaches 3.3 V. The
controller is continuously powered in the state until the VIN
voltage falls and VSTOP drops below 8.8 V (the typical value for
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
the internal reference VUVSTOP). The user can program the
+VIN START and +VIN STOP voltage with the external resistor
divider R3–R5 (see Figure 2) as follows:
V IN(START) +
V IN(STOP) +
ǒ
ǒ
R3 ) R4 ) R5
R5
R3 ) R5
R5
Ǔ
Ǔ
V UVSTART
V UVSTOP
(1)
(2)
Since VUVSTART = VUVSTOP = 8.8 V (typical) the hysteresis
voltage can be expressed as:
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Si9113
Vishay Siliconix
DV IN +
ǒ Ǔ
R4
R5
V UVSTART
New Product
(3)
VCC Circuit
The depletion MOSFET process allows the Si9113 controller
to power directly from the high input bus voltage. Once
VUVSTART is met, the pre-regulator start-up circuit generates
the 9.0-V VCC voltage. The VCC voltage is used internally to
power the IC as well as providing the drive current for the
external MOSFET. An internal VCC circuit is disabled once a
higher external voltage (X10 V) is applied to this pin. If VCC is
below VCCUV, the Si9113 will inhibit the driver output switching.
period eliminating any chance of undesirable noise frequency.
When the output load current decreases to 0 A, the controller
is forced to enter the pulse skipping mode. This is a natural
phenomenal for all controllers since the duty cycle cannot
decrease linearly to 0%.
Error Amplifier
The reference voltage of Si9113 is set at 1.3 V. The reference
voltage is internally connected to the non-inverting input of
error amplifier. The reference is decoupled with 0.1-mF
capacitor.
The error amplifier gain-bandwidth product and slew rate are
critical parameters which determine the transient response of
converter. The transient response is the function of both small
and large signal responses. The small signal response is
determined by the converter closed loop bandwidth and phase
margin while the large signal is determined by the error
amplifier dv/dt and the inductor di/dt slew rate. Besides the
inductance value, the error amplifier determines the converter
response time. In order to minimize the response time, the
Si9113 is designed with 1.3-MHz error amplifier
gain-bandwidth product to generate the widest converter
bandwidth.
Soft-Start
Current Limit
The soft-start circuit provides a constant 10-mA current to
external capacitor attached to SS pin. A constant soft-start
current forces a gradual increase in duty cycle which in turn
ensures gradual output voltage rise without overshooting. The
soft-start time is programmed by the capacitance value.
Over current protection circuit is provided by monitoring the
voltage on the Sense pin. Once the current sense voltage
reaches 0.6V peak, the output drive stage is disabled for the
remainder of the clock cycle.
REF
Power_Good Comparator
Oscillator
The oscillator consists of a ring of CMOS inverters, capacitors,
and a capacitor discharge switch. An external resistor, ROSC,
between the OSCIN and OSCOUT pins sets the frequency. The
maximum frequency is obtained when ROSC = 0 W. A
frequency divider in the logic section limits the switch duty
cycle to 50% by locking the switching frequency to one-half of
the oscillator frequency.
The PWR_Good signal indicates the status of output voltage.
If the output voltage and VCC are within regulation, the
PWR_Good signal generates a logic high output by monitoring
the voltage on COMP and VCC pins. If either one is out of
regulation, a logic low PWR_Good signal is generated. The
capacitor at the PWR_Good pin determines the rise time of the
power good signal, once all the conditions are met for power
good. The PWR_Good signal is an open collector output
capable of sinking 2.5 mA.
PWM Mode
MOSFET Gate Drive
As the load and line voltage vary, the switching frequency
remains constant. The switching frequency is programmed by
the ROSC value as shown by the oscillator curve. In the PWM
mode, a duty cycle pulse is generated for each switching
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The DRIVER pin is designed to drive the low-side n-channel
MOSFET. Typically, the driver stage is sized to sink and source
200-mA of peak current when VCC = 12 V.
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
Si9113
New Product
Vishay Siliconix
28 – 99 V
+VIN
4
3
–VIN
T1
XFMR_EPC17
1
BR1
AC +
AC –
+ C1
22 mF
160 V
2
ESIG
DF02S
C4
1 mF
R13
D1
2.7 W
ESIG
R9
20 kW
7
D3
C12
0.1 mF
C10
220 mF
10 V
C10
NS2
2.2 mF
50 V
3
6
3
+
D4*
BZX84C43
1
COM2
NS3
3.3 V
C5
0.1 mF
9
NP
5
B130LB
8
COM1
R1
R10
13 kW
40 V
D2
1
1 MW
C7
8
7
6
OSCOUT
0.1 mF
12
4
GND
4
PWR_G
VREF
3
FB
ICS
COMP
VIN
START
STOP
13
14
R2
C8
300 kW 0.01 mF
R1
1
1 kW
2
C9
220 pF
1
Si9113
C3
100 pF
Q01 Si3420DV
5
SS
11
3
DR
10
0.001 mF
C6
1, 2, 5, 6
VCC
OSCIN
9
R2
2W
1/ W
2
R3
5.1 MW
R4
1 MW
R5
3.96 MW
*Optional
FIGURE 2. Dual Output Flyback Converter with 2% Regulation for 3.3 V
( As used on Demo Board—DB1)
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
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Si9113
New Product
Vishay Siliconix
28 – 99 V
+VIN
4
3
–VIN
T1
XFMR_EPC17
4
BR1
AC +
AC –
40 V
D2
1
+ C1
22 mF
160 V
2
ESIG
DF02S
R13
2.7 W
D1
C10
NS2
2.2 mF
50 V
3
5
C4
1 mF
3.3 V
B130LB
9
NS3
D3
2
NS1
R10
1
6
C11
220 mF
10 V
R1
1 MW
C7
7
VCC
OSCIN
9
OSCOUT
11
0.1 mF
12
3
Q01 Si3420DV
5
4
GND
4
PWR_G
VREF
FB
ICS
COMP
VIN
START
STOP
13
14
R2
C8
300 kW 0.01 mF
C12
0.1 mF
1, 2, 5, 6
DR
SS
0.001 mF
C6
C5
0.1 mF
6
10
+
COM1
12.7 kW
8
D4*
BZX84C43
COM2
1
ESIG 8
NP
R9
89 kW
3
+
3
R11
2
1 kW
C9
470 pF
1
Si9113
R2
2W
1/ W
2
R3
5.1 MW
C3
100 pF
R4
1 MW
R5
3.96 MW
*Optional
FIGURE 3. Dual Output Flyback Converter with Moderately Regulated Outputs
(As used on Demo Board DB-2)
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Document Number: 71093
S-99453—Rev. A . 29-Nov-99