Ordering number: EN 1197F CMOS IC LC7265 Received Frequency Display for Radio Receivers Package Dimensions Features . Displays received frequency of each band of FM, MW, LW static display). . (LED Counts local oscillation frequency and displays received . frequency. Number of display digits : FM-5 digits, MW-4 digits, LW-3 . digits. Covers intermediate frequencies shown below. unit : mm 3025B-DIP42S [LC7265] FM : . . . . . +10.700, +10.725, +10.750, +10.675 MHz –10.700, –10.725, –10.675, –10.650 MHz MW, LW : +450 kHz : 10 kHz step display +450 kHz : 1 kHz step display +455 kHz : 1 kHz step display +469 kHz : 1 kHz step display Contains blanking circuit to turn off display. Contains hold circuit to hold display contents. Uses crystal resonator having 7.2 MHz reference frequency. Uses LB3500 (÷8 prescaler) jointly at the time of FM reception. Supply voltage VDD : 4.5 V to 10 V SANYO : DIP42S Specifications Absolute Maximum Ratings at Ta = 25 °C, VSS = 0 V Parameter Maximum supply voltage Symbol Conditions VDD max Ratings Unit –0.3 to +11 V Input voltage VIN All input pins –0.3 to VDD+0.3 V Output voltage VO1 XOUT, HLD, 50 Hz, output: off –0.3 to VDD+0.3 V VO2 Output pins other than VO1 Allowable power dissipation Allowable power dissipation of segment outputs Pd max Ta % 65 °C 0 to 15 V 550 mW Pd (seg)1 MHz, b&c, b&e, VDD = 4.5 to 6.5 V, IOL = 33 mA 30 mW Pd (seg) 2 Other outputs, VDD = 4.5 to 6.5 V, IOL = 16.5 mA 15 mW Pd (seg) 3 MHz, b&c, b&e, VDD = 6.0 to 10 V, IOL = 36 mA 25 mW Pd (seg) 4 Other outputs, VDD = 6.0 to 10 V, IOL = 18 mA 12 mW Operating temperature Topr –30 to +65 °C Storage temperature Tstg –40 to +125 °C SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 63098HA(II)/6088YT/9105KI/3173KI/D162KI/7162KI/6242KI,TS No.1197-1/6 LC7265 Allowable Operating Ranges at Ta = 25 °C, VDD = 4.5 to 10 V, VSS = 0 V Parameter Supply voltage Input high-level voltage Input low-level voltage Input frequency Input amplitude Segment current Symbol Conditions min VDD typ max Unit 4.5 10 V VIH1 A/F, BLK 0.7VDD VDD V VIH2 FIF1, FIF2, FIF3, AIF1, AIF2 0.9VDD VDD V VIL1 A/F, BLK 0 0.3VDD V VIL2 FIF1, FIF2, FIF3, AIF1, AIF2 0 0.1VDD V fIN1 FMI, sine wave, capacitive coupling, VIN1 = 0.7Vp-p 1 18 MHz fIN2 AMI, sine wave, capacitive coupling, VIN2 = 0.5Vp-p* 0.5 3 MHz fIN3 XIN 0.2 7.5 MHz VIN1 FMI, sine wave, capacitive coupling, fIN1 = 1 to 18 MHz 0.7 0.9VDD Vp-p VIN2 AMI, sine wave, capacitive coupling, fIN2 = 0.5 to 3 MHz 0.5* 0.9VDD Vp-p VIN3 XIN, sine wave, capacitive coupling, fIN3 = 0.2 to 7.5 MHz 1.0 0.9VDD Vp-p Iseg1 MHz, b&e, b&c 0 30 mA Iseg2 Other outputs 0 15 mA *: For fIN2 = 0.5 MHz to 0.9 MHz and VDD = 8 to 10 V, VIN2 min = 1.0 Vp-p applies. Electrical Characteristics at Ta = 25 °C, VDD = 4.5 to 10 V, VSS = 0 V Parameter Input high-level current Symbol Conditions IIH1 FIF1, FIF2, FIF3, AIF1, AIF2 IIH2 BLK IIL1 FIF1, FIF2, FIF3, AIF1, AIF2 IIL2 BLK min VI = VDD VI = VDD VI = VSS typ 0 max Unit 10 µA 0 2 µA 0 10 µA 0 2 µA IIL3 A/F VI = VSS VI = VSS Input floating voltage VIF A/F VI = open Input/output high-level leakage current IOFF HLD, output off, VI = VDD 0 2 µA VOL1 HLD, output on, IO = 1 mA 0 1 V VOL2 b&e, b&c, MHz VDD = 4.5 to 10 V, IOL = 30 mA 0 0.7 V VOL3 Segments other than above VDD = 4.5 to 10 V, IOL = 15 mA 0 0.7 V VOL4 50 Hz, IO = 0.2 mA 0 1.0 V Input low-level current Output low-level voltage Input high-level threshold voltage Output off leakage current Current drain Vth IOFF2 IDD HLD All segments output pins, VO = 13 V, output off FM mode, A/F = open or VDD, fIN1 = 18 MHz, 0.7Vp-p or (AM mode, A/F = VSS, fIN2 = 3 MHz, 0.5Vp-p) fIN3 = 7.2 MHz, 1Vp-p FIF1, FIF2, FIF3 = VDD AIF1, AIF2 = VDD HLD, BLK = VDD other pins open 20 500 µA 0.8VDD VDD V 0.4VDD 0.5VDD 0.7VDD V 0 10 µA 0 18 mA Pin Assignment Top view No.1197-2/6 LC7265 Equivalent Circuit Block Diagram 1. Display 1-1 Display font 1-2 Lighting system Static lighting 1-3 . Display range (High-order 1 digit : zero blanking) . FM MHz to 199.95 MHz 50 kHz step . MW, LW :: 00.00 000 kHz to 1999 kHz 10 kHz or 1 kHz step 2. Pin Description 2-1 2-2 2-3 . a to g, b&c, b&e, MHz, kHz : LED .V ,V .X , X DD IN SS OUT : Power supply pins : Crystal resonator or input amp pin No.1197-3/6 LC7265 2-4 2-5 . FIF1, FIF2, FIF3 : FM IF select pins FIF1 0 0 0 0 1 1 1 1 FIF2 0 0 1 1 0 0 1 1 FIF3 0 1 0 1 0 1 0 1 IF (MHz) +10.700 +10.725 +10.675 +10.750 –10.700 –10.725 –10.675 –10.650 . AIF1, AIF2 : AM IF select pins AIF1 0 0 1 1 AIF2 0 1 0 1 IF (kHz) +450 (2) +450 (1) +455 +469 1 : High level (VDD) 0 : Low level (VSS) (Note) 450 kHz(1) : 10 kHz step display, others : 1 kHz step display 2-6 . HLD : Display contents hold pin Normally, this pin is set at high level. To hold display contents, this pin is set at low level. Connecting time constant circuit to this pin makes it possible to hold display contents for a certain period of time at the time of FM/MW, LW band selection. Internal clock A/F Depending on C, R HLD Display contents hold 2-7 Threshold voltage of e . BLK : Display blanking pin Example of blanking misdisplay at the time of application of power. 2-8 . FMI, AMI : Local oscillation signal input pins FMI — For FM : 0.7Vp-p input sensitivity AMI — For MW, LW : 1.0Vp-p input sensitivity (VDD = 8 to 10 V, fIN = 0.5 to 0.9 MHz) 0.5Vp-p input sensitivity (other than above) 2-9 . A/F : FM/MW, LW select pin FM — Pin open or high level MW, LW — Low level 2-10 . 50 Hz : 50 Hz time base output pin No.1197-4/6 LC7265 Hold time – time constant connected to HLD pin Time constant connected to BLK pin − VDD rise time Time constant connected to BLK pin (t = CR) – ms Hold time – ms To obtain 1-s hold time make time constant connected to HLD pin 720 ms. C = 2.2 µF R = 470 kΩ Note: time constant connected to HLD pin must be 100 ms or more. For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD For AMI input : 3 MHz, 0.5Vp-p, A/F = VSS For FMI input Common conditions For AMI input Other pins open VDD rise time – ms IDD – Ta Current drain, IDD – mA Current drain, IDD – mA Time constant connected to HLD pin, (t = CR) – ms IDD – VDD If VDD rise time is 200 ms, make time constant externally connected to BLK pin 200 ms or more. C = 1 µF or more R = 200 kΩ For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD For AMI input : 3 MHz, 0.5Vp-p,A/F = VSS For FMI input For AMI input Common conditions Other pins open Ambient temperature, Ta – °C Vp-p – fIN2 Input amplitude – mVp-p Input amplitude – mVp-p Supply voltage, VDD – V Vp-p – fIN1 FMI input frequency, fIN1 – Hz VDD – fIN1 AMI input frequency, fIN2 – Hz VDD – fIN2 Lower standard value FMI input frequency, fIN1 – MHz Supply voltage, VDD – V Supply voltage, VDD – V Upper standard value. VDD = 15 V or more Upper standard value Lower standard value AMI input frequency, fIN2 – MHz No.1197-5/6 LC7265 Upper standard value high-level threshold voltage Lower standard value low-level threshold voltage Vt – VDD BLK threshold voltage, Vt – V HLD threshold voltage, Vt – V Vt – VDD Supply voltage, VDD – V Supply voltage, VDD – V Segment outputs (IOL = 15 mA) other than 5b&e, 1b&c, MHz IOL – VOL Output current, IOL – mA Output impedance, ROUT – Ω ROUT – VDD Segment outputs other than MHz, b&c, b&e This data is in case of flowing current to one segment only. Segment outputs (IOL = 30 mA) of 5b&e, 1b&c, MHz Supply voltage, VDD – V Output voltage, VOL – V No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: 1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: 2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1998. Specifications and information herein are subject to change without notice. No.1197-6/6