Ordering number : EN5056A CMOS LSI LC75395E Single-Chip Electronic Volume Control System Overview Package Dimensions The LC75395E is an electronic volume control that provides volume, balance, five-band equalization and input switching functions. These functions are controlled from serial input data. unit: mm 3159-QFP64E [LC75395E] Functions • Volume control: The volume control provides 25 attenuation positions: from 0 dB to –17.5 dB in 1.25 dB steps, from –17.5 dB to –25 dB in 2.5 dB steps, from –25 dB to –36.25 dB in 3.75 dB steps and with settings for –41.25 dB, –50 dB, –60 dB and –∞. A balance function can be implemented by controlling the left and right channels independently. • Equalizer: The equalizer function supports ±10 dB control in 2 dB steps in each of the five bands. Of the five bands, four provide peaking characteristics, and one provides shelving characteristics. • Selector: The selector function selects one of four inputs for each of the left and right channels. An arbitrary amplification level can be set for each input signal using external components. • Serial data input: All controls can be set from serial input data (CCB format) SANYO: QIP64E Features • On-chip buffer amplifiers to minimize the number of external components • Silicon-gate CMOS process for minimal switching noise • On-chip circuit to generate the VDD/2 reference voltage • CCB is a trademark of SANYO ELECTRIC CO., LTD. • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol Conditions Ratings Maximum supply voltage VDD max VDD Maximum input voltage VIN max CL, DI, CE, L1 to L4, R1 to R4, LTIN, RTIN, LVRIN, RVRIN Allowable power dissipation Pd max Ta ≤ 85°C Unit 12 V VSS – 0.3 to VDD + 0.3 V 310 mW Operating temperature Topr –30 to +85 °C Storage temperature Tstg –40 to +125 °C SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 63096HA (OT)/71895HA (OT) No. 5056-1/17 LC75395E Allowable Operating Ranges at Ta = 25°C, VSS = 0 V max Unit Supply voltage Parameter VDD VDD 6.0 11.0 V Input high level voltage VIH CL, DI, CE 4.0 VDD V Input low level voltage VIL CL, DI, CE VSS 1.0 V Input voltage amplitude VIN CL, DI, CE, L1 to L4, R1 to R4, LTIN, RTIN, LVRIN, RVRIN VSS VDD Vp-p tøW Input pulse width Symbol Conditions min typ CL 1.0 µs Setup time tSETUP CL, DI, CE 1.0 µs Hold time tHOLD CL, DI, CE 1.0 Operating frequency fopg µs CL 500 kHz max Unit Electrical Characteristics at Ta = 25°C, VDD = 10 V, VSS = 0 V Parameter Symbol Conditions min typ [Input Block] Input resistance Rin L1 to L4, R1 to R4 Clipping level Vcl LSELO, RSELO: THD = 1.0% 1 MΩ Output load resistance RL LSELO, RSELO 3 Rin LVRIN, RVRIN 21 35 49 kΩ Geq Max, boost/cut dB 2.65 Vrms kΩ [Volume Control Block] Input resistance [Equalizer Control Block] Control range ±8 ±10 ±12 Step resolution Estep 1 2 3 dB Internal feedback resistance Rfeed 17 28 39 kΩ [Overall Characteristics] Total harmonic distortion Crosstalk Output at maximum attenuation THD (1) VIN = 1 Vrms, f = 1 kHz, with all controls flat overall 0.0033 % THD (2) VIN = 1 Vrms, f = 20 kHz, with all controls flat overall 0.012 % CT VIN = 1 Vrms, f = 1 kHz, with all controls flat overall Rg = 1 kΩ 86 dB VO min VIN = 1 Vrms, f = 1 kHz, with the main volume control at –∞ –84 dB VN (1) With all controls flat overall (IHF-A), Rg = 1 kΩ 3.9 µV VN (2) With all controls flat overall (DIN-AUDIO), Rg = 1 kΩ 5.4 µV 25 Output noise voltage Current drain IDD VDD – VSS = 11 V Input high level current IIH CL, DI, CE: VIN = 11 V Input low level current IIL CL, DI, CE: VIN = 0 V 33 mA 10 µA –10 µA Input Amplifier Characteristics at Ta = 25°C, VDD – VSS = 10 V Parameter Symbol Input offset voltage VIO Input offset current IIO Open-loop voltage gain AO 0 dB bandwidth fT Allowable load resistance RL Conditions min typ –10 VSS ≤ VIN ≤ VDD 3 max Unit +10 mV ±10 nA 80 dB 2.5 MHz kΩ No. 5056-2/17 LC75395E Equivalent Circuit Block Diagram and Sample Application Circuit A03544 Note: If at all possible, use bipolar capacitors for all capacitors that do not have a polarity specified. No. 5056-3/17 LC75395E Test Circuits 1. Total Harmonic Distortion A03545 No. 5056-4/17 LC75395E Test Circuits 2. Output Noise Voltage A03546 No. 5056-5/17 LC75395E Test Circuits 3. Crosstalk A03547 No. 5056-6/17 LC75395E Pin Assignment A03548 No. 5056-7/17 LC75395E Pin Functions Pin No. Symbol 12 LF1C1 11 LF1C2 10 LF1C3 37 RF1C1 38 RF1C2 39 RF1C3 9 LF2C1 8 LF2C2 7 LF2C3 40 RF2C1 41 RF2C2 42 RF2C3 6 LF3C1 5 LF3C2 4 LF3C3 43 RF3C1 44 RF3C2 45 RF3C3 3 LF4C1 2 LF4C2 1 LF4C3 46 RF4C1 47 RF4C2 48 RF4C3 Function Note The left channel F1 band control block. These are external capacitor connections. The right channel F1 band control block. These are external capacitor connections. The left channel F2 band control block. These are external capacitor connections. The right channel F2 band control block. These are external capacitor connections. The left channel F3 band control block. These are external capacitor connections. The right channel F3 band control block. These are external capacitor connections. The left channel F4 band control block. These are external capacitor connections. A03549 The right channel F4 band control block. These are external capacitor connections. 13 LTIN Tone control inputs 36 RTIN These must be driven by low-impedance circuits. A03550 14 LSELO 35 RSELO Input selector outputs A03551 64 LF5 F5 band control block. 49 RF5 These are external capacitor connections. A03552 21 L1 19 L2 17 L3 16 L4 28 R1 30 R2 32 R3 33 R4 57 VDD Power supply 22, 26 VSS Internal logic system ground 27 AVSS Signal inputs A03553 Internal operational amplifier ground Continued on next page. No. 5056-8/17 LC75395E Continued from preceding page. Pin No. Symbol Function 56 Vref VDD/2 voltage generation block. A capacitor must be inserted between Vref and VSS to suppress power supply ripple. Note A04449 63 LVref 50 RVref 15 LINVIN1 34 RINVIN1 Common pins for the volume control, tone control and input switching blocks. Since capacitors inserted between LVref (or RVref) and VSS become the residual resistance when the volume control is set at maximum attenuation, the values of these capacitors must be chosen carefully. A voltage higher than VDD must never be applied. A03555 Inverting inputs for the operational amplifiers that set the input gain. A03556 62 LINVIN2 51 RINVIN2 61 LTOUT 52 RTOUT Inverting inputs for the graphic equalizer operational amplifiers. Unnecessary frequency bands can be excluded and oscillation prevented by inserting arbitrary capacitors between the INVIN2 and TOUT pins. A03557 Tone control outputs A03558 60 LVRIN Volume control inputs 53 RVRIN These must be driven by low-impedance circuits. A03559 58 LVROUT 55 RVROUT Volume control outputs A03560 Chip enable 25 CE 24 DI 23 CL 18 NC 20 NC 29 NC 31 NC 54 NC 59 NC Data is read into the internal latches and the analog switches operate when this pin goes from high to low. Data transfer is enabled when this pin is high. A03561 Serial data and clock connections for chip control Unused pins No. 5056-9/17 LC75395E Input Block Internal Equivalent Circuit Diagram A03562 Volume Control Block Internal Equivalent Circuit Diagram A03563 No. 5056-10/17 LC75395E Equalizer Control Block Internal Equivalent Circuit (bands F1 to F4) A03564 External Capacitor Calculations The LC75395E supports four bands with peaking characteristics and one band with shelving characteristics. 1. Peaking Characteristics (bands F1 to F4) The external capacitor functions as the structural element of a simulated inductor. The equivalent circuit and the calculations required to achieve the desired center frequency are shown below. • Equivalent circuit for the simulated inductor A03565 No. 5056-11/17 LC75395E • Sample Calculation Specifications 1) Center frequency FO = 107 Hz 2) Q at maximum boost: Q+10 dB = 0.8 ➀ Derive the sharpness (QO) of the simulated inductor itself. QO = (R1 + R4)/R1 × Q+10 dB ≠ 4.270 ➁ Derive C1. C1 = 1/2πFOR1QO ≠ 0.536 (µF) ➂ Derive C2. C2 = QO/2πFOR2 ≠ 0.021 (µF) • Sample values for C1 and C2 Center frequency FO (Hz) C1 (F) C2 (F) 107 0.536 µ 0.021 µ 340 0.169 µ 6663 p 1070 0.054 µ 2117 p 3400 0.017 µ 666 p 2. Shelving Characteristics (band F5) To achieve ±10 dB (in 2 dB steps) at the target frequency, use an external capacitor C3 which has an impedance of 650 Ω. No. 5056-12/17 LC75395E Control System Timing and Data Format The LC75395E is controlled by inputting stipulated data to the CE, CL, and DI pins. The data consists of a total of 40 bits, of which 8 bits are address and 32 bits are data. A03566 No. 5056-13/17 LC75395E A03730 A03731 No. 5056-14/17 LC75395E A03732 A03734 A03733 A03735 No. 5056-15/17 LC75395E A03736 A03738 A03737 A03739 Usage Notes 1. The states of the internal analog switches are undefined when power is first applied. Muting should be applied externally until control data has been transferred and stored. 2. The signal lines for the CL, DI and CE pins should either be covered by the pattern ground or be formed from shielded cable to prevent the high-frequency digital signals transmitted over these lines from entering the analog system. No. 5056-16/17 LC75395E ■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. ■ Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. ■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of November, 1997. Specifications and information herein are subject to change without notice. No. 5056-17/17