Ordering number : ENN4966C CMOS IC LC75842E, LC75842M General-Purpose 1/2 Duty LCD Display Driver Overview Package Dimensions The LC75842E and LC75842M are 1/2 duty generalpurpose LCD display drivers for applications such as microprocessor-controlled electronic tuning. They can drive up to 54 segments directly. unit: mm 3162C-QFP36 [LC75842E] Features 19 27 28 7.0 9.0 18 36 10 1 9 0.65 0.15 0.3 (1.5) 1.7max (0.9) 0.1 • 1/2 duty, 1/2 bias drive of up to 54 segments • Serial data input supports CCB* format communication with the system controller. • Backup function which is based on a power saving mode and all segments off functions that are controlled by serial data. • High generality, since display data is displayed directly without decoder intervention. • The display can be forced to the off state with the INH pin. • RC oscillator circuit 0.5 9.0 7.0 SANYO: QFP36 * • CCB is a trademark of SANYO ELECTRIC CO., LTD. unit: mm • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. 3204-MFP36S [LC75842M] SANYO: MFP36S Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 92501TN (OT)/41096HA (OT)/61595HA (OT) No. 4966-1/10 LC75842E, LC75842M Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Maximum supply voltage Input voltage Output voltage Output current Allowable power dissipation Symbol VDD max Conditions Ratings Unit VDD –0.3 to +6.5 VIN1 CE, CL, DI, INH –0.3 to +6.5 V VIN2 OSC –0.3 to VDD + 0.3 V –0.3 to VDD + 0.3 V 100 µA VOUT OSC, S1 to S27, COM1, COM2 IOUT1 S1 to S27 IOUT2 COM1, COM2 Pd max Ta = 85°C V 1 mA 100 mW Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 °C Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Symbol Conditions Ratings min typ Supply voltage VDD VDD Input high level voltage VIH CE, CL, DI, INH 0.8 VDD VIL CE, CL, DI, INH 0 Input low level voltage Recommended external resistance ROSC OSC Recommended external capacitance COSC OSC Guaranteed oscillator range fOSC OSC 4.0 5.0 Unit max 6.0 V 6.0 V 0.2 VDD 68 680 25 50 V kΩ pF 100 kHz Low level clock pulse width tøL CL: Figure 1 160 ns High level clock pulse width tøH CL: Figure 1 160 ns Data setup time tds CL, DI: Figure 1 160 ns Data hold time tdh CL, DI: Figure 1 160 ns CE wait time tcp CE, CL: Figure 1 160 ns CE setup time tcs CE, CL: Figure 1 160 ns CE hold time tch CE, CL: Figure 1 160 ns INH switching time tc INH, CE: Figure 3 10 µs Electrical Characteristics in the Allowable Operating Ranges Parameter Symbol Conditions Hysteresis voltage VH CE, CL, DI, INH: VDD = 5.0 V Input high level current IIH CE, CL, DI, INH: VI = 6.0 V Input low level current Output high level voltage Output low level voltage Output middle level voltage Oscillator frequency Current drain IIL typ Unit max 0.4 V 5.0 µA –5.0 µA VOH1 S1 to S27: IO = –10 µA VDD – 1.0 V VOH2 COM1, COM2: IO = –100 µA VDD – 0.6 VOL1 S1 to S27: IO = 10 µA 1.0 VOL2 COM1, COM2: IO = 100 µA 0.6 V VMID1 COM1, COM2: VDD = 6.0 V, IO = ±100 µA 2.4 3.0 3.6 V VMID2 CE, CL, DI, INH: VI = 0 V Ratings min V V COM1, COM2: VDD = 4.0 V, IO = ±100 µA 1.4 2.0 2.6 V fOSC OSC: ROSC = 68 kΩ, COSC = 680 pF 40 50 60 kHz IDD1 Power saving mode 5 µA IDD2 VDD = 6.0 V, output open, fOSC = 50 kHz 1.2 2.0 mA No. 4966-2/10 LC75842E, LC75842M 1. When CL is stopped at the low level VIH CE VIL tøH VIH 50% VIL CL tøL tcp tcs tch VIH DI VIL tds tdh 2. When CL is stopped at the high level VIH CE VIL tøL VIH 50% VIL CL tøH tcp tcs tch VIH DI VIL tds tdh A03902 Figure 1 19 18 S18 VDD INH S17 VSS S15 S16 LC75842E CE S13 DI S12 COM2 S11 36 10 1 S10 9 S9 S8 S7 S6 S5 S4 S3 S2 Top view S1 36 19 LC75842M S14 CL COM1 CE VSS INH VDD OSC S27 S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S19 S20 S21 S22 S23 S24 S25 27 28 1 18 CL DI COM2 COM1 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 OSC S26 S27 Pin Assignments Top view A03195 No. 4966-3/10 LC75842E, LC75842M COMMON DRIVER S27 S26 SEGMENT DRIVER & LATCH CLOCK GENERATOR OSC S25 S1 COM2 COM1 Block Diagram SHIFT REGISTER INH VDD CCB INTERFACE DI CL CE VSS A03196 Pin Functions Pin S1 to S27 Pin No. LC75842E LC75842M Active I/O Handling when unused Segment outputs for displaying the display data transferred by serial data input. — O Open Common driver outputs. The frame frequency fO is fOSC/512 Hz. — O Open I/O VDD I GND L I GND Function 1 to 27 5 to 31 COM1 36 4 COM2 35 3 OSC 28 32 Oscillator connection. An oscillator circuit is formed by connecting an external resistor and capacitor at this pin. — CE 32 36 Serial data transfer inputs. Must be connected to the control microprocessor. H CL 33 1 DI 34 2 CE: Chip enable CL: Synchronization clock DI: Transfer data — Display off control input INH = low (VSS) .....Display off (S1 to S27, COM1 and COM2 = low) INH 30 34 INH = high (VDD)....Display on However, serial data transfer is possible when the display is forced off by this pin. VDD 29 33 Power supply. Provide a power supply voltage of between 4.0 and 6.0 V. — — — VSS 31 35 Power supply. Connect this pin to ground. — — — No. 4966-4/10 LC75842E, LC75842M Serial Data Transfer Format 1. When CL is stopped at the low level CE CL DI 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D1 D2 D3 CCB address 8 bits D25 D26 D27 D28 BU Display data 28 bits SC 0 0 Control data 4 bits CE CL DI 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits D29 D30 D31 Display data 26 bits D53 D54 0 0 0 0 0 1 Fixed data 6 bits A03197 No. 4966-5/10 LC75842E, LC75842M 2. When CL is stopped at the high level CE CL DI 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D1 D2 D3 CCB address 8 bits D25 D26 D27 D28 BU Display data 28 bits SC 0 0 Control data 4 bits CE CL DI 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D29 D30 D31 CCB address 8 bits D53 D54 0 0 Display data 26 bits 0 0 0 1 BU SC 0 0 0 0 0 1 Fixed data 6 bits Figure 2 • CCB address......44H • D1 to D54..........Display data Dn (n = 1 to 54) = 1: Segment on Dn (n = 1 to 54) = 0: Segment off • BU .....................Control data for specifying normal mode or power saving mode • SC......................Control data for specifying all segments on or off Serial Data Transfer Example When 29 or more segments are used all 80 bits of the serial data must be sent. 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D1 D2 D3 D29 D30 D31 D25 D26 D27 D28 D53 D54 0 0 When fewer than 29 segments are used only the first 40 bits of the serial data can be sent. However, all 80 bits must be sent after power is first applied. 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D1 D2 D3 D25 D26 D27 D28 BU SC 0 0 0 0 0 1 Note: The following type of transfer cannot be used when fewer than 29 segments are used. 0 0 1 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D29 D30 D31 D53 D54 0 0 No. 4966-6/10 LC75842E, LC75842M Control Data Functions 1. BU: Control data for specifying normal mode or power saving mode This control data bit is used to control the normal mode/power saving mode state of the LC75842E and LC75842M. BU Mode 0 Normal mode 1 Power saving mode (The OSC pin oscillator is stopped and the common and segment output pins go to the VSS level.) 2. SC: Control data for specifying all segments on or off This control data bit is used to turn all segments on or off. SC Display state 0 On 1 Off Note that when SC is 1 the display is turned off by outputting the segment off waveforms from the segment pins. Correspondence between Display Data and Segment Output Pins Segment output pin COM1 COM2 Segment output pin COM1 COM2 S1 D1 D2 S15 D29 D30 S2 D3 D4 S16 D31 D32 S3 D5 D6 S17 D33 D34 S4 D7 D8 S18 D35 D36 S5 D9 D10 S19 D37 D38 S6 D11 D12 S20 D39 D40 S7 D13 D14 S21 D41 D42 S8 D15 D16 S22 D43 D44 S9 D17 D18 S23 D45 D46 S10 D19 D20 S24 D47 D48 S11 D21 D22 S25 D49 D50 S12 D23 D24 S26 D51 D52 S13 D25 D26 S27 D53 D54 S14 D27 D28 For example, the table below lists the output states for the S11 segment output pin. Display data Segment output pin (S11) state D21 D22 0 0 Both segments for COM1 and COM2 are off. 0 1 Segment for COM2 is on. 1 0 Segment for COM1 is on. 1 1 Both segments for COM1 and COM2 are on. No. 4966-7/10 LC75842E, LC75842M Output Waveforms (1/2 duty, 1/2 bias drive) COM1 VDD 1/2VDD VSS COM2 VDD 1/2VDD VSS fOSC [Hz] 512 S1 to S27 output when LCD segments corresponding to COM1 are on VDD S1 to S27 output when LCD segments corresponding to COM2 are on VDD S1 to S27 output when LCD segments corresponding to both COM1 and COM2 are on VDD S1 to S27 output when LCD segments corresponding to both COM1 and COM2 are turned off VDD VSS VSS VSS VSS A03198 INH and Display Control Since the IC internal data (D1 to D54 and control data) is undefined when power is first applied, the display is turned off (S1 to S27, COM1 and COM2 = low) by setting INH pin low at the same time as power is applied. Then, meaningless display at the power on can be prevented by transferring all 80 bits of serial data from the controller while the display is turned off and INH pin high after the transfer completes. (See Figure 3.) VDD R INH C A03199 VDD INH VIL t1 tc CE VIL Display data and control data transfer Internal data t1 : Determined by the RC circuit Undefined Defined tc : 10 µs min. A03200 Figure 3 No. 4966-8/10 LC75842E, LC75842M Notes on Transferring Display Data from the Controller Since the LC75842E and LC75842M take the display data (D1 to D54) in two separate transfer operations as shown in Figure 2, we recommend that all the display data be transferred within 30 [ms] to maintain the quality of the displayed image. Sample Display Example in which 40 segments are used (up to 54 segments can be used) ③ FM MW LW ① ⑦ ⑦ ⑦ ③ ① CH MHz kHz STEREO ① MONO ① AUTO TUNE ① ⑧ Note: The numbers in circles indicate the number of segments. Sample Application Circuit 1 680 pF OSC COM1 VDD COM2 INH S1 VSS S2 68 kΩ + CE From the controller CL S26 DI S27 LCD panel (up to 54 segments) +5V A03201 Sample Application Circuit 2 680 pF OSC COM1 VDD COM2 INH S1 VSS S2 68 kΩ + From the controller CE CL S26 DI S27 LCD panel (up to 54 segments) +5V A03202 No. 4966-9/10 LC75842E, LC75842M Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of September, 2001. Specifications and information herein are subject to change without notice. PS No. 4966-10/10