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..........................................................................................................2 Combination .......................................................................................................2 Full Production (No Designation on Document) ...................................2 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 7 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Block Diagram of Simultaneous Operation Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . .9 7DEOH:6-6HFWRU$GGUHVV7DEOH 7DEOH:6-6HFWRU$GGUHVV7DEOH Command Definitions . . . . . . . . . . . . . . . . . . . . . . 47 Reading Array Data ........................................................................................... 47 Set Configuration Register Command Sequence .....................................48 )LJXUH6\QFKURQRXV$V\QFKURQRXV6WDWH'LDJUDP Read Mode Setting ......................................................................................... 49 Programmable Wait State Configuration ............................................... 49 7DEOH3URJUDPPDEOH:DLW6WDWH6HWWLQJV Standard wait-state Handshaking Option ............................................... 50 7DEOH:DLW6WDWHVIRU6WDQGDUGZDLWVWDWH+DQGVKDNLQJ Special Handling Instructions for FBGA Package ........................................9 Read Mode Configuration ............................................................................ 51 Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . 10 Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 11 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 13 7DEOH5HDG0RGH6HWWLQJV 128 Mb Products based on 110 nm Floating Gate Technology ............... 14 64 Mb Products based on 110 nm Floating Gate Technology ................ 14 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 15 7DEOH'HYLFH%XV2SHUDWLRQV Requirements for Asynchronous ReadOperation (Non-Burst) ............15 Requirements for Synchronous (Burst) Read Operation ........................15 8-, 16-, and 32-Word Linear Burst with Wrap Around ...................... 16 7DEOH%XUVW$GGUHVV*URXSV Configuration Register .......................................................................................17 Handshaking ...........................................................................................................17 Simultaneous Read/Write Operations with Zero Latency .....................17 Writing Commands/Command Sequences ..................................................17 Accelerated Program Operation ................................................................... 18 Autoselect Mode ................................................................................................. 18 7DEOH$XWRVHOHFW&RGHV+LJK9ROWDJH0HWKRG Sector/Sector Block Protection and Unprotection .................................. 19 7DEOH6:6--%RRW6HFWRU6HFWRU%ORFN$GGUHVVHVIRU 3URWHFWLRQ8QSURWHFWLRQ 7DEOH6:6-%RRW6HFWRU6HFWRU%ORFN$GGUHVVHVIRU 3URWHFWLRQ8QSURWHFWLRQ Advanced Sector Protection/Unprotection . . . . 24 )LJXUH$GYDQFHG6HFWRU3URWHFWLRQ8QSURWHFWLRQ Lock Register ........................................................................................................25 7DEOH/RFN5HJLVWHU Persistent Protection Bits .................................................................................25 )LJXUH33%3URJUDP(UDVH$OJRULWKP Dynamic Protection Bits ...................................................................................27 Persistent Protection Bit Lock Bit ................................................................ 28 Password Protection Method ........................................................................ 28 )LJXUH/RFN5HJLVWHU3URJUDP$OJRULWKP Advanced Sector Protection Software Examples .................................... 30 7DEOH6HFWRU3URWHFWLRQ6FKHPHV Hardware Data Protection Methods ........................................................... 30 WP# Method .................................................................................................. 30 ACC Method ................................................................................................... 30 Low VCC Write Inhibit ................................................................................. 30 Write Pulse “Glitch Protection” .................................................................31 Power-Up Write Inhibit .................................................................................31 Burst Active Clock Edge Configuration ................................................... 51 RDY Configuration ......................................................................................... 51 Configuration Register ....................................................................................... 51 7DEOH&RQILJXUDWLRQ5HJLVWHU Reset Command ................................................................................................. 52 Autoselect Command Sequence ................................................................... 52 Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence ...........................................................................................53 Program Command Sequence ........................................................................ 54 Unlock Bypass Command Sequence ........................................................ 54 )LJXUH3URJUDP2SHUDWLRQ Chip Erase Command Sequence ................................................................... 55 Sector Erase Command Sequence ................................................................ 56 Erase Suspend/Erase Resume Commands .................................................. 56 )LJXUH(UDVH2SHUDWLRQ Password Program Command ....................................................................... 58 Password Verify Command ............................................................................. 58 Password Protection Mode Locking Bit Program Command .............. 58 Persistent Sector Protection Mode Locking Bit Program Command ........................................................................................... 58 Secured Silicon Sector Protection Bit Program Command .................. 59 PPB Lock Bit Set Command ............................................................................ 59 DPB Write/Erase/Status Command ............................................................. 59 Password Unlock Command .......................................................................... 59 PPB Program Command ..................................................................................60 All PPB Erase Command ..................................................................................60 PPB Status Command .......................................................................................60 PPB Lock Bit Status Command ......................................................................60 Command Definitions ........................................................................................ 61 7DEOH&RPPDQG'HILQLWLRQV Write Operation Status . . . . . . . . . . . . . . . . . . . . 63 DQ7: Data# Polling ........................................................................................... 63 )LJXUH'DWD3ROOLQJ$OJRULWKP RDY: Ready .......................................................................................................... 64 DQ6: Toggle Bit I ............................................................................................... 65 )LJXUH7RJJOH%LW$OJRULWKP DQ2: Toggle Bit II .............................................................................................. 66 7DEOH'4DQG'4,QGLFDWLRQV Reading Toggle Bits DQ6/DQ2 ..................................................................... 67 DQ5: Exceeded Timing Limits ........................................................................ 67 DQ3: Sector Erase Timer ................................................................................68 Common Flash Memory Interface (CFI) . . . . . . 31 7DEOH:ULWH2SHUDWLRQ6WDWXV 7DEOH&),4XHU\,GHQWLILFDWLRQ6WULQJ 7DEOH6\VWHP,QWHUIDFH6WULQJ 7DEOH'HYLFH*HRPHWU\'HILQLWLRQ 7DEOH3ULPDU\9HQGRU6SHFLILF([WHQGHG4XHU\ Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 69 June 24, 2005 S29WS-J_00_A4 )LJXUH0D[LPXP1HJDWLYH2YHUVKRRW:DYHIRUP )LJXUH0D[LPXP3RVLWLYH2YHUVKRRW:DYHIRUP Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 70 5 D a t a Commercial (C) Devices ............................................................................. 70 Wireless (W) Devices .................................................................................. 70 Industrial (I) Devices ..................................................................................... 70 Supply Voltages ............................................................................................... 70 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 71 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 )LJXUH7HVW6HWXS 7DEOH7HVW6SHFLILFDWLRQV Key to Switching Waveforms . . . . . . . . . . . . . . . 72 Switching Waveforms . . . . . . . . . . . . . . . . . . . . . 72 )LJXUH,QSXW:DYHIRUPVDQG0HDVXUHPHQW/HYHOV AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 73 VCC Power-up ......................................................................................................73 )LJXUH9&&3RZHUXS'LDJUDP CLK Characterization ........................................................................................73 )LJXUH&/.&KDUDFWHUL]DWLRQ Synchronous/Burst Read ...................................................................................74 )LJXUH&/.6\QFKURQRXV%XUVW0RGH5HDG ULVLQJDFWLYH&/. )LJXUH&/.6\QFKURQRXV%XUVW0RGH5HDG )DOOLQJ$FWLYH&ORFN )LJXUH6\QFKURQRXV%XUVW0RGH5HDG )LJXUHZRUG/LQHDU%XUVWZLWK:UDS$URXQG )LJXUH/LQHDU%XUVWZLWK5'<6HW2QH&\FOH%HIRUH'DWD Asynchronous Mode Read .............................................................................. 78 )LJXUH$V\QFKURQRXV0RGH5HDGZLWK/DWFKHG$GGUHVVHV )LJXUH$V\QFKURQRXV0RGH5HDG Hardware Reset (RESET#) ...............................................................................79 )LJXUH5HVHW7LPLQJV Erase/Program Operations .............................................................................. 81 )LJXUH$V\QFKURQRXV3URJUDP2SHUDWLRQ7LPLQJV$9' /DWFKHG$GGUHVVHV 6 S h e e t )LJXUH$V\QFKURQRXV3URJUDP2SHUDWLRQ7LPLQJV:(/DWFKHG $GGUHVVHV )LJXUH6\QFKURQRXV3URJUDP2SHUDWLRQ7LPLQJV:(/DWFKHG $GGUHVVHV )LJXUH6\QFKURQRXV3URJUDP2SHUDWLRQ7LPLQJV&/./DWFKHG $GGUHVVHV )LJXUH&KLS6HFWRU(UDVH&RPPDQG6HTXHQFH )LJXUH$FFHOHUDWHG8QORFN%\SDVV3URJUDPPLQJ7LPLQJ )LJXUH'DWD3ROOLQJ7LPLQJV'XULQJ(PEHGGHG$OJRULWKP )LJXUH7RJJOH%LW7LPLQJV'XULQJ(PEHGGHG$OJRULWKP )LJXUH6\QFKURQRXV'DWD3ROOLQJ7LPLQJV7RJJOH%LW7LPLQJV )LJXUH'4YV'4 Temporary Sector Unprotect ........................................................................89 )LJXUH7HPSRUDU\6HFWRU8QSURWHFW7LPLQJ'LDJUDP )LJXUH6HFWRU6HFWRU%ORFN3URWHFWDQG8QSURWHFW7LPLQJ 'LDJUDP )LJXUH/DWHQF\ZLWK%RXQGDU\&URVVLQJ )LJXUH/DWHQF\ZLWK%RXQGDU\&URVVLQJLQWR 3URJUDP(UDVH%DQN )LJXUH([DPSOHRI:DLW6WDWHV,QVHUWLRQ )LJXUH%DFNWR%DFN5HDG:ULWH&\FOH7LPLQJV Erase and Programming Performance . . . . . . . . 94 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 95 VBH084 - 84-ball Fine-Pitch Ball Grid Array (FBGA) 8x11.6 mm MCP Compatible Package (128Mb) .......................................................................... 95 VBR080 - 80-ball Fine-Pitch Ball Grid Array (FBGA) 7 x 9 mm (64Mb) ................................................................................ 96 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . 97 Revision A0 (July 22, 2004) ............................................................................. 97 Revision A1 (October 6, 2004) ....................................................................... 97 Revision A2 (December 10, 2004) ................................................................. 97 Revision A3 (February 19, 2005) .................................................................... 97 Revision A4 (June 21, 2005) ............................................................................. 97 S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Product Selector Guide Synchronous/Burst Asynchronous 66 MHz 80 MHz (Note) 0D[%XUVW$FFHVV7LPHQVW%$&& 0D[2($FFHVVQVW2( Speed Option 0D[/DWHQF\QVW,$&& 66 MHz 80 MHz (Note) 0D[$FFHVV7LPHQVW$&& 0D[&($FFHVVQVW&( 0D[2($FFHVVQVW2( Speed Option 1RWH0+]RSWLRQLVDYDLODEOHIRU6:6-RQO\ Block Diagram 9&& '4±'4 966 966,2 5'< %XIIHU 5'< (UDVH9ROWDJH *HQHUDWRU :( 5(6(7 :3 $&& ,QSXW2XWSXW %XIIHUV 6WDWH &RQWURO &RPPDQG 5HJLVWHU 3*09ROWDJH *HQHUDWRU 2( 9&& 'HWHFWRU %XUVW 6WDWH &RQWURO $9' &/. 7LPHU %XUVW $GGUHVV &RXQWHU $GGUHVV/DWFK &KLS(QDEOH 2XWSXW(QDEOH /RJLF &( 'DWD /DWFK <'HFRGHU <*DWLQJ ;'HFRGHU &HOO0DWUL[ $PD[±$ $PD[:6-$:6-$ June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 7 D a t a S h e e t Block Diagram of Simultaneous Operation Circuit Bank A Address Bank A Latches and Control Logic VSS VSSIO Y-Decoder VCC DQ15–DQ0 Amax–A0 X-Decoder OE# WP# ACC RESET# WE# CE# AVD# RDY DQ15–DQ0 Bank B Latches and Control Logic Y-Decoder Bank B Address DQ15–DQ0 X-Decoder Amax–A0 STATE CONTROL & COMMAND REGISTER DQ15–DQ0 Status Control Amax–A0 Amax–A0 Bank C Latches and Control Logic Bank C Address Y-Decoder X-Decoder DQ15–DQ0 Amax–A0 Bank D Latches and Control Logic Bank D Address Y-Decoder X-Decoder DQ15–DQ0 1RWH$PD[:6-$:6-$ 8 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Connection Diagram 6:6EDOO)LQH3LWFK%DOO*ULG$UUD\ 7RS9LHZ%DOOV)DFLQJ'RZQ A1 A2 A3 A4 A5 A6 A7 A8 AVD# RFU CLK RFU RFU RFU RFU RFU B1 B2 B3 B4 B5 B6 B7 B8 WP# A7 RFU ACC WE# A8 A11 RFU C1 C2 C3 C4 C5 C6 C7 C8 A3 A6 RFU RESET# RFU A19 A12 A15 D1 D2 D3 D4 D5 D6 D7 D8 A2 A5 A18 RDY A20 A9 A13 A21 E1 E2 E3 E4 E5 E6 E7 E8 A1 A4 A17 RFU RFU A10 A14 RFU F1 F2 F3 F4 F5 F6 F7 F8 A0 VSS DQ1 RFU RFU DQ6 RFU A16 G1 G2 G3 G4 G5 G6 G7 G8 CE#f1 OE# DQ9 DQ3 DQ4 DQ13 DQ15 RFU H1 H2 H3 H4 H5 H6 H7 H8 RFU DQ0 DQ10 VCC RFU DQ12 DQ7 VSS J1 J2 J3 J4 J5 J6 J7 J8 RFU DQ8 DQ2 DQ11 RFU DQ5 DQ14 RFU K1 K2 K3 K4 K5 K6 K7 K8 RFU RFU RFU VCC RFU RFU RFU RFU Special Handling Instructions for FBGA Package 6SHFLDOKDQGOLQJLVUHTXLUHGIRU)ODVK0HPRU\SURGXFWVLQ)%*$SDFNDJHV )ODVKPHPRU\GHYLFHVLQ)%*$SDFNDJHVPD\EHGDPDJHGLIH[SRVHGWRXOWUDVRQLFFOHDQLQJPHWK RGV7KHSDFNDJHDQGRUGDWDLQWHJULW\PD\EHFRPSURPLVHGLIWKHSDFNDJHERG\LVH[SRVHGWR WHPSHUDWXUHVDERYH&IRUSURORQJHGSHULRGVRIWLPH June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 9 D a t a S h e e t Connection Diagram 6:6-0&3&RPSDWLEOH EDOO)LQH3LWFK%DOO*ULG$UUD\ 7RS9LHZ%DOOV)DFLQJ'RZQ A10 A1 NC 10 B2 B3 B4 B5 B6 B7 B8 B9 AVD# RFU CLK RFU RFU RFU RFU RFU C2 C3 C4 C5 C6 C7 C8 C9 WP# A7 RFU ACC WE# A8 A11 RFU D2 D3 D4 D5 D6 D7 D8 D9 A3 A6 RFU RESET# RFU A19 A12 A15 E2 E3 E4 E5 E6 E7 E8 E9 A2 A5 A18 RDY A20 A9 A13 A21 F2 F3 F4 F5 F6 F7 F8 F9 A1 A4 A17 RFU RFU A10 A14 A22 G2 G3 G4 G5 G6 G7 G8 G9 A0 VSS DQ1 RFU RFU DQ6 RFU A16 H2 H3 H4 H5 H6 H7 H8 H9 CE#f1 OE# DQ9 DQ3 DQ4 DQ13 DQ15 RFU J2 J3 J4 J5 J6 J7 J8 J9 RFU DQ0 DQ10 VCC RFU DQ12 DQ7 VSS K2 K3 K4 K5 K6 K7 K8 K9 RFU DQ8 DQ2 DQ11 RFU DQ5 DQ14 RFU L2 L3 L4 L5 L6 L7 L8 L9 RFU RFU RFU VCC RFU RFU RFU RFU NC M1 M10 NC NC S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Input/Output Descriptions $PD[$ '4'4 &( 2( :( 9&& 966 1& 5'< &/. $9' 5(6(7 :3 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'4±'4 :3 $&& &( 2( :( 5(6(7 5'< $9' 0D[ IRUWKH:6-DQGIRUWKH:6- 12 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Ordering Information 7KHRUGHUQXPEHU9DOLG&RPELQDWLRQLVIRUPHGE\WKHIROORZLQJ S 29 W S ### J ## X X X ## # 3DFNLQJ7\SH 7UD\ ´7DSH5HHO ´7DSH5HH $GGLWLRQDO2UGHULQJ2SWLRQV 'LH5HYLVLRQ'XDO%RRW3URWHFWLRQ 'LH5HYLVLRQ1RQH%RRW3URWHFWLRQ 'LH5HYLVLRQ'XDO%RRW3URWHFWLRQ 'LH5HYLVLRQ1RQH%RRW3URWHFWLRQ 7HPSHUDWXUH*UDGH : :LUHOHVV& 3DFNDJH0DWHULDO6HW %*$3DFNDJH7\SH $ ) /HDG3E)UHH&RPSOLDQW3DFNDJH 6WDQGDUG/HDG3E)UHH3DFNDJH 3DFNDJH7\SH % %*$3DFNDJH 6SHHG2SWLRQ 6 3 0+]:6-RQO\ 0+] 3URFHVV7HFKQRORJ\ - QP)ORDWLQJ*DWH7HFKQRORJ\ 'HQVLW\ )ODVKGHQVLW\ 0E 0E &RUH9ROWDJH 6 YROW9&& )ODVK,QWHUIDFHDQG6LPXOWDQHRXV5HDG:ULWH : %XUVW6LPXOWDQHRXV5HDG:ULWH 3URGXFW6HULHV 3UHIL[ 6 June 24, 2005 S29WS-J_00_A4 6HFWRU(UDVH125)ODVKPHPRU\ 6SDQVLRQ S29WS128J/064J 13 D a t a S h e e t 128 Mb Products based on 110 nm Floating Gate Technology Valid Combinations for FBGA Packages Package Marking 6:6-3%$: :6-3%$: 6:6-3%$: :6-3%$: 6:6-3%$: :6-3%$: 6:6-3%$: :6-3%$: 6:6-3%): :6-3%): 6:6-3%): :6-3%): 6:6-3%): :6-3%): 6:6-3%): :6-3%): Temperature Burst Speed °& 0+] °& 0+] °& 0+] °& 0+] Boot Protect 'XDO 1RQH 'XDO 1RQH Package Material Set /HDG3E )UHH &RPSOLDQW 3DFNDJH 'XDO 1RQH 'XDO 6WDQGDUG /HDG3E )UHH3DFNDJH Package Type EDOO PP[PP 0&3&RPSDWLEOH 1RQH 64 Mb Products based on 110 nm Floating Gate Technology Valid Combinations for FBGA Packages Package Marking Temperature Burst Speed 6:6-3%$: :6-3%$: °& 0+] 6:6-6%$: :6-6%$: °& 0+] 6:6-3%$: :6-3%$: °& 0+] 6:6-6%$: :6-6%$: °& 0+] 6:6-3%): :6-3%): °& 0+] 6:6-6%): :6-6%): °& 0+] 6:6-3%): :6-3%): °& 0+] 6:6-6%): :6-6%): °& 0+] Boot Protect Package Material Set 'XDO /HDG3E )UHH &RPSOLDQW 3DFNDJH 1RQH 'XDO 1RQH 6WDQGDUG /HDG3E )UHH 3DFNDJH Package Type EDOO PP[PP 0&3&RPSDWLEOH 9DOLG&RPELQDWLRQV Valid Combination configuration planned to be supported for this device. 1RWHV 0+]RSHUDWLRQKDVDGLIIHUHQW9FF9WR9 14 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Device Bus Operations 7KLVVHFWLRQGHVFULEHVWKHUHTXLUHPHQWVDQGXVHRIWKHGHYLFHEXVRSHUDWLRQVZKLFKDUHLQLWLDWHG WKURXJKWKHLQWHUQDOFRPPDQGUHJLVWHU7KHFRPPDQGUHJLVWHULWVHOIGRHVQRWRFFXS\DQ\DGGUHV VDEOHPHPRU\ORFDWLRQ7KHUHJLVWHULVFRPSRVHGRIODWFKHVWKDWVWRUHWKHFRPPDQGVDORQJZLWK WKHDGGUHVVDQGGDWDLQIRUPDWLRQQHHGHGWRH[HFXWHWKHFRPPDQG7KHFRQWHQWVRIWKHUHJLVWHU VHUYHDVLQSXWVWRWKHLQWHUQDOVWDWHPDFKLQH7KHVWDWHPDFKLQHRXWSXWVGLFWDWHWKHIXQFWLRQRI WKHGHYLFH7DEOHOLVWVWKHGHYLFHEXVRSHUDWLRQVWKHLQSXWVDQGFRQWUROOHYHOVWKH\UHTXLUHDQG WKHUHVXOWLQJRXWSXW7KHIROORZLQJVXEVHFWLRQVGHVFULEHHDFKRIWKHVHRSHUDWLRQVLQIXUWKHUGHWDLO Table 1. Device Bus Operations CE# OE# WE# A22–0 DQ15–0 RESET# CLK (See Note) $V\QFKURQRXV5HDG$GGUHVVHV/DWFKHG / / + $GGU,Q ,2 + ; $V\QFKURQRXV5HDG$GGUHVVHV6WHDG\6WDWH / / + $GGU,Q ,2 + ; / $V\QFKURQRXV:ULWH / + / $GGU,Q ,2 + ; / 6\QFKURQRXV:ULWH / + / $GGU,Q ,2 + 6WDQGE\&( + ; ; +,*+= +,*+= + ; ; +DUGZDUH5HVHW ; ; ; +,*+= +,*+= / ; ; /RDG6WDUWLQJ%XUVW$GGUHVV / ; + $GGU,Q ; + $GYDQFH%XUVWWRQH[WDGGUHVVZLWKDSSURSULDWH'DWD SUHVHQWHGRQWKH'DWD%XV / / + +,*+= %XUVW 'DWD2XW + + 7HUPLQDWHFXUUHQW%XUVWUHDGF\FOH + ; + +,*+= +,*+= + ; 7HUPLQDWHFXUUHQW%XUVWUHDGF\FOHYLD5(6(7 ; ; + +,*+= +,*+= / 7HUPLQDWHFXUUHQW%XUVWUHDGF\FOHDQGVWDUWQHZ %XUVWUHDGF\FOH / ; + +,*+= ,2 + Operation AVD# Burst Read Operations ; ; Legend: L = Logic 0, H = Logic 1, X = Don’t Care 1RWH'HIDXOWDFWLYHHGJHRI&/.LVWKHULVLQJHGJH Requirements for Asynchronous ReadOperation (Non-Burst) 7RUHDGGDWDIURPWKHPHPRU\DUUD\WKHV\VWHPPXVWILUVWDVVHUWDYDOLGDGGUHVVRQ$PD[± $$$IRU:6-DQG$$IRU:6-ZKLOHGULYLQJ$9'DQG&(WR9,/:(VKRXOG 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EDQN,IWKHKRVWV\VWHPFURVVHVWKHEDQNERXQGDU\ZKLOHWKHGHYLFHLVSURJUDPPLQJRUHUDVLQJ WKHGHYLFHZLOOSURYLGHUHDGVWDWXVLQIRUPDWLRQ7KHFORFNZLOOEHLJQRUHG$IWHUWKHKRVWKDVFRP SOHWHGVWDWXVUHDGVRUWKHGHYLFHKDVFRPSOHWHGWKHSURJUDPRUHUDVHRSHUDWLRQWKHKRVWFDQ UHVWDUWDEXUVWRSHUDWLRQXVLQJDQHZDGGUHVVDQG$9'SXOVH DQG:RUG/LQHDU%XUVWZLWK:UDS$URXQG 7KHUHPDLQLQJWKUHHEXUVWUHDGPRGHVDUHRIWKHOLQHDUZUDSDURXQGGHVLJQLQZKLFKDIL[HGQXP EHURIZRUGVDUHUHDGIURPFRQVHFXWLYHDGGUHVVHV,QHDFKRIWKHVHPRGHVWKHEXUVWDGGUHVVHV UHDGDUHGHWHUPLQHGE\WKHJURXSZLWKLQZKLFKWKHVWDUWLQJDGGUHVVIDOOV7KHJURXSVDUHVL]HG DFFRUGLQJWRWKHQXPEHURIZRUGVUHDGLQDVLQJOHEXUVWVHTXHQFHIRUDJLYHQPRGHVHH7DEOH Table 2. 16 Burst Address Groups Mode Group Size Group Address Ranges ZRUG ZRUGV K)KK ZRUG ZRUGV )K)K)K ZRUG ZRUGV )K)K)K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t $VDQH[DPSOHLIWKHVWDUWLQJDGGUHVVLQWKHZRUGPRGHLVKWKHDGGUHVVUDQJHWREHUHDG ZRXOGEH)KDQGWKHEXUVWVHTXHQFHZRXOGEH$%&'()KHWF7KHEXUVW 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$QHUDVHRSHUDWLRQFDQHUDVHRQHVHFWRUPXOWLSOHVHFWRUVRUWKHHQWLUHGHYLFH7DEOH³:6- 6HFWRU$GGUHVV7DEOH´RQSDJHDQG7DEOH³:6-6HFWRU$GGUHVV7DEOH´RQSDJHLQ GLFDWHWKHDGGUHVVVSDFHWKDWHDFKVHFWRURFFXSLHV7KHGHYLFHDGGUHVVVSDFHLVGLYLGHGLQWRIRXU EDQNV$³EDQNDGGUHVV´LVWKHDGGUHVVELWVUHTXLUHGWRXQLTXHO\VHOHFWDEDQN6LPLODUO\D³VHFWRU DGGUHVV´LVWKHDGGUHVVELWVUHTXLUHGWRXQLTXHO\VHOHFWDVHFWRU ,&&LQWKH³'&&KDUDFWHULVWLFV´VHFWLRQRQSDJHUHSUHVHQWVWKHDFWLYHFXUUHQWVSHFLILFDWLRQIRU WKHZULWHPRGH7KH$&&KDUDFWHULVWLFVVHFWLRQFRQWDLQVWLPLQJVSHFLILFDWLRQWDEOHVDQGWLPLQJGL DJUDPVIRUZULWHRSHUDWLRQV Accelerated Program Operation 7KHGHYLFHRIIHUVDFFHOHUDWHGSURJUDPRSHUDWLRQVWKURXJKWKH$&&IXQFWLRQ$&&LVSULPDULO\LQ WHQGHGWRDOORZIDVWHUPDQXIDFWXULQJWKURXJKSXWDWWKHIDFWRU\ ,IWKHV\VWHPDVVHUWV9++RQWKLVLQSXWWKHGHYLFHDXWRPDWLFDOO\HQWHUVWKHDIRUHPHQWLRQHG8Q ORFN %\SDVVPRGH DQGXVHVWKH KLJKHUYROWDJHRQWKH LQSXWWRUHGXFH WKHWLPH UHTXLUHGIRU SURJUDPRSHUDWLRQV7KHV\VWHPZRXOGXVHDWZRF\FOHSURJUDPFRPPDQGVHTXHQFHDVUHTXLUHG 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,QDGGLWLRQZKHQYHULI\LQJVHFWRUSURWHFWLRQWKHVHFWRUDGGUHVVPXVWDSSHDURQWKHDSSURSULDWH KLJKHVWRUGHUDGGUHVVELWVVHH7DEOH³´RQSDJHDQG7DEOH³´RQSDJH7DEOHVKRZV WKHUHPDLQLQJDGGUHVVELWVWKDWDUHGRQ¶WFDUH:KHQDOOQHFHVVDU\ELWVKDYHEHHQVHWDVUH TXLUHGWKHSURJUDPPLQJHTXLSPHQWPD\WKHQUHDGWKHFRUUHVSRQGLQJLGHQWLILHUFRGHRQ'4± '4+RZHYHUWKHDXWRVHOHFWFRGHVFDQDOVREHDFFHVVHGLQV\VWHPWKURXJKWKHFRPPDQGUHJ LVWHUIRULQVWDQFHVZKHQWKHGHYLFHLVHUDVHGRUSURJUDPPHGLQDV\VWHPZLWKRXWDFFHVVWRKLJK YROWDJHRQWKH$SLQ7KHFRPPDQGVHTXHQFHLVLOOXVWUDWHGLQ7DEOH³&RPPDQG'HILQLWLRQV´ RQSDJH1RWHWKDWLID%DQN$GGUHVV%$RQDGGUHVVELWV$$DQG$IRUWKH:6- $$IRUWKH:6-LVDVVHUWHGGXULQJWKHWKLUGZULWHF\FOHRIWKHDXWRVHOHFWFRPPDQG WKHKRVWV\VWHPFDQUHDGDXWRVHOHFWGDWDWKDWEDQNDQGWKHQLPPHGLDWHO\UHDGDUUD\GDWDIURP WKHRWKHUEDQNZLWKRXWH[LWLQJWKHDXWRVHOHFWPRGH 7RDFFHVVWKHDXWRVHOHFWFRGHVLQV\VWHPWKHKRVWV\VWHPFDQLVVXHWKHDXWRVHOHFWFRPPDQG YLDWKHFRPPDQGUHJLVWHUDVVKRZQLQ7DEOH³&RPPDQG'HILQLWLRQV´RQSDJH7KLV PHWKRGGRHVQRWUHTXLUH9,'$XWRVHOHFWPRGHPD\RQO\EHHQWHUHGDQGXVHGZKHQLQWKHDV\Q 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'HVFULSWLRQ Manufacturer ID: Spansion S h e e t Autoselect Codes (High Voltage Method) &( 2( :( 5(6(7 $PD[ WR $ / / + + ; $ WR $ $ $ $ ; 9,' ; ; $ $ WR $ $ $ $ $ '4 WR'4 / ; / / / / K / / / + (K Device ID Read Cycle 1 Read Cycle 2 / / + + ; ; 9,' ; / / / Read Cycle 3 Sector Protection Verification / / + + 6$ ; 9,' ; / / / + + + / K:6- (K:6- + + + + K:6- K:6- / / + / KSURWHFWHG KXQSURWHFWHG Indicator Bits / / + + ; ; 9,' ; ; / ; / / + + '4'4 '4)DFWRU\/RFN%LW /RFNHG 1RW/RFNHG '4&XVWRPHU/RFN%LW /RFNHG 1RW/RFNHG '4 +DQGVKDNH%LW 5HVHUYHG 6WDQGDUG +DQGVKDNH '4'4%RRW&RGH '4'4 Hardware Sector Group Protection / / + + 6$ ; 9,' ; ; ; / / / + / KSURWHFWHG KXQSURWHFWHG /HJHQG/ /RJLF/RZ 9,/+ /RJLF+LJK 9,+%$ %DQN$GGUHVV6$ 6HFWRU$GGUHVV; 'RQ¶WFDUH 1RWHV 7KHDXWRVHOHFWFRGHVPD\DOVREHDFFHVVHGLQV\VWHPYLDFRPPDQGVHTXHQFHV 33%3URWHFWLRQ6WDWXVLVVKRZQRQWKHGDWDEXV Sector/Sector Block Protection and Unprotection 7KHKDUGZDUHVHFWRUSURWHFWLRQIHDWXUHGLVDEOHVERWKSURJUDPPLQJDQGHUDVHRSHUDWLRQVLQDQ\ VHFWRU7KHKDUGZDUHVHFWRUXQSURWHFWLRQIHDWXUHUHHQDEOHVERWKSURJUDPDQGHUDVHRSHUDWLRQV LQ SUHYLRXVO\SURWHFWHG VHFWRUV6HFWRU SURWHFWLRQXQSURWHFWLRQFDQ EHLPSOHPHQWHGYLD WZR PHWKRGV 1RWH)RUWKHIROORZLQJGLVFXVVLRQWKHWHUP³VHFWRU´DSSOLHVWRERWKVHFWRUVDQGVHFWRUEORFNV $VHFWRUEORFNFRQVLVWVRIWZRRUPRUHDGMDFHQWVHFWRUVWKDWDUHSURWHFWHGRUXQSURWHFWHGDWWKH VDPHWLPHVHH7DEOH³´RQSDJHDQG7DEOH³´RQSDJH Table 4. S29WS128J/064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet 1 of 3) 6HFWRU $±$ 6HFWRU 6HFWRU%ORFN6L]H 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 19 D a t a Table 4. 20 S h e e t S29WS128J/064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet 2 of 3) 6HFWRU $±$ 6HFWRU 6HFWRU%ORFN6L]H 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 4. S h e e t S29WS128J/064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet 3 of 3) 6HFWRU $±$ 6HFWRU 6HFWRU%ORFN6L]H 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 21 D a t a Table 5. 22 S h e e t S29WS064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet 1 of 2) 6HFWRU $±$ 6HFWRU 6HFWRU%ORFN6L]H 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 5. S h e e t S29WS064J Boot Sector/Sector Block Addresses for Protection/Unprotection (Sheet 2 of 2) 6HFWRU $±$ 6HFWRU 6HFWRU%ORFN6L]H 6$±6$ ;;;;; [.ZRUGV 6$±6$ ;;;;; [.ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$ ;;; .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV 6$ .ZRUGV June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 23 D a t a S h e e t Advanced Sector Protection/Unprotection 7KH$GYDQFHG6HFWRU3URWHFWLRQ8QSURWHFWLRQIHDWXUHGLVDEOHVRUHQDEOHVSURJUDPPLQJRUHUDVH RSHUDWLRQVLQDQ\RUDOOVHFWRUVDQGFDQEHLPSOHPHQWHGWKURXJKVRIWZDUHDQGRUKDUGZDUHPHWK RGV ZKLFK DUH LQGHSHQGHQW RI HDFK RWKHU 7KLV VHFWLRQ GHVFULEHV WKH YDULRXV PHWKRGV RI SURWHFWLQJGDWDVWRUHGLQWKHPHPRU\DUUD\$QRYHUYLHZRIWKHVHPHWKRGVLQVKRZQLQ)LJXUH Hardware Methods Software Methods Lock Register (One Time Programmable) ACC = VIL (All sectors locked) Password Method Persistent Method (DQ2) (DQ1) WP# = VIL (All boot sectors locked) 64-bit Password (One Time Protect) PPB Lock Bit1,2,3 0 = PPBs Locked Memory Array Persistent Protection Bit (PPB)4,5 Sector 0 PPB 0 DYB 0 Sector 1 PPB 1 DYB 1 Sector 2 PPB 2 DYB 2 Sector N-2 PPB N-2 DYB N-2 Sector N-1 PPB N-1 DYB N-1 PPB N DYB N 3 Sector N 3. N = Highest Address Sector. 4. 0 = Sector Protected, 1 = Sector Unprotected. 5. PPBs programmed individually, but cleared collectively Figure 1. 24 1 = PPBs Unlocked 1. Bit is volatile, and defaults to “1” on reset. 2. Programming to “0” locks all PPBs to their current state. 3. Once programmed to “0”, requires hardware reset to unlock. Dynamic Protection Bit (PPB)6,7,8 6. 0 = Sector Protected, 1 = Sector Unprotected. 7. Protect effective only if PPB Lock Bit is unlocked and corresponding PPB is “1” (unprotected). 8. Volatile Bits: defaults to user choice upon power-up (see ordering options). Advanced Sector Protection/Unprotection S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Lock Register $VVKLSSHGIURPWKHIDFWRU\DOOGHYLFHVGHIDXOWWRWKHSHUVLVWHQWPRGHZKHQSRZHULVDSSOLHGDQG DOOVHFWRUVDUHXQSURWHFWHGXQOHVVRWKHUZLVHFKRVHQWKURXJKWKH'<%RUGHULQJRSWLRQ7KHGHYLFH SURJUDPPHURUKRVWV\VWHPPXVWWKHQFKRRVHZKLFKVHFWRUSURWHFWLRQPHWKRGWRXVH3URJUDP PLQJVHWWLQJWR³´DQ\RQHRIWKHIROORZLQJWZRRQHWLPHSURJUDPPDEOHQRQYRODWLOHELWVORFNV WKHSDUWSHUPDQHQWO\LQWKDWPRGH /RFN5HJLVWHU3HUVLVWHQW3URWHFWLRQ0RGH/RFN%LW'4 /RFN5HJLVWHU3DVVZRUG3URWHFWLRQ0RGH/RFN%LW'4 Table 6. Lock Register Device DQ15-05 DQ4 DQ3 DQ2 DQ1 DQ0 6:61 3DVVZRUG 3URWHFWLRQ 0RGH/RFN%LW 3HUVLVWHQW 3URWHFWLRQ 0RGH/RFN%LW &XVWRPHU 6HF6L6HFWRU 3URWHFWLRQ%LW 8QGHILQHG '<%/RFN%RRW%LW VHFWRUV SRZHUXS SURWHFWHG VHFWRUV SRZHUXS XQSURWHFWHG 33%2QH7LPH 3URJUDPPDEOH%LW $OO33%HUDVH FRPPDQGGLVDEOHG $OO33%(UDVH FRPPDQGHQDEOHG 3DVVZRUG 3URWHFWLRQ 0RGH/RFN%LW 3HUVLVWHQW 3URWHFWLRQ 0RGH/RFN%LW 6HF6L6HFWRU 3URWHFWLRQ%LW 6:61 6:61 1RWHV ,IWKHSDVVZRUGPRGHLVFKRVHQWKHSDVVZRUGPXVWEHSURJUDPPHGEHIRUHVHWWLQJWKHFRU UHVSRQGLQJORFNUHJLVWHUELW $IWHUWKH/RFN5HJLVWHU%LWV&RPPDQG6HW(QWU\FRPPDQGVHTXHQFHLVZULWWHQUHDGVDQG ZULWHVIRU%DQNDUHGLVDEOHGZKLOHUHDGVIURPRWKHUEDQNVDUHDOORZHGXQWLOH[LWLQJWKLV PRGH ,IERWKORFNELWVDUHVHOHFWHGWREHSURJUDPPHGWR]HURVDWWKHVDPHWLPHWKHRSHUDWLRQ DERUWV 2QFHWKH3DVVZRUG0RGH/RFN%LWLVSURJUDPPHGWKH3HUVLVWHQW0RGH/RFN%LWLVSHUPDQHQWO\ GLVDEOHGDQGQRFKDQJHVWRWKHSURWHFWLRQVFKHPHDUHDOORZHG6LPLODUO\LIWKH3HUVLVWHQW 0RGH/RFN%LWLVSURJUDPPHGWKH3DVVZRUG0RGHLVSHUPDQHQWO\GLVDEOHG $IWHUVHOHFWLQJDVHFWRUSURWHFWLRQPHWKRGHDFKVHFWRUFDQRSHUDWHLQDQ\RIWKHIROORZLQJWKUHH VWDWHV &RQVWDQWO\ORFNHG7KHVHOHFWHGVHFWRUVDUHSURWHFWHGDQGFDQQRWEHUHSURJUDPPHGXQOHVV 33%ORFNELWLVFOHDUHGYLDDSDVVZRUGKDUGZDUHUHVHWRUSRZHUF\FOH '\QDPLFDOO\ORFNHG7KHVHOHFWHGVHFWRUVDUHSURWHFWHGDQGFDQEHDOWHUHGYLDVRIWZDUHFRP PDQGV 8QORFNHG7KHVHFWRUVDUHXQSURWHFWHGDQGFDQEHHUDVHGDQGRUSURJUDPPHG 7KHVHVWDWHVDUHFRQWUROOHGE\WKHELWW\SHVGHVFULEHGLQ6HFWLRQV± Persistent Protection Bits 7KH3HUVLVWHQW3URWHFWLRQ%LWVDUHXQLTXHDQGQRQYRODWLOHIRUHDFKVHFWRUDQGKDYHWKHVDPHHQ GXUDQFHVDVWKH)ODVKPHPRU\3UHSURJUDPPLQJDQGYHULILFDWLRQSULRUWRHUDVXUHDUHKDQGOHGE\ WKHGHYLFHDQGWKHUHIRUHGRQRWUHTXLUHV\VWHPPRQLWRULQJ 1RWHV (DFK33%LVLQGLYLGXDOO\SURJUDPPHGDQGDOODUHHUDVHGLQSDUDOOHO :KLOHSURJUDPPLQJ33%IRUDVHFWRUDUUD\GDWDFDQEHUHDGIURPDQ\RWKHUEDQNH[FHSW%DQN XVHGIRU'DWD3ROOLQJDQGWKHEDQNLQZKLFKVHFWRU33%LVEHLQJSURJUDPPHG (QWU\FRPPDQGGLVDEOHVUHDGVDQGZULWHVIRUWKHEDQNVHOHFWHG 5HDGVZLWKLQWKDWEDQNUHWXUQWKH33%VWDWXVIRUWKDWVHFWRU 5HDGVIURPRWKHUEDQNVDUHDOORZHGZKLOHZULWHVDUHQRWDOORZHG June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 25 D a t a S h e e t $OO5HDGVPXVWEHSHUIRUPHGXVLQJWKH$V\QFKURQRXVPRGH 7KH VSHFLILF VHFWRU DGGUHVV $$ :61 $$ :61 $$ :61 DUH ZULWWHQDWWKHVDPHWLPHDVWKHSURJUDPFRPPDQG ,IWKH33%/RFN%LWLVVHWWKH33%3URJUDPRUHUDVHFRPPDQGGRHVQRWH[HFXWHDQGWLPHV RXWZLWKRXWSURJUDPPLQJRUHUDVLQJWKH33% 7KHUHDUHQRPHDQVIRULQGLYLGXDOO\HUDVLQJDVSHFLILF33%DQGQRVSHFLILFVHFWRUDGGUHVVLV UHTXLUHGIRUWKLVRSHUDWLRQ ([LWFRPPDQGPXVWEHLVVXHGDIWHUWKHH[HFXWLRQZKLFKUHVHWVWKHGHYLFHWRUHDGPRGHDQG UHHQDEOHVUHDGVDQGZULWHVIRU%DQN 7KHSURJUDPPLQJVWDWHRIWKH33%IRUDJLYHQVHFWRUFDQEHYHULILHGE\ZULWLQJD33%6WDWXV 5HDG&RPPDQGWRWKHGHYLFHDVGHVFULEHGE\WKHIORZFKDUWVKRZQLQ)LJXUH 26 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Enter PPB Command Set. Addr = BA Program PPB Bit. Addr = SA Read Byte Twice Addr = SA0 No DQ6 = Toggle? Yes No DQ5 = 1? Wait 500 µs Yes Read Byte Twice Addr = SA0 No DQ6 = Toggle? Read Byte. Addr = SA Yes No DQ0 = '1' (Erase) '0' (Pgm.)? FAIL Yes Issue Reset Command PASS Exit PPB Command Set Figure 2. PPB Program/Erase Algorithm Dynamic Protection Bits '\QDPLF3URWHFWLRQ%LWVDUHYRODWLOHDQGXQLTXHIRUHDFKVHFWRUDQGFDQEHLQGLYLGXDOO\PRGLILHG '<%VRQO\FRQWUROWKHSURWHFWLRQVFKHPHIRUXQSURWHFWHGVHFWRUVWKDWKDYHWKHLU33%VFOHDUHG HUDVHGWR³´%\LVVXLQJWKH'<%6HWRU&OHDUFRPPDQGVHTXHQFHVWKH'<%VDUHVHWSUR JUDPPHG WR ³´ RU FOHDUHG HUDVHG WR ³´ WKXV SODFLQJ HDFK VHFWRU LQ WKH SURWHFWHG RU XQSURWHFWHGVWDWHUHVSHFWLYHO\7KLVIHDWXUHDOORZVVRIWZDUHWRHDVLO\SURWHFWVHFWRUVDJDLQVWLQ DGYHUWHQW FKDQJHV \HW GRHV QRW SUHYHQW WKH HDV\ UHPRYDO RI SURWHFWLRQ ZKHQ FKDQJHV DUH QHHGHG June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 27 D a t a S h e e t 1RWHV 7KH'<%VFDQEHVHWSURJUDPPHGWR³´RUFOHDUHGHUDVHGWR³´DVRIWHQDVQHHGHG :KHQWKHSDUWVDUHILUVWVKLSSHGWKH33%VDUHFOHDUHGHUDVHGWR³´DQGXSRQSRZHUXSRUUHVHW WKH'<%VFDQEHVHWRUFOHDUHGGHSHQGLQJXSRQWKHRUGHULQJRSWLRQFKRVHQ ,IWKHRSWLRQWRFOHDUWKH'<%VDIWHUSRZHUXSLVFKRVHQHUDVHGWR³´WKHQWKHVHFWRUVPD\ EHPRGLILHGGHSHQGLQJXSRQWKH33%VWDWHRIWKDWVHFWRUVHH7DEOH 7KHVHFWRUVZRXOGEHLQWKHSURWHFWHGVWDWH,IWKHRSWLRQWRVHWWKH'<%VDIWHUSRZHUXSLV FKRVHQSURJUDPPHGWR³´ ,WLVSRVVLEOHWRKDYHVHFWRUVWKDWDUHSHUVLVWHQWO\ORFNHGZLWKVHFWRUVWKDWDUHOHIWLQWKHG\ QDPLFVWDWH 7KH '<% 6HW RU&OHDUFRPPDQGVIRUWKHG\QDPLF VHFWRUV VLJQLI\ SURWHFWHG RU XQSURWHFWHG VWDWHRIWKHVHFWRUVUHVSHFWLYHO\+RZHYHULIWKHUHLVDQHHGWRFKDQJHWKHVWDWXVRIWKHSHU VLVWHQWO\ ORFNHG VHFWRUV D IHZ PRUH VWHSV DUH UHTXLUHG )LUVW WKH 33% /RFN %LW PXVW EH FOHDUHGE\HLWKHUSXWWLQJWKHGHYLFHWKURXJKDSRZHUF\FOHRUKDUGZDUHUHVHW7KH33%VFDQ WKHQEHFKDQJHGWRUHIOHFWWKHGHVLUHGVHWWLQJV6HWWLQJWKH33%/RFN%LWRQFHDJDLQORFNVWKH 33%VDQGWKHGHYLFHRSHUDWHVQRUPDOO\DJDLQ 7RDFKLHYHWKHEHVWSURWHFWLRQLWLVUHFRPPHQGHGWRH[HFXWHWKH33%/RFN%LW6HWFRPPDQG HDUO\LQWKHERRWFRGHDQGSURWHFWWKHERRWFRGHE\KROGLQJ:3 9,/1RWHWKDWWKH33% DQG'<%ELWVKDYHWKHVDPHIXQFWLRQZKHQ$&& 9++DVWKH\GRZKHQ$&& 9,+ Persistent Protection Bit Lock Bit 7KH3HUVLVWHQW3URWHFWLRQ%LW/RFN%LWLVDJOREDOYRODWLOHELWIRUDOOVHFWRUV:KHQVHWSURJUDPPHG WR³´LWORFNVDOO33%VDQGZKHQFOHDUHGSURJUDPPHGWR³´DOORZVWKH33%VWREHFKDQJHG 7KHUHLVRQO\RQH33%/RFN%LWSHUGHYLFH 1RWHV 1RVRIWZDUHFRPPDQGVHTXHQFHXQORFNVWKLVELWXQOHVVWKHGHYLFHLVLQWKHSDVVZRUGSURWHF WLRQPRGHRQO\DKDUGZDUHUHVHWRUDSRZHUXSFOHDUVWKLVELW 7KH33%/RFN%LWPXVWEHVHWSURJUDPPHGWR³´RQO\DIWHUDOO33%VDUHFRQILJXUHGWRWKH GHVLUHGVHWWLQJV Password Protection Method 7KH3DVVZRUG3URWHFWLRQ0HWKRGDOORZVDQHYHQKLJKHUOHYHORIVHFXULW\WKDQWKH3HUVLVWHQW6HFWRU 3URWHFWLRQ0RGHE\UHTXLULQJDELWSDVVZRUGIRUXQORFNLQJWKHGHYLFH33%/RFN%LW,QDGGLWLRQ WRWKLVSDVVZRUGUHTXLUHPHQWDIWHUSRZHUXSDQGUHVHWWKH33%/RFN%LWLVVHW³´WRPDLQWDLQ WKHSDVVZRUGPRGHRIRSHUDWLRQ6XFFHVVIXOH[HFXWLRQRIWKH3DVVZRUG8QORFNFRPPDQGE\HQ WHULQJWKHHQWLUHSDVVZRUGFOHDUVWKH33%/RFN%LWDOORZLQJIRUVHFWRU33%VPRGLILFDWLRQV 1RWHV 7KHUHLVQRVSHFLDODGGUHVVLQJRUGHUUHTXLUHGIRUSURJUDPPLQJWKHSDVVZRUG2QFHWKH3DVV ZRUGLVZULWWHQDQGYHULILHGWKH3DVVZRUG0RGH/RFNLQJ%LWPXVWEHVHWLQRUGHUWRSUHYHQW DFFHVV 7KH3DVVZRUG3URJUDP&RPPDQGLVRQO\FDSDEOHRISURJUDPPLQJ³´V3URJUDPPLQJD³´ DIWHUDFHOOLVSURJUDPPHGDVD³´UHVXOWVLQDWLPHRXWZLWKWKHFHOODVD³´ 7KHSDVVZRUGLVDOO³´VZKHQVKLSSHGIURPWKHIDFWRU\ $OOELWSDVVZRUGFRPELQDWLRQVDUHYDOLGDVDSDVVZRUG 7KHUHLVQRPHDQVWRYHULI\ZKDWWKHSDVVZRUGLVDIWHULWLVVHW 7KH3DVVZRUG0RGH/RFN%LWRQFHVHWSUHYHQWVUHDGLQJWKHELWSDVVZRUGRQWKHGDWDEXV DQGIXUWKHUSDVVZRUGSURJUDPPLQJ 7KH3DVVZRUG0RGH/RFN%LWLVQRWHUDVDEOH 7KHORZHUWZRDGGUHVVELWV$±$DUHYDOLGGXULQJWKH3DVVZRUG5HDG3DVVZRUG3URJUDP DQG3DVVZRUG8QORFN 7KHH[DFWSDVVZRUGPXVWEHHQWHUHGLQRUGHUIRUWKHXQORFNLQJIXQFWLRQWRRFFXU 28 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t 7KH3DVVZRUG8QORFNFRPPDQGFDQQRWEHLVVXHGDQ\IDVWHUWKDQVDWDWLPHWRSUHYHQWD KDFNHUIURPUXQQLQJWKURXJKDOOWKHELWFRPELQDWLRQVLQDQDWWHPSWWRFRUUHFWO\PDWFKD SDVVZRUG $SSUR[LPDWHO\ V LV UHTXLUHG IRU XQORFNLQJ WKH GHYLFH DIWHU WKH YDOLG ELW SDVVZRUG LV JLYHQWRWKHGHYLFH 3DVVZRUGYHULILFDWLRQLVRQO\DOORZHGGXULQJWKHSDVVZRUGSURJUDPPLQJRSHUDWLRQ $OOIXUWKHUFRPPDQGVWRWKHSDVVZRUGUHJLRQDUHGLVDEOHGDQGDOORSHUDWLRQVDUHLJQRUHG ,IWKHSDVVZRUGLVORVWDIWHUVHWWLQJWKH3DVVZRUG0RGH/RFN%LWWKHUHLVQRZD\WRFOHDUWKH 33%/RFN%LW (QWU\FRPPDQGVHTXHQFHPXVWEHLVVXHGSULRUWRDQ\RIDQ\RSHUDWLRQDQGLWGLVDEOHVUHDGV DQGZULWHVIRU%DQN5HDGVDQGZULWHVIRURWKHUEDQNVH[FOXGLQJ%DQNDUHDOORZHG ,IWKHXVHUDWWHPSWVWRSURJUDPRUHUDVHDSURWHFWHGVHFWRUWKHGHYLFHLJQRUHVWKHFRPPDQG DQGUHWXUQVWRUHDGPRGH $SURJUDPRUHUDVHFRPPDQGWRDSURWHFWHGVHFWRUHQDEOHVVWDWXVSROOLQJDQGUHWXUQVWRUHDG PRGHZLWKRXWKDYLQJPRGLILHGWKHFRQWHQWVRIWKHSURWHFWHGVHFWRU 7KHSURJUDPPLQJRIWKH'<%33%DQG33%/RFNIRUDJLYHQVHFWRUFDQEHYHULILHGE\ZULWLQJ LQGLYLGXDOVWDWXVUHDGFRPPDQGV'<%6WDWXV33%6WDWXVDQG33%/RFN6WDWXVWRWKHGHYLFH Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h Unlock Cycle 1 Unlock Cycle 2 Write Enter Lock Register Command: Address 555h, Data 40h XXXh = Address don’t care Program Lock Register Data Address XXXh, Data A0h Address 77h*, Data PD * Not on future devices Program Data (PD): See text for Lock Register definitions Caution: Lock register can only be progammed once. Wait 4 µs Perform Polling Algorithm (see Write Operation Status flowchart) Yes Done? No No DQ5 = 1? Error condition (Exceeded Timing Limits) Yes PASS. Write Lock Register Exit Command: Address XXXh, Data 90h Address XXXh, Data 00h Device returns to reading array. FAIL. Write rest command to return to reading array. Figure 3. June 24, 2005 S29WS-J_00_A4 Lock Register Program Algorithm S29WS128J/064J 29 D a t a S h e e t Advanced Sector Protection Software Examples Table 7. Unique Device PPB Lock Bit 0 = locked 1 = unlocked Sector Protection Schemes Sector PPB 0 = protected 1 = unprotected Sector DYB 0 = protected 1 = unprotected Sector Protection Status $Q\6HFWRU [ 3URWHFWHGWKURXJK33% $Q\6HFWRU [ 3URWHFWHGWKURXJK33% $Q\6HFWRU 8QSURWHFWHG $Q\6HFWRU 3URWHFWHGWKURXJK'<% $Q\6HFWRU [ 3URWHFWHGWKURXJK33% $Q\6HFWRU [ 3URWHFWHGWKURXJK33% $Q\6HFWRU 3URWHFWHGWKURXJK'<% $Q\6HFWRU 8QSURWHFWHG 7DEOHFRQWDLQVDOOSRVVLEOHFRPELQDWLRQVRIWKH'<%33%DQG33%/RFN%LWUHODWLQJWRWKHVWDWXV RIWKHVHFWRU,QVXPPDU\LIWKH33%/RFN%LWLVORFNHGVHWWR³´QRFKDQJHVWRWKH33%VDUH DOORZHG7KH33%/RFN%LWFDQRQO\EHXQORFNHGUHVHWWR³´WKURXJKDKDUGZDUHUHVHWRUSRZHU F\FOH6HHDOVR)LJXUHIRUDQRYHUYLHZRIWKH$GYDQFHG6HFWRU3URWHFWLRQIHDWXUH Hardware Data Protection Methods 7KHGHYLFHRIIHUVWZRPDLQW\SHVRIGDWDSURWHFWLRQDWWKHVHFWRUOHYHOYLDKDUGZDUHFRQWURO :KHQ:3LVDW9,/WKHIRXURXWHUPRVWVHFWRUVDUHORFNHGGHYLFHVSHFLILF :KHQ$&&LVDW9,/DOOVHFWRUVDUHORFNHG 7KHUHDUHDGGLWLRQDOPHWKRGVE\ZKLFKLQWHQGHGRUDFFLGHQWDOHUDVXUHRIDQ\VHFWRUVFDQEHSUH YHQWHGYLDKDUGZDUHPHDQV7KHIROORZLQJVXEVHFWLRQVGHVFULEHVWKHVHPHWKRGV :30HWKRG 7KH:ULWH3URWHFWIHDWXUHSURYLGHVDKDUGZDUHPHWKRGRISURWHFWLQJWKHIRXURXWHUPRVWVHFWRUV 7KLVIXQFWLRQLVSURYLGHGE\WKH:3SLQDQGRYHUULGHVWKHSUHYLRXVO\GLVFXVVHG6HFWRU3URWHF WLRQ8QSURWHFWLRQPHWKRG ,IWKHV\VWHPDVVHUWV9,/RQWKH:3SLQWKHGHYLFHGLVDEOHVSURJUDPDQGHUDVHIXQFWLRQVLQWKH ³RXWHUPRVW´ERRWVHFWRUV7KHRXWHUPRVWERRWVHFWRUVDUHWKHVHFWRUVFRQWDLQLQJERWKWKHORZHU DQGXSSHUVHWRIVHFWRUVLQDGXDOERRWFRQILJXUHGGHYLFH ,IWKHV\VWHPDVVHUWV9,+RQWKH:3SLQWKHGHYLFHUHYHUWVWRZKHWKHUWKHERRWVHFWRUVZHUH ODVWVHWWREHSURWHFWHGRUXQSURWHFWHG7KDWLVVHFWRUSURWHFWLRQRUXQSURWHFWLRQIRUWKHVHVHFWRUV GHSHQGVRQZKHWKHUWKH\ZHUHODVWSURWHFWHGRUXQSURWHFWHG 1RWHWKDWWKH:3SLQPXVWQRWEHOHIWIORDWLQJRUXQFRQQHFWHGDVLQFRQVLVWHQWEHKDYLRURIWKH GHYLFHPD\UHVXOW 7KH:3SLQPXVWEHKHOGVWDEOHGXULQJDFRPPDQGVHTXHQFHH[HFXWLRQ $&&0HWKRG 7KLVPHWKRGLVVLPLODUWRDERYHH[FHSWLWSURWHFWVDOOVHFWRUV2QFH$&&LQSXWLVVHWWR9,/DOO SURJUDPDQGHUDVHIXQFWLRQVDUHGLVDEOHGDQGKHQFHDOOVHFWRUVDUHSURWHFWHG /RZ9&&:ULWH,QKLELW :KHQ9&&LVOHVVWKDQ9/.2WKHGHYLFHGRHVQRWDFFHSWDQ\ZULWHF\FOHV7KLVSURWHFWVGDWDGXULQJ 9&&SRZHUXSDQGSRZHUGRZQ 30 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t 7KHFRPPDQGUHJLVWHUDQGDOOLQWHUQDOSURJUDPHUDVHFLUFXLWVDUHGLVDEOHGDQGWKHGHYLFHUHVHWV WRUHDGLQJDUUD\GDWD6XEVHTXHQWZULWHVDUHLJQRUHGXQWLO9&&LVJUHDWHUWKDQ9/.27KHV\VWHP PXVWSURYLGHWKHSURSHUVLJQDOVWRWKHFRQWUROLQSXWVWRSUHYHQWXQLQWHQWLRQDOZULWHVZKHQ9&&LV JUHDWHUWKDQ9/.2 :ULWH3XOVH³*OLWFK3URWHFWLRQ´ 1RLVHSXOVHVRIOHVVWKDQQVW\SLFDORQ2(&(RU:(GRQRWLQLWLDWHDZULWHF\FOH 3RZHU8S:ULWH,QKLELW ,I:( &( 5(6(7 9,/DQG2( 9,+GXULQJSRZHUXSWKHGHYLFHGRHVQRWDFFHSWFRP PDQGVRQWKHULVLQJHGJHRI:(7KHLQWHUQDOVWDWHPDFKLQHLVDXWRPDWLFDOO\UHVHWWRWKHUHDG PRGHRQSRZHUXS Common Flash Memory Interface (CFI) 7KH&RPPRQ)ODVK,QWHUIDFH&),VSHFLILFDWLRQRXWOLQHVGHYLFHDQGKRVWV\VWHPVRIWZDUHLQWHU URJDWLRQKDQGVKDNHZKLFKDOORZVVSHFLILFYHQGRUVSHFLILHGVRIWZDUHDOJRULWKPVWREHXVHGIRU HQWLUHIDPLOLHVRIGHYLFHV6RIWZDUHVXSSRUWFDQWKHQEHGHYLFHLQGHSHQGHQW-('(&,'LQGHSHQ GHQWDQGIRUZDUGDQGEDFNZDUGFRPSDWLEOHIRUWKHVSHFLILHGIODVKGHYLFHIDPLOLHV)ODVKYHQGRUV FDQVWDQGDUGL]HWKHLUH[LVWLQJLQWHUIDFHVIRUORQJWHUPFRPSDWLELOLW\ 7KLVGHYLFHHQWHUVWKH&),4XHU\PRGHZKHQWKHV\VWHPZULWHVWKH&),4XHU\FRPPDQGKWR DGGUHVVKDQ\WLPHWKHGHYLFHLVUHDG\WRUHDGDUUD\GDWD7KHV\VWHPFDQUHDG&),LQIRUPDWLRQ DWWKHDGGUHVVHVJLYHQLQ7DEOHV7RWHUPLQDWHUHDGLQJ&),GDWDWKHV\VWHPPXVWZULWHWKH UHVHWFRPPDQG 7KHV\VWHPFDQDOVRZULWHWKH&),TXHU\FRPPDQGZKHQWKHGHYLFHLVLQWKHDXWRVHOHFWPRGH 7KHGHYLFHHQWHUVWKH&),TXHU\PRGHDQGWKHV\VWHPFDQUHDG&),GDWDDWWKHDGGUHVVHVJLYHQ LQ7DEOHV7KHV\VWHPPXVWZULWHWKHUHVHWFRPPDQGWRUHWXUQWKHGHYLFHWRWKHDXWRVHOHFW PRGH Table 8. CFI Query Identification String Addresses Data K K K K K K 4XHU\8QLTXH$6&,,VWULQJ³45<´ K K K K 3ULPDU\2(0&RPPDQG6HW K K K K $GGUHVVIRU3ULPDU\([WHQGHG7DEOH K K K K $OWHUQDWH2(0&RPPDQG6HWK QRQHH[LVWV K $K K K $GGUHVVIRU$OWHUQDWH2(0([WHQGHG7DEOHK QRQHH[LVWV June 24, 2005 S29WS-J_00_A4 Description S29WS128J/064J 31 D a t a Table 9. S h e e t System Interface String Addresses Data Description %K K 9&&0LQZULWHHUDVH '±'YROW'±'PLOOLYROW &K K 9&&0D[ZULWHHUDVH '±'YROW'±'PLOOLYROW 'K K 9330LQYROWDJHK QR933SLQSUHVHQW (K K 9330D[YROWDJHK QR933SLQSUHVHQW )K K 7\SLFDOWLPHRXWSHUVLQJOHE\WHZRUGZULWH1V K K 7\SLFDOWLPHRXWIRU0LQVL]HEXIIHUZULWH1VK QRWVXSSRUWHG K K 7\SLFDOWLPHRXWSHULQGLYLGXDOEORFNHUDVH1PV K K 7\SLFDOWLPHRXWIRUIXOOFKLSHUDVH1PVK QRWVXSSRUWHG K K 0D[WLPHRXWIRUE\WHZRUGZULWH1WLPHVW\SLFDO K K 0D[WLPHRXWIRUEXIIHUZULWH1WLPHVW\SLFDO K K 0D[WLPHRXWSHULQGLYLGXDOEORFNHUDVH1WLPHVW\SLFDO K K 0D[WLPHRXWIRUIXOOFKLSHUDVH1WLPHVW\SLFDOK QRWVXSSRUWHG Table 10. Device Geometry Definition Addresses K K:6- K:6- Description 'HYLFH6L]H 1E\WH K K K K )ODVK'HYLFH,QWHUIDFHGHVFULSWLRQUHIHUWR&),SXEOLFDWLRQ $K %K K K 0D[QXPEHURIE\WHVLQPXOWLE\WHZULWH 1 K QRWVXSSRUWHG &K K 1XPEHURI(UDVH%ORFN5HJLRQVZLWKLQGHYLFH 'K (K )K K K K K K (UDVH%ORFN5HJLRQ,QIRUPDWLRQ UHIHUWRWKH&),VSHFLILFDWLRQRU&),SXEOLFDWLRQ K 32 Data )'K:6- 'K:6- (UDVH%ORFN5HJLRQ,QIRUPDWLRQ K K K K K K K K K K K K K K (UDVH%ORFN5HJLRQ,QIRUPDWLRQ K $K %K &K K K K K (UDVH%ORFN5HJLRQ,QIRUPDWLRQ S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 11. S h e e t Primary Vendor-Specific Extended Query Addresses Data Description K K K K K K 4XHU\XQLTXH$6&,,VWULQJ³35,´ K K 0DMRUYHUVLRQQXPEHU$6&,, K K 0LQRUYHUVLRQQXPEHU$6&,, K &K $GGUHVV6HQVLWLYH8QORFN%LWV 5HTXLUHG 1RW5HTXLUHG 6LOLFRQ7HFKQRORJ\%LWV P K K (UDVH6XVSHQG 1RW6XSSRUWHG 7R5HDG2QO\ 7R5HDG:ULWH K K 6HFWRU3URWHFW 1RW6XSSRUWHG; 1XPEHURIVHFWRUVLQSHUJURXS K K 6HFWRU7HPSRUDU\8QSURWHFW 1RW6XSSRUWHG 6XSSRUWHG K K 6HFWRU3URWHFW8QSURWHFWVFKHPH $GYDQFHG6HFWRU3URWHFWLRQ $K (K:6- K:6- 6LPXOWDQHRXV2SHUDWLRQ 1XPEHURI6HFWRUVLQDOOEDQNVH[FHSWERRWEORFN %K K %XUVW0RGH7\SH 1RW6XSSRUWHG 6XSSRUWHG &K K 3DJH0RGH7\SH 1RW6XSSRUWHG :RUG3DJH :RUG3DJH :RUG3DJH 'K %K (K &K )K K K K 3URJUDP6XVSHQGK QRWVXSSRUWHG K K %DQN2UJDQL]DWLRQ; 1XPEHURIEDQNV K K $K %K June 24, 2005 S29WS-J_00_A4 K:6- K:6- K:6- K:6- K:6- K:6- K:6- K:6- $&&$FFHOHUDWLRQ6XSSO\0LQLPXP K 1RW6XSSRUWHG''9ROW''P9 $&&$FFHOHUDWLRQ6XSSO\0D[LPXP K 1RW6XSSRUWHG''9ROW''P9 7RS%RWWRP%RRW6HFWRU)ODJ K 'XDO%RRW'HYLFHK %RWWRP%RRW'HYLFHK 7RS%RRW'HYLFH %DQN$5HJLRQ,QIRUPDWLRQ; 1XPEHURIVHFWRUVLQEDQN %DQN%5HJLRQ,QIRUPDWLRQ; 1XPEHURIVHFWRUVLQEDQN %DQN&5HJLRQ,QIRUPDWLRQ; 1XPEHURIVHFWRUVLQEDQN %DQN'5HJLRQ,QIRUPDWLRQ; 1XPEHURIVHFWRUVLQEDQN S29WS128J/064J 33 D a t a Table 12. %DQN %DQN' 34 S h e e t WS128J Sector Address Table (Sheet 1 of 8) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Table 12. WS128J Sector Address Table (Sheet 2 of 8) %DQN %DQN& June 24, 2005 S29WS-J_00_A4 Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J 35 D a t a Table 12. %DQN %DQN& 36 S h e e t WS128J Sector Address Table (Sheet 3 of 8) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Table 12. WS128J Sector Address Table (Sheet 4 of 8) %DQN %DQN& June 24, 2005 S29WS-J_00_A4 Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J 37 D a t a Table 12. %DQN %DQN% 38 S h e e t WS128J Sector Address Table (Sheet 5 of 8) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 12. %DQN %DQN% June 24, 2005 S29WS-J_00_A4 S h e e t WS128J Sector Address Table (Sheet 6 of 8) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J 39 D a t a Table 12. %DQN %DQN% 40 S h e e t WS128J Sector Address Table (Sheet 7 of 8) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 12. %DQN %DQN$ June 24, 2005 S29WS-J_00_A4 S h e e t WS128J Sector Address Table (Sheet 8 of 8) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )$K)$)))K 6$ .ZRUGV )%K)%)))K 6$ .ZRUGV )&K)&)))K 6$ .ZRUGV )'K)')))K 6$ .ZRUGV )(K)()))K 6$ .ZRUGV ))K)))))K S29WS128J/064J 41 D a t a Table 13. %DQN %DQN' 42 S h e e t WS064J Sector Address Table (Sheet 1 of 6) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 13. %DQN %DQN& June 24, 2005 S29WS-J_00_A4 S h e e t WS064J Sector Address Table (Sheet 2 of 6) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K S29WS128J/064J 43 D a t a Table 13. %DQN %DQN& 44 S h e e t WS064J Sector Address Table (Sheet 3 of 6) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 13. %DQN %DQN% June 24, 2005 S29WS-J_00_A4 S h e e t WS064J Sector Address Table (Sheet 4 of 6) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K S29WS128J/064J 45 D a t a Table 13. %DQN %DQN% 46 S h e e t WS064J Sector Address Table (Sheet 5 of 6) Sector Sector Size (x16) Address Range 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K)))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a Table 13. %DQN %DQN$ S h e e t WS064J Sector Address Table (Sheet 6 of 6) Sector Sector Size (x16) Address Range 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV K)))K 6$ .ZRUGV K))))K 6$ .ZRUGV $K$)))K 6$ .ZRUGV $K$))))K 6$ .ZRUGV %K%)))K 6$ .ZRUGV %K%))))K 6$ .ZRUGV &K&)))K 6$ .ZRUGV &K&))))K 6$ .ZRUGV 'K')))K 6$ .ZRUGV 'K'))))K 6$ .ZRUGV (K()))K 6$ .ZRUGV (K())))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )K))))K 6$ .ZRUGV )$K)$)))K 6$ .ZRUGV )%K)%)))K 6$ .ZRUGV )&K)&)))K 6$ .ZRUGV )'K)')))K 6$ .ZRUGV )(K)()))K 6$ .ZRUGV ))K)))))K Command Definitions :ULWLQJVSHFLILFDGGUHVVDQGGDWDFRPPDQGVRUVHTXHQFHVLQWRWKHFRPPDQGUHJLVWHULQLWLDWHV GHYLFHRSHUDWLRQV7DEOH³&RPPDQG'HILQLWLRQV´RQSDJHGHILQHVWKHYDOLGUHJLVWHUFRP PDQGVHTXHQFHV:ULWLQJLQFRUUHFWDGGUHVVDQGGDWDYDOXHVRUZULWLQJWKHPLQWKHLPSURSHU VHTXHQFHPD\SODFHWKHGHYLFHLQDQXQNQRZQVWDWH7KHV\VWHPPXVWZULWHWKHUHVHWFRPPDQG WRUHWXUQWKHGHYLFHWRUHDGLQJDUUD\GDWD5HIHUWRWKH$&&KDUDFWHULVWLFVVHFWLRQIRUWLPLQJ GLDJUDPV Reading Array Data 7KHGHYLFHLVDXWRPDWLFDOO\VHWWRUHDGLQJDUUD\GDWDDIWHUGHYLFHSRZHUXS1RFRPPDQGVDUH UHTXLUHGWRUHWULHYHGDWDLQDV\QFKURQRXVPRGH(DFKEDQNLVUHDG\WRUHDGDUUD\GDWDDIWHUFRP SOHWLQJDQ(PEHGGHG3URJUDPRU(PEHGGHG(UDVHDOJRULWKP $IWHUWKHGHYLFHDFFHSWVDQ(UDVH6XVSHQGFRPPDQGWKHFRUUHVSRQGLQJEDQNHQWHUVWKHHUDVH VXVSHQGUHDGPRGHDIWHUZKLFKWKHV\VWHPFDQUHDGGDWDIURPDQ\QRQHUDVHVXVSHQGHGVHFWRU ZLWKLQWKHVDPHEDQN$IWHUFRPSOHWLQJDSURJUDPPLQJRSHUDWLRQLQWKH(UDVH6XVSHQGPRGH WKHV\VWHPPD\RQFHDJDLQUHDGDUUD\GDWDIURPDQ\QRQHUDVHVXVSHQGHGVHFWRUZLWKLQWKH VDPHEDQN6HHWKH³(UDVH6XVSHQG(UDVH5HVXPH&RPPDQGV´VHFWLRQRQSDJHIRUPRUH LQIRUPDWLRQ 7KHV\VWHPPXVWLVVXHWKHUHVHWFRPPDQGWRUHWXUQDEDQNWRWKHUHDGRUHUDVHVXVSHQGUHDG PRGHLI'4JRHVKLJKGXULQJDQDFWLYHSURJUDPRUHUDVHRSHUDWLRQRULIWKHEDQNLVLQWKHDX WRVHOHFWPRGH6HHWKH³5HVHW&RPPDQG´VHFWLRQRQSDJHIRUPRUHLQIRUPDWLRQ June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 47 D a t a S h e e t 6HHDOVR³5HTXLUHPHQWVIRU$V\QFKURQRXV5HDG2SHUDWLRQ1RQ%XUVW´VHFWLRQRQSDJHDQG ³5HTXLUHPHQWVIRU6\QFKURQRXV%XUVW5HDG2SHUDWLRQ´VHFWLRQRQSDJHIRUPRUHLQIRUPDWLRQ 7KH$V\QFKURQRXV5HDGDQG6\QFKURQRXV%XUVW5HDGWDEOHVSURYLGHWKHUHDGSDUDPHWHUVDQG )LJXUH³&/.6\QFKURQRXV%XUVW0RGH5HDGULVLQJDFWLYH&/.´RQSDJH)LJXUH³6\Q FKURQRXV%XUVW0RGH5HDG´RQSDJHDQG)LJXUH³$V\QFKURQRXV0RGH5HDGZLWK/DWFKHG $GGUHVVHV´RQSDJHVKRZWKHWLPLQJV Set Configuration Register Command Sequence 7KHGHYLFHXVHVDFRQILJXUDWLRQUHJLVWHUWRVHWWKHYDULRXVEXUVWSDUDPHWHUVQXPEHURIZDLW VWDWHVEXUVWUHDGPRGHDFWLYHFORFNHGJH5'<FRQILJXUDWLRQDQGV\QFKURQRXVPRGHDFWLYH7KH FRQILJXUDWLRQUHJLVWHUPXVWEHVHWEHIRUHWKHGHYLFHZLOOHQWHUEXUVWPRGH 7KHFRQILJXUDWLRQUHJLVWHULVORDGHGZLWKDWKUHHF\FOHFRPPDQGVHTXHQFH7KHILUVWWZRF\FOHV DUHVWDQGDUGXQORFNVHTXHQFHV2QWKHWKLUGF\FOHWKHGDWDVKRXOGEH&KDGGUHVVELWV$±$ VKRXOGEHKDQGDGGUHVVELWV$±$VHWWKHFRGHWREHODWFKHG7KHGHYLFHZLOOSRZHUXS RUDIWHUDKDUGZDUHUHVHWZLWKWKHGHIDXOWVHWWLQJZKLFKLVLQDV\QFKURQRXVPRGH7KHUHJLVWHU PXVWEHVHWEHIRUHWKHGHYLFHFDQHQWHUV\QFKURQRXVPRGH7KHFRQILJXUDWLRQUHJLVWHUFDQQRW EHFKDQJHGGXULQJGHYLFHRSHUDWLRQVSURJUDPHUDVHRUVHFWRUORFN 48 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Power-up/ Hardware Reset Asynchronous Read Mode Only Set Burst Mode Configuration Register Command for Synchronous Mode (A19 = 0) Set Burst Mode Configuration Register Command for Asynchronous Mode (A19 = 1) Synchronous Read Mode Only Figure 4. Synchronous/Asynchronous State Diagram 5HDG0RGH6HWWLQJ 2QSRZHUXSRUKDUGZDUHUHVHWWKHGHYLFHLVVHWWREHLQDV\QFKURQRXVUHDGPRGH7KLVVHWWLQJ DOORZVWKHV\VWHPWRHQDEOHRUGLVDEOHEXUVWPRGHGXULQJV\VWHPRSHUDWLRQV$GGUHVV$GHWHU PLQHVWKLVVHWWLQJ³¶IRUDV\QFKURQRXVPRGH³´IRUV\QFKURQRXVPRGH 3URJUDPPDEOH:DLW6WDWH&RQILJXUDWLRQ 7KHSURJUDPPDEOHZDLWVWDWHIHDWXUHLQIRUPVWKHGHYLFHRIWKHQXPEHURIFORFNF\FOHVWKDWPXVW HODSVHDIWHU$9'LVGULYHQDFWLYHEHIRUHGDWDZLOOEHDYDLODEOH7KLVYDOXHLVGHWHUPLQHGE\WKH LQSXWIUHTXHQF\RIWKHGHYLFH$GGUHVVELWV$±$GHWHUPLQHWKHVHWWLQJVHH7DEOH³3UR JUDPPDEOH:DLW6WDWH6HWWLQJV´RQSDJH 7KHZDLWVWDWHFRPPDQGVHTXHQFHLQVWUXFWVWKHGHYLFHWRVHWDSDUWLFXODUQXPEHURIFORFNF\FOHV IRUWKHLQLWLDODFFHVVLQEXUVWPRGH7KHQXPEHURIZDLWVWDWHVWKDWVKRXOGEHSURJUDPPHGLQWR WKHGHYLFHLVGLUHFWO\UHODWHGWRWKHFORFNIUHTXHQF\ June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 49 D a t a Table 14. S h e e t Programmable Wait State Settings A14 A13 A12 Total Initial Access Cycles GHIDXOW 5HVHUYHG 5HVHUYHG 1RWHV 8SRQSRZHUXSRUKDUGZDUHUHVHWWKHGHIDXOWVHWWLQJLVVHYHQZDLWVWDWHV 5'<ZLOOGHIDXOWWREHLQJDFWLYHZLWKGDWDZKHQWKH:DLW6WDWH6HWWLQJLVVHWWRD WRWDOLQLWLDODFFHVVF\FOHRI ,WLVUHFRPPHQGHGWKDWWKHZDLWVWDWHFRPPDQGVHTXHQFHEHZULWWHQHYHQLIWKHGHIDXOWZDLW VWDWHYDOXHLVGHVLUHGWRHQVXUHWKHGHYLFHLVVHWDVH[SHFWHG$KDUGZDUHUHVHWZLOOVHWWKHZDLW VWDWHWRWKHGHIDXOWVHWWLQJ 6WDQGDUGZDLWVWDWH+DQGVKDNLQJ2SWLRQ 7KHKRVWV\VWHPPXVWVHWWKHDSSURSULDWHQXPEHURIZDLWVWDWHVLQWKHIODVKGHYLFHGHSHQGLQJ XSRQWKHFORFNIUHTXHQF\7KHKRVWV\VWHPVKRXOGVHWDGGUHVVELWV$±$WRIRUDFORFN IUHTXHQF\RI0+]IRUWKHV\VWHPGHYLFHWRH[HFXWHDWPD[LPXPVSHHG 7DEOHGHVFULEHVWKHUHFRPPHQGHGQXPEHURIFORFNF\FOHVZDLWVWDWHVIRUYDULRXVFRQGLWLRQV Table 15. Wait States for Standard wait-state Handshaking Typical No. of Clock Cycles after AVD# Low Burst Mode 66 MHz 80 MHz :RUGRU:RUGRU&RQWLQXRXV RU :RUG 1RWHV ,QWKHDQGZRUGEXUVWUHDGPRGHVWKHDGGUHVVSRLQWHUGRHVQRWFURVV ZRUGERXQGDULHVDGGUHVVHVZKLFKDUHPXOWLSOHVRI)K )RU:6-PRGHOQXPEHUVDQGDQDGGLWLRQDOFORFNF\FOHLVUHTXLUHGIRU ERXQGDU\FURVVLQJVZKLOHLQ&RQWLQXRXVUHDGPRGH 7KHKRVWV\VWHPPXVWVHWWKHDSSURSULDWHQXPEHURIZDLWVWDWHVLQWKHIODVKGHYLFHGHSHQGLQJ XSRQWKHFORFNIUHTXHQF\1RWHWKDWWKHKRVWV\VWHPPXVWVHWDJDLQWKHQXPEHURIZDLWVWDWH ZKHQWKHKRVWV\VWHPFKDQJHWKHFORFNIUHTXHQF\)RUH[DPSOHWKHKRVWV\VWHPPXVWVHWIURP RUZDLWVWDWHWROHVVWKDQZDLWVWDWHVZKHQWKHKRVWV\VWHPFKDQJHWKHFORFNIUHTXHQF\IURP 0+]WROHVVWKDQ0+]7KHDXWRVHOHFWIXQFWLRQDOORZVWKHKRVWV\VWHPWRGHWHUPLQHZKHWKHU WKHIODVKGHYLFHLVHQDEOHGIRUKDQGVKDNLQJ6HHWKH³$XWRVHOHFW&RPPDQG6HTXHQFH´VHFWLRQRQ SDJHIRUPRUHLQIRUPDWLRQ 50 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t 5HDG0RGH&RQILJXUDWLRQ 7KHGHYLFHVXSSRUWVIRXUGLIIHUHQWUHDGPRGHVFRQWLQXRXVPRGHDQGDQGZRUGOLQHDU ZUDSDURXQGPRGHV$FRQWLQXRXVVHTXHQFHEHJLQVDWWKHVWDUWLQJDGGUHVVDQGDGYDQFHVWKHDG GUHVVSRLQWHUXQWLOWKHEXUVWRSHUDWLRQLVFRPSOHWH,IWKHKLJKHVWDGGUHVVLQWKHGHYLFHLVUHDFKHG GXULQJWKHFRQWLQXRXVEXUVWUHDGPRGHWKHDGGUHVVSRLQWHUZUDSVDURXQGWRWKHORZHVWDGGUHVV )RUH[DPSOHDQHLJKWZRUGOLQHDUUHDGZLWKZUDSDURXQGEHJLQVRQWKHVWDUWLQJDGGUHVVZULWWHQ WRWKHGHYLFHDQGWKHQDGYDQFHVWRWKHQH[WZRUGERXQGDU\7KHDGGUHVVSRLQWHUWKHQUHWXUQV WRWKHVWZRUGDIWHUWKHSUHYLRXVHLJKWZRUGERXQGDU\ZUDSSLQJWKURXJKWKHVWDUWLQJORFDWLRQ 7KHVL[WHHQDQGWKLUW\WZROLQHDUZUDSDURXQGPRGHVRSHUDWHLQDIDVKLRQVLPLODUWRWKHHLJKW ZRUGPRGH 7DEOHVKRZVWKHDGGUHVVELWVDQGVHWWLQJVIRUWKHIRXUUHDGPRGHV Table 16. Read Mode Settings Address Bits Burst Modes A16 A15 &RQWLQXRXV ZRUGOLQHDUZUDSDURXQG ZRUGOLQHDUZUDSDURXQG ZRUGOLQHDUZUDSDURXQG 1RWH8SRQSRZHUXSRUKDUGZDUHUHVHWWKHGHIDXOWVHWWLQJLVFRQWLQXRXV %XUVW$FWLYH&ORFN(GJH&RQILJXUDWLRQ %\GHIDXOWWKHGHYLFHZLOOGHOLYHUGDWDRQWKHULVLQJHGJHRIWKHFORFNDIWHUWKHLQLWLDOV\QFKURQRXV DFFHVVWLPH6XEVHTXHQWRXWSXWVZLOODOVREHRQWKHIROORZLQJULVLQJHGJHVEDUULQJDQ\GHOD\V 7KHGHYLFHFDQEHVHWVRWKDWWKHIDOOLQJFORFNHGJHLVDFWLYHIRUDOOV\QFKURQRXVDFFHVVHV$GGUHVV ELW$GHWHUPLQHVWKLVVHWWLQJ³´IRUULVLQJDFWLYH³´IRUIDOOLQJDFWLYH 5'<&RQILJXUDWLRQ %\GHIDXOWWKHGHYLFHLVVHWVRWKDWWKH5'<SLQZLOORXWSXW92+ZKHQHYHUWKHUHLVYDOLGGDWDRQ WKHRXWSXWV7KHGHYLFHFDQEHVHWVRWKDW5'<JRHVDFWLYHRQHGDWDF\FOHEHIRUHDFWLYHGDWD $GGUHVVELW$GHWHUPLQHVWKLVVHWWLQJ³´IRU5'<DFWLYHZLWKGDWD³´IRU5'<DFWLYHRQHFORFN F\FOHEHIRUHYDOLGGDWD2QO\WKHFRPELQDWLRQRIZDLWVWDWHDQG5'<DFWLYHRQHFORFNF\FOHEHIRUH GDWDLVQRWVXSSRUWHG,QDV\QFKURQRXVPRGH5'<LVDQRSHQGUDLQRXWSXW Configuration Register 7DEOHVKRZVWKHDGGUHVVELWVWKDWGHWHUPLQHWKHFRQILJXUDWLRQUHJLVWHUVHWWLQJVIRUYDULRXVGH YLFHIXQFWLRQV June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 51 D a t a S h e e t Table 17. Configuration Register Address Bit Function $ 6HW'HYLFH 5HDG0RGH $ 5'< 5'<DFWLYHRQHFORFNF\FOHEHIRUHGDWD 5'<DFWLYHZLWKGDWDGHIDXOW $ &ORFN %XUVWVWDUWVDQGGDWDLVRXWSXWRQWKHIDOOLQJHGJHRI&/. %XUVWVWDUWVDQGGDWDLVRXWSXWRQWKHULVLQJHGJHRI&/.GHIDXOW $ $ $ $ $ Settings (Binary) 6\QFKURQRXV5HDG%XUVW0RGH(QDEOHG $V\QFKURQRXV0RGHGHIDXOW 6\QFKURQRXV0RGH 5HDG0RGH 3URJUDPPDEOH :DLW6WDWH &RQWLQXRXVGHIDXOW ZRUGOLQHDUZLWKZUDSDURXQG ZRUGOLQHDUZLWKZUDSDURXQG ZRUGOLQHDUZLWKZUDSDURXQG 'DWDLVYDOLGRQWKHQGDFWLYH&/.HGJHDIWHU$9'WUDQVLWLRQWR9,+ 'DWDLVYDOLGRQWKHUGDFWLYH&/.HGJHDIWHU$9'WUDQVLWLRQWR9,+ 'DWDLVYDOLGRQWKHWKDFWLYH&/.HGJHDIWHU$9'WUDQVLWLRQWR9,+ 'DWDLVYDOLGRQWKHWKDFWLYH&/.HGJHDIWHU$9'WUDQVLWLRQWR9,+ 'DWDLVYDOLGRQWKHWKDFWLYH&/.HGJHDIWHU$9'WUDQVLWLRQWR9,+ 'DWDLVYDOLGRQWKHWKDFWLYH&/.HGJHDIWHU$9'WUDQVLWLRQWR9,+GHIDXOW 5HVHUYHG 5HVHUYHG 1RWH'HYLFHLVLQWKHGHIDXOWVWDWHXSRQSRZHUXSRUKDUGZDUHUHVHW Reset Command :ULWLQJWKHUHVHWFRPPDQGUHVHWVWKHEDQNVWRWKHUHDGRUHUDVHVXVSHQGUHDGPRGH$GGUHVV ELWVDUHGRQ¶WFDUHVIRUWKLVFRPPDQG 7KHUHVHWFRPPDQGPD\EHZULWWHQEHWZHHQWKHVHTXHQFHF\FOHVLQDQHUDVHFRPPDQGVHTXHQFH EHIRUHHUDVLQJEHJLQV7KLVUHVHWVWKHEDQNWRZKLFKWKHV\VWHPZDVZULWLQJWRWKHUHDGPRGH 2QFH HUDVXUH EHJLQV KRZHYHU WKH GHYLFH LJQRUHV UHVHW FRPPDQGV XQWLO WKH RSHUDWLRQ LV FRPSOHWH 7KHUHVHWFRPPDQGPD\EHZULWWHQEHWZHHQWKHVHTXHQFHF\FOHVLQDSURJUDPFRPPDQGVH TXHQFHEHIRUHSURJUDPPLQJEHJLQVSULRUWRWKHWKLUGF\FOH7KLVUHVHWVWKHEDQNWRZKLFKWKH V\VWHPZDVZULWLQJWRWKHUHDGPRGH,IWKHSURJUDPFRPPDQGVHTXHQFHLVZULWWHQWRDEDQNWKDW LVLQWKH(UDVH6XVSHQGPRGHZULWLQJWKHUHVHWFRPPDQGUHWXUQVWKDWEDQNWRWKHHUDVHVXV SHQGUHDGPRGH2QFHSURJUDPPLQJEHJLQVKRZHYHUWKHGHYLFHLJQRUHVUHVHWFRPPDQGVXQWLO WKHRSHUDWLRQLVFRPSOHWH 7KHUHVHWFRPPDQGPD\EHZULWWHQEHWZHHQWKHVHTXHQFHF\FOHVLQDQDXWRVHOHFWFRPPDQGVH TXHQFH2QFHLQWKHDXWRVHOHFWPRGHWKHUHVHWFRPPDQGPXVWEHZULWWHQWRUHWXUQWRWKHUHDG PRGH,IDEDQNHQWHUHGWKHDXWRVHOHFWPRGHZKLOHLQWKH(UDVH6XVSHQGPRGHZULWLQJWKHUHVHW FRPPDQGUHWXUQVWKDWEDQNWRWKHHUDVHVXVSHQGUHDGPRGH ,I'4JRHVKLJKGXULQJDSURJUDPRUHUDVHRSHUDWLRQZULWLQJWKHUHVHWFRPPDQGUHWXUQVWKH EDQNVWRWKHUHDGPRGHRUHUDVHVXVSHQGUHDGPRGHLIWKDWEDQNZDVLQ(UDVH6XVSHQG Autoselect Command Sequence 7KHDXWRVHOHFWFRPPDQGVHTXHQFHDOORZVWKHKRVWV\VWHPWRDFFHVVWKHPDQXIDFWXUHUDQGGHYLFH FRGHVDQGGHWHUPLQHZKHWKHURUQRWDVHFWRULVSURWHFWHG7DEOH³&RPPDQG'HILQLWLRQV´RQ SDJHVKRZVWKHDGGUHVVDQGGDWDUHTXLUHPHQWV7KHDXWRVHOHFWFRPPDQGVHTXHQFHPD\EH 52 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t ZULWWHQWRDQDGGUHVVZLWKLQDEDQNWKDWLVHLWKHULQWKHUHDGRUHUDVHVXVSHQGUHDGPRGH7KH DXWRVHOHFWFRPPDQGPD\QRWEHZULWWHQZKLOHWKHGHYLFHLVDFWLYHO\SURJUDPPLQJRUHUDVLQJLQ WKHRWKHUEDQN 7KHDXWRVHOHFWFRPPDQGVHTXHQFHLVLQLWLDWHGE\ILUVWZULWLQJWZRXQORFNF\FOHV7KLVLVIROORZHG E\DWKLUGZULWHF\FOHWKDWFRQWDLQVWKHEDQNDGGUHVVDQGWKHDXWRVHOHFWFRPPDQG7KHEDQNWKHQ HQWHUVWKHDXWRVHOHFWPRGH1RVXEVHTXHQWGDWDZLOOEHPDGHDYDLODEOHLIWKHDXWRVHOHFWGDWDLV UHDGLQV\QFKURQRXVPRGH7KHV\VWHPPD\UHDGDWDQ\DGGUHVVZLWKLQWKHVDPHEDQNDQ\QXP EHURIWLPHVZLWKRXWLQLWLDWLQJDQRWKHUDXWRVHOHFWFRPPDQGVHTXHQFH5HDGFRPPDQGVWRRWKHU EDQNVZLOOUHWXUQGDWDIURPWKHDUUD\7KHIROORZLQJWDEOHGHVFULEHVWKHDGGUHVVUHTXLUHPHQWVIRU WKHYDULRXVDXWRVHOHFWIXQFWLRQVDQGWKHUHVXOWLQJGDWD%$UHSUHVHQWVWKHEDQNDGGUHVVDQG6$ UHSUHVHQWVWKHVHFWRUDGGUHVV7KHGHYLFH,'LVUHDGLQWKUHHF\FOHV Description Address Read Data 0DQXIDFWXUHU,' %$K K 'HYLFH,':RUG %$K (K 'HYLFH,':RUG %$(K 'HYLFH,':RUG %$)K 6HFWRU3URWHFWLRQ 9HULILFDWLRQ 6$K K:6- (K:6- K:6- K:6- ORFNHG XQORFNHG '4'4 '4)DFWRU\/RFN%LW /RFNHG 1RW/RFNHG '4&XVWRPHU/RFN%LW /RFNHG 1RW/RFNHG '4+DQGVKDNH%LW ,QGLFDWRU%LWV %$K 5HVHUYHG 6WDQGDUG+DQGVKDNH '4'4%RRW&RGH 'XDO%RRW6HFWRU 7RS%RRW6HFWRU %RWWRP%RRW6HFWRU '4'4 7KHV\VWHPPXVWZULWHWKHUHVHWFRPPDQGWRUHWXUQWRWKHUHDGPRGHRUHUDVHVXVSHQGUHDG PRGHLIWKHEDQNZDVSUHYLRXVO\LQ(UDVH6XVSHQG Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence 7KH6HFXUHG6LOLFRQ6HFWRUUHJLRQSURYLGHVDVHFXUHGGDWDDUHDFRQWDLQLQJDUDQGRPHLJKWZRUG HOHFWURQLFVHULDOQXPEHU(617KHV\VWHPFDQDFFHVVWKH6HFXUHG6LOLFRQ6HFWRUUHJLRQE\LV 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IRUWLPLQJGLDJUDPV START Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Yes Increment Address No Last Address? Yes Programming Completed 1RWH6HH7DEOHIRUSURJUDPFRPPDQGVHTXHQFH Figure 5. Program Operation Chip Erase Command Sequence &KLSHUDVHLVDVL[EXVF\FOHRSHUDWLRQ7KHFKLSHUDVHFRPPDQGVHTXHQFHLVLQLWLDWHGE\ZULWLQJ WZRXQORFNF\FOHVIROORZHGE\DVHWXSFRPPDQG7ZRDGGLWLRQDOXQORFNZULWHF\FOHVDUHWKHQ IROORZHGE\WKHFKLSHUDVHFRPPDQGZKLFKLQWXUQLQYRNHVWKH(PEHGGHG(UDVHDOJRULWKP7KH GHYLFHGRHVQRWUHTXLUHWKHV\VWHPWRSUHSURJUDPSULRUWRHUDVH7KH(PEHGGHG(UDVHDOJRULWKP DXWRPDWLFDOO\SUHSURJUDPVDQGYHULILHVWKHHQWLUHPHPRU\IRUDQDOO]HURGDWDSDWWHUQSULRUWR HOHFWULFDOHUDVH7KHV\VWHPLVQRWUHTXLUHGWRSURYLGHDQ\FRQWUROVRUWLPLQJVGXULQJWKHVHRSHU DWLRQV7DEOH³&RPPDQG'HILQLWLRQV´RQSDJHVKRZVWKHDGGUHVVDQGGDWDUHTXLUHPHQWV IRUWKHFKLSHUDVHFRPPDQGVHTXHQFH :KHQWKH(PEHGGHG(UDVHDOJRULWKPLVFRPSOHWHWKDWEDQNUHWXUQVWRWKHUHDGPRGHDQGDG GUHVVHVDUHQRORQJHUODWFKHG7KHV\VWHPFDQGHWHUPLQHWKHVWDWXVRIWKHHUDVHRSHUDWLRQE\ XVLQJ'4RU'4'45HIHUWRWKH³:ULWH2SHUDWLRQ6WDWXV´VHFWLRQRQSDJHIRULQIRUPDWLRQ RQWKHVHVWDWXVELWV $Q\FRPPDQGVZULWWHQGXULQJWKHFKLSHUDVHRSHUDWLRQDUHLJQRUHG+RZHYHUQRWHWKDWDKDUG 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Data# Polling Algorithm RDY: Ready 7KH5'<LVDGHGLFDWHGRXWSXWWKDWZKHQWKHGHYLFHLVFRQILJXUHGLQWKH6\QFKURQRXVPRGHLQ GLFDWHVZKHQDWORJLFORZWKHV\VWHPVKRXOGZDLWFORFNF\FOHEHIRUHH[SHFWLQJWKHQH[WZRUG RIGDWD7KH5'<SLQLVRQO\FRQWUROOHGE\&(8VLQJWKH5'<&RQILJXUDWLRQ&RPPDQG6HTXHQFH 5'<FDQEHVHWVRWKDWDORJLFORZLQGLFDWHVWKHV\VWHPVKRXOGZDLWFORFNF\FOHVEHIRUHH[SHFWLQJ YDOLGGDWD 7KHIROORZLQJFRQGLWLRQVFDXVHWKH5'<RXWSXWWREHORZGXULQJWKHLQLWLDODFFHVVLQEXUVWPRGH DQGDIWHUWKHERXQGDU\WKDWRFFXUVHYHU\ZRUGVEHJLQQLQJZLWKWKHWKDGGUHVV)K :KHQWKHGHYLFHLVFRQILJXUHGLQ$V\QFKURQRXV0RGHWKH5'<LVDQRSHQGUDLQRXWSXWSLQZKLFK LQGLFDWHVZKHWKHUDQ(PEHGGHG$OJRULWKPLVLQSURJUHVVRUFRPSOHWHG7KH5'<VWDWXVLVYDOLG DIWHUWKHULVLQJHGJHRIWKHILQDO:(SXOVHLQWKHFRPPDQGVHTXHQFH 64 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t ,IWKHRXWSXWLVORZ%XV\WKHGHYLFHLVDFWLYHO\HUDVLQJRUSURJUDPPLQJ7KLVLQFOXGHVSURJUDP PLQJLQWKH(UDVH6XVSHQGPRGH,IWKHRXWSXWLVLQKLJKLPSHGDQFH5HDG\WKHGHYLFHLVLQ WKHUHDGPRGHWKHVWDQGE\PRGHRULQWKHHUDVHVXVSHQGUHDGPRGH7DEOH³:ULWH2SHUD WLRQ6WDWXV´RQSDJHVKRZVWKHRXWSXWVIRU5'< DQ6: Toggle Bit I 7RJJOH%LW,RQ'4LQGLFDWHVZKHWKHUDQ(PEHGGHG3URJUDPRU(UDVHDOJRULWKPLVLQSURJUHVVRU FRPSOHWHRUZKHWKHUWKHGHYLFHKDVHQWHUHGWKH(UDVH6XVSHQGPRGH7RJJOH%LW,PD\EHUHDG DWDQ\DGGUHVVLQWKHVDPHEDQNDQGLVYDOLGDIWHUWKHULVLQJHGJHRIWKHILQDO:(SXOVHLQWKH FRPPDQGVHTXHQFHSULRUWRWKHSURJUDPRUHUDVHRSHUDWLRQDQGGXULQJWKHVHFWRUHUDVHWLPH RXW 'XULQJDQ(PEHGGHG3URJUDPRU(UDVHDOJRULWKPRSHUDWLRQVXFFHVVLYHUHDGF\FOHVWRDQ\DG GUHVVFDXVH'4WRWRJJOH:KHQWKHRSHUDWLRQLVFRPSOHWH'4VWRSVWRJJOLQJ $IWHUDQHUDVHFRPPDQGVHTXHQFHLVZULWWHQLIDOOVHFWRUVVHOHFWHGIRUHUDVLQJDUHSURWHFWHG'4 WRJJOHVIRUDSSUR[LPDWHO\VWKHQUHWXUQVWRUHDGLQJDUUD\GDWD,IQRWDOOVHOHFWHGVHFWRUV DUHSURWHFWHGWKH(PEHGGHG(UDVHDOJRULWKPHUDVHVWKHXQSURWHFWHGVHFWRUVDQGLJQRUHVWKH VHOHFWHGVHFWRUVWKDWDUHSURWHFWHG 7KHV\VWHPFDQXVH'4DQG'4WRJHWKHUWRGHWHUPLQHZKHWKHUDVHFWRULVDFWLYHO\HUDVLQJRU LVHUDVHVXVSHQGHG:KHQWKHGHYLFHLVDFWLYHO\HUDVLQJWKDWLVWKH(PEHGGHG(UDVHDOJRULWKP LVLQSURJUHVV'4WRJJOHV:KHQWKHGHYLFHHQWHUVWKH(UDVH6XVSHQGPRGH'4VWRSVWRJ JOLQJ+RZHYHUWKHV\VWHPPXVWDOVRXVH'4WRGHWHUPLQHZKLFKVHFWRUVDUHHUDVLQJRUHUDVH VXVSHQGHG$OWHUQDWLYHO\WKHV\VWHPFDQXVH'4VHHWKHVXEVHFWLRQRQ'4'DWD3ROOLQJ ,IDSURJUDPDGGUHVVIDOOVZLWKLQDSURWHFWHGVHFWRU'4WRJJOHVIRUDSSUR[LPDWHO\PVDIWHUWKH SURJUDPFRPPDQGVHTXHQFHLVZULWWHQWKHQUHWXUQVWRUHDGLQJDUUD\GDWD '4DOVRWRJJOHVGXULQJWKHHUDVHVXVSHQGSURJUDPPRGHDQGVWRSVWRJJOLQJRQFHWKH(PEHG GHG3URJUDPDOJRULWKPLVFRPSOHWH 6HHWKHIROORZLQJIRUDGGLWLRQDOLQIRUPDWLRQ)LJXUH³7RJJOH%LW$OJRULWKP´RQSDJH'4 7RJJOH %LW , RQ SDJH )LJXUH ³7RJJOH %LW 7LPLQJV 'XULQJ(PEHGGHG$OJRULWKP´ RQ SDJHWRJJOHELWWLPLQJGLDJUDPDQG7DEOH³'4DQG'4,QGLFDWLRQV´RQSDJH 7RJJOH%LW,RQ'4UHTXLUHVHLWKHU2(RU&(WREHGHDVVHUWHHGDQGUHDVVHUWHGWRVKRZWKH FKDQJHLQVWDWH June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 65 D a t a S h e e t START Read Byte (DQ0-DQ7) Address = VA Read Byte (DQ0-DQ7) Address = VA DQ6 = Toggle? No Yes No DQ5 = 1? Yes Read Byte Twice (DQ 0-DQ7) Adrdess = VA DQ6 = Toggle? No Yes FAIL PASS 1RWH7KHV\VWHPVKRXOGUHFKHFNWKHWRJJOHELWHYHQLI'4 ³´EHFDXVHWKHWRJJOHELWPD\VWRSWRJJOLQJDV'4 FKDQJHVWR³´6HHWKHVXEVHFWLRQVRQ'4DQG'4IRUPRUHLQIRUPDWLRQ Figure 8. Toggle Bit Algorithm DQ2: Toggle Bit II 7KH³7RJJOH%LW,,´RQ'4ZKHQXVHGZLWK'4LQGLFDWHVZKHWKHUDSDUWLFXODUVHFWRULVDFWLYHO\ HUDVLQJWKDWLVWKH(PEHGGHG(UDVHDOJRULWKPLVLQSURJUHVVRUZKHWKHUWKDWVHFWRULVHUDVH VXVSHQGHG7RJJOH%LW,,LVYDOLGDIWHUWKHULVLQJHGJHRIWKHILQDO:(SXOVHLQWKHFRPPDQG VHTXHQFH '4WRJJOHVZKHQWKHV\VWHPUHDGVDWDGGUHVVHVZLWKLQWKRVHVHFWRUVWKDWKDYHEHHQVHOHFWHG IRUHUDVXUH%XW'4FDQQRWGLVWLQJXLVKZKHWKHUWKHVHFWRULVDFWLYHO\HUDVLQJRULVHUDVHVXV SHQGHG'4E\FRPSDULVRQLQGLFDWHVZKHWKHUWKHGHYLFHLVDFWLYHO\HUDVLQJRULVLQ(UDVH 66 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t 6XVSHQGEXWFDQQRWGLVWLQJXLVKZKLFKVHFWRUVDUHVHOHFWHGIRUHUDVXUH7KXVERWKVWDWXVELWVDUH UHTXLUHGIRUVHFWRUDQGPRGHLQIRUPDWLRQ5HIHUWR7DEOH³'4DQG'4,QGLFDWLRQV´RQ SDJHWRFRPSDUHRXWSXWVIRU'4DQG'4 6HHWKHIROORZLQJIRUDGGLWLRQDOLQIRUPDWLRQ)LJXUH³7RJJOH%LW$OJRULWKP´RQSDJH6HH '47RJJOH%LW,RQSDJH)LJXUH³7RJJOH%LW7LPLQJV'XULQJ(PEHGGHG$OJRULWKP´RQ SDJHDQG7DEOH³'4DQG'4,QGLFDWLRQV´RQSDJH Table 19. DQ6 and DQ2 Indications If device is and the system reads then DQ6 and DQ2 SURJUDPPLQJ DWDQ\DGGUHVV WRJJOHV GRHVQRWWRJJOH DWDQDGGUHVVZLWKLQDVHFWRU VHOHFWHGIRUHUDVXUH WRJJOHV DOVRWRJJOHV DWDQDGGUHVVZLWKLQVHFWRUVQRW VHOHFWHGIRUHUDVXUH WRJJOHV GRHVQRWWRJJOH DWDQDGGUHVVZLWKLQDVHFWRU VHOHFWHGIRUHUDVXUH GRHVQRWWRJJOH WRJJOHV DWDQDGGUHVVZLWKLQVHFWRUVQRW VHOHFWHGIRUHUDVXUH UHWXUQVDUUD\GDWD UHWXUQVDUUD\GDWD7KHV\VWHPFDQUHDG IURPDQ\VHFWRUQRWVHOHFWHGIRUHUDVXUH DWDQ\DGGUHVV WRJJOHV LVQRWDSSOLFDEOH DFWLYHO\HUDVLQJ HUDVHVXVSHQGHG SURJUDPPLQJLQ HUDVHVXVSHQG Reading Toggle Bits DQ6/DQ2 5HIHUWR)LJXUH³7RJJOH%LW$OJRULWKP´RQSDJHIRUWKHIROORZLQJGLVFXVVLRQ:KHQHYHUWKH V\VWHPLQLWLDOO\EHJLQVUHDGLQJWRJJOHELWVWDWXVLWPXVWUHDG'4±'4DWOHDVWWZLFHLQDURZWR GHWHUPLQHZKHWKHUDWRJJOHELWLVWRJJOLQJ7\SLFDOO\WKHV\VWHPZRXOGQRWHDQGVWRUHWKHYDOXH RIWKHWRJJOHELWDIWHUWKHILUVWUHDG$IWHUWKHVHFRQGUHDGWKHV\VWHPZRXOGFRPSDUHWKHQHZ YDOXHRIWKHWRJJOHELWZLWKWKHILUVW,IWKHWRJJOHELWLVQRWWRJJOLQJWKHGHYLFHKDVFRPSOHWHGWKH SURJUDPRUHUDVHRSHUDWLRQ7KHV\VWHPFDQUHDGDUUD\GDWDRQ'4±'4RQWKHIROORZLQJUHDG F\FOH +RZHYHULIDIWHUWKHLQLWLDOWZRUHDGF\FOHVWKHV\VWHPGHWHUPLQHVWKDWWKHWRJJOHELWLVVWLOOWRJ JOLQJWKHV\VWHPDOVRVKRXOGQRWHZKHWKHUWKHYDOXHRI'4LVKLJKVHHWKHVHFWLRQRQ'4,I LWLVWKHV\VWHPVKRXOGWKHQGHWHUPLQHDJDLQZKHWKHUWKHWRJJOHELWLVWRJJOLQJVLQFHWKHWRJJOH ELWPD\KDYHVWRSSHGWRJJOLQJMXVWDV'4ZHQWKLJK,IWKHWRJJOHELWLVQRORQJHUWRJJOLQJWKH GHYLFHKDVVXFFHVVIXOO\FRPSOHWHGWKHSURJUDPRUHUDVHRSHUDWLRQ,ILWLVVWLOOWRJJOLQJWKHGHYLFH GLGQRWFRPSOHWHGWKHRSHUDWLRQVXFFHVVIXOO\DQGWKHV\VWHPPXVWZULWHWKHUHVHWFRPPDQGWR UHWXUQWRUHDGLQJDUUD\GDWD 7KHUHPDLQLQJVFHQDULRLVWKDWWKHV\VWHPLQLWLDOO\GHWHUPLQHVWKDWWKHWRJJOHELWLVWRJJOLQJDQG '4KDVQRWJRQHKLJK7KHV\VWHPPD\FRQWLQXHWRPRQLWRUWKHWRJJOHELWDQG'4WKURXJKVXF FHVVLYHUHDGF\FOHVGHWHUPLQLQJWKHVWDWXVDVGHVFULEHGLQWKHSUHYLRXVSDUDJUDSK$OWHUQDWLYHO\ LWPD\FKRRVHWRSHUIRUPRWKHUV\VWHPWDVNV,QWKLVFDVHWKHV\VWHPPXVWVWDUWDWWKHEHJLQQLQJ RIWKHDOJRULWKPZKHQLWUHWXUQVWRGHWHUPLQHWKHVWDWXVRIWKHRSHUDWLRQ)LJXUH³7RJJOH%LW $OJRULWKP´RQSDJH DQ5: Exceeded Timing Limits '4LQGLFDWHVZKHWKHUWKHSURJUDPRUHUDVHWLPHKDVH[FHHGHGDVSHFLILHGLQWHUQDOSXOVHFRXQW OLPLW8QGHUWKHVHFRQGLWLRQV'4SURGXFHVD³´LQGLFDWLQJWKDWWKHSURJUDPRUHUDVHF\FOHZDV QRWVXFFHVVIXOO\FRPSOHWHG June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 67 D a t a S h e e t 7KHGHYLFHPD\RXWSXWD³´RQ'4LIWKHV\VWHPWULHVWRSURJUDPD³´WRDORFDWLRQWKDWZDV SUHYLRXVO\SURJUDPPHGWR³´2QO\DQHUDVHRSHUDWLRQFDQFKDQJHD³´EDFNWRD³´8QGHUWKLV FRQGLWLRQWKHGHYLFHKDOWVWKHRSHUDWLRQDQGZKHQWKHWLPLQJOLPLWKDVEHHQH[FHHGHG'4SUR GXFHVD³´ 8QGHUERWKWKHVHFRQGLWLRQVWKHV\VWHPPXVWZULWHWKHUHVHWFRPPDQGWRUHWXUQWRWKHUHDG PRGHRUWRWKHHUDVHVXVSHQGUHDGPRGHLIDEDQNZDVSUHYLRXVO\LQWKHHUDVHVXVSHQGSURJUDP PRGH DQ3: Sector Erase Timer $IWHUZULWLQJDVHFWRUHUDVHFRPPDQGVHTXHQFHWKHV\VWHPPD\UHDG'4WRGHWHUPLQHZKHWKHU RUQRWHUDVXUHKDVEHJXQ7KHVHFWRUHUDVHWLPHUGRHVQRWDSSO\WRWKHFKLSHUDVHFRPPDQG,I DGGLWLRQDOVHFWRUVDUHVHOHFWHGIRUHUDVXUHWKHHQWLUHWLPHRXWDOVRDSSOLHVDIWHUHDFKDGGLWLRQDO VHFWRUHUDVHFRPPDQG:KHQWKHWLPHRXWSHULRGLVFRPSOHWH'4VZLWFKHVIURPD³´WRD³´ ,IWKHWLPHEHWZHHQDGGLWLRQDOVHFWRUHUDVHFRPPDQGVIURPWKHV\VWHPFDQEHDVVXPHGWREH OHVVWKDQVWKHV\VWHPQHHGQRWPRQLWRU'46HHDOVR6HFWRU(UDVH&RPPDQG6HTXHQFH RQSDJH $IWHUWKHVHFWRUHUDVHFRPPDQGLVZULWWHQWKHV\VWHPVKRXOGUHDGWKHVWDWXVRI'4'DWD3ROO LQJRU'47RJJOH%LW,WRHQVXUHWKDWWKHGHYLFHKDVDFFHSWHGWKHFRPPDQGVHTXHQFHDQG WKHQUHDG'4,I'4LV³´WKH(PEHGGHG(UDVHDOJRULWKPKDVEHJXQDOOIXUWKHUFRPPDQGV H[FHSW(UDVH6XVSHQGDUHLJQRUHGXQWLOWKHHUDVHRSHUDWLRQLVFRPSOHWH,I'4LV³´WKHGHYLFH ZLOODFFHSWDGGLWLRQDOVHFWRUHUDVHFRPPDQGV7RHQVXUHWKHFRPPDQGKDVEHHQDFFHSWHGWKH V\VWHPVRIWZDUHVKRXOGFKHFNWKHVWDWXVRI'4SULRUWRDQGIROORZLQJHDFKVXEVHTXHQWVHFWRU HUDVHFRPPDQG,I'4LVKLJKRQWKHVHFRQGVWDWXVFKHFNWKHODVWFRPPDQGPLJKWQRWKDYH EHHQDFFHSWHG 7DEOHVKRZVWKHVWDWXVRI'4UHODWLYHWRWKHRWKHUVWDWXVELWV Table 20. Write Operation Status 6WDQGDUG 0RGH (UDVH 6XVSHQG 0RGH Status DQ7 (Note 2) DQ6 DQ5 (Note 1) DQ3 DQ2 (Note 2) RDY (Note 5) (PEHGGHG3URJUDP$OJRULWKP '4 7RJJOH 1$ 1RWRJJOH 1RWH 7RJJOH 7RJJOH 1RWRJJOH 1RWH 1$ 7RJJOH +LJK,PSHGDQFH 'DWD 'DWD 'DWD 'DWD 'DWD +LJK,PSHGDQFH '4 7RJJOH 1$ 1$ (PEHGGHG(UDVH$OJRULWKP (UDVH6XVSHQG 5HDG1RWH (UDVH 6XVSHQGHG6HFWRU 1RQ(UDVH6XVSHQGHG 6HFWRU (UDVH6XVSHQG3URJUDP 1RWHV '4VZLWFKHVWRµ¶ZKHQDQ(PEHGGHG3URJUDPRU(PEHGGHG(UDVHRSHUDWLRQKDVH[FHHGHGWKHPD[LPXPWLPLQJOLPLWV 5HIHUWRWKHVHFWLRQRQ'4IRUPRUHLQIRUPDWLRQ '4DQG'4UHTXLUHDYDOLGDGGUHVVZKHQUHDGLQJVWDWXVLQIRUPDWLRQ5HIHUWRWKHDSSURSULDWHVXEVHFWLRQIRUIXUWKHU GHWDLOV :KHQUHDGLQJZULWHRSHUDWLRQVWDWXVELWVWKHV\VWHPPXVWDOZD\VSURYLGHWKHEDQNDGGUHVVZKHUHWKH(PEHGGHG $OJRULWKPLVLQSURJUHVV7KHGHYLFHRXWSXWVDUUD\GDWDLIWKHV\VWHPDGGUHVVHVDQRQEXV\EDQN 7KHV\VWHPPD\UHDGHLWKHUDV\QFKURQRXVO\RUV\QFKURQRXVO\EXUVWZKLOHLQHUDVHVXVSHQG 7KH5'<SLQDFWVDGHGLFDWHGRXWSXWWRLQGLFDWHWKHVWDWXVRIDQHPEHGGHGHUDVHRUSURJUDPRSHUDWLRQLVLQSURJUHVV7KLV LVDYDLODEOHLQWKH$V\QFKURQRXVPRGHRQO\ :KHQWKHGHYLFHLVVHWWR$V\QFKURQRXVPRGHWKHVHVWDWXVIODJVVKRXOGEHUHDGE\&(WRJJOH 68 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Absolute Maximum Ratings 6WRUDJH7HPSHUDWXUH3ODVWLF3DFNDJHV ±&WR& $PELHQW7HPSHUDWXUHZLWK3RZHU$SSOLHG ±&WR& 9ROWDJHZLWK5HVSHFWWR*URXQG $OO,QSXWVDQG,2VH[FHSWDVQRWHGEHORZ1RWH±9WR9&&9 9&&1RWH±9WR9 $5(6(7$&&1RWH ±9WR9 2XWSXW6KRUW&LUFXLW&XUUHQW1RWH P$ 1RWHV 0LQLPXP'&YROWDJHRQLQSXWRU,2VLV±9'XULQJYROWDJHWUDQVLWLRQVLQSXWV RU,2VPD\XQGHUVKRRW966WR±9IRUSHULRGVRIXSWRQV6HH)LJXUH 0D[LPXP'&YROWDJHRQLQSXWRU,2VLV9&&9'XULQJYROWDJHWUDQVLWLRQV RXWSXWVPD\RYHUVKRRWWR9&&9IRUSHULRGVXSWRQV6HH)LJXUH 1RPRUHWKDQRQHRXWSXWPD\EHVKRUWHGWRJURXQGDWDWLPH'XUDWLRQRIWKH VKRUWFLUFXLWVKRXOGQRWEHJUHDWHUWKDQRQHVHFRQG 6WUHVVHVDERYHWKRVHOLVWHGXQGHU³$EVROXWH0D[LPXP5DWLQJV´PD\FDXVH SHUPDQHQWGDPDJHWRWKHGHYLFH7KLVLVDVWUHVVUDWLQJRQO\IXQFWLRQDO RSHUDWLRQRIWKHGHYLFHDWWKHVHRUDQ\RWKHUFRQGLWLRQVDERYHWKRVHLQGLFDWHGLQ WKHRSHUDWLRQDOVHFWLRQVRIWKLVGDWDVKHHWLVQRWLPSOLHG([SRVXUHRIWKHGHYLFH WRDEVROXWHPD[LPXPUDWLQJFRQGLWLRQVIRUH[WHQGHGSHULRGVPD\DIIHFWGHYLFH UHOLDELOLW\ QV QV 9 ±9 ±9 QV Figure 9. Maximum Negative Overshoot Waveform QV 9&& 9 9&& 9 9 QV Figure 10. June 24, 2005 S29WS-J_00_A4 QV Maximum Positive Overshoot Waveform S29WS128J/064J 69 D a t a S h e e t Operating Ranges &RPPHUFLDO&'HYLFHV $PELHQW7HPSHUDWXUH7$ &WR& :LUHOHVV:'HYLFHV $PELHQW7HPSHUDWXUH7$ ±&WR& 6XSSO\9ROWDJHV 9&&6XSSO\9ROWDJHV 9WR90+] 9WR90+] 1RWH2SHUDWLQJUDQJHVGHILQHWKRVHOLPLWVEHWZHHQZKLFKWKHIXQFWLRQDOLW\RIWKHGH YLFHLVJXDUDQWHHG 70 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t DC Characteristics CMOS Compatible Parameter Description Test Conditions Notes: 1 ,/, ,QSXW/RDG&XUUHQW ,/2 2XWSXW/HDNDJH&XUUHQW ,&&% 9&&$FWLYHEXUVW5HDG&XUUHQW Min Typ Max Unit 9,1 966WR9&&9&& 9&&PD[ $ 9287 966WR9&&9&& 9&&PD[ $ &( 9,/2( 9,+ :( 9,+EXUVW OHQJWK 0+] P$ 0+] P$ &( 9,/2( 9,+ :( 9,+EXUVW OHQJWK 0+] P$ 0+] P$ &( 9,/2( 9,+ :( 9,+EXUVW OHQJWK &RQWLQXRXV 0+] P$ 0+] P$ $ 0+] P$ 0+] P$ 0+] P$ ,,2 9&&1RQDFWLYH2XWSXW 2( 9,+ ,&& 9&&$FWLYH$V\QFKURQRXV5HDG &XUUHQW1RWH &( 9,/2( 9,+ :( 9,+ ,&& 9&&$FWLYH:ULWH&XUUHQW1RWH &( 9,/2( 9,+$&& 9,+ P$ ,&& 9&&6WDQGE\&XUUHQW1RWH &( 5(6(7 9&&9 $ ,&& 9&&5HVHW&XUUHQW 5(6(7 9,/&/. 9,/ $ ,&& 9&&$FWLYH&XUUHQW 5HDG:KLOH:ULWH &( 9,/2( 9,+ 0+] P$ 0+] P$ ,&& 9&&6OHHS&XUUHQW &( 9,/2( 9,+ $ ,$&& $FFHOHUDWHG3URJUDP&XUUHQW 1RWH &( 9,/2( 9,+ 9$&& 9 9$&& P$ 9&& P$ 9,/ ,QSXW/RZ9ROWDJH ± 9 9,+ ,QSXW+LJK9ROWDJH 9&&± 9&& 92/ 2XWSXW/RZ9ROWDJH ,2/ $9&& 9&&PLQ 9,2 92+ 2XWSXW+LJK9ROWDJH ,2+ ±$9&& 9&&PLQ 9,' 9ROWDJHIRU$XWRVHOHFWDQG 7HPSRUDU\6HFWRU8QSURWHFW 9&& 9 9++ 9/.2 9&&± 9 9 9 9ROWDJHIRU$FFHOHUDWHG3URJUDP 9 /RZ9&&/RFNRXW9ROWDJH 9 1RWHV 0D[LPXP,&&VSHFLILFDWLRQVDUHWHVWHGZLWK9&& 9&&PD[ 7KH,&&FXUUHQWOLVWHGLVW\SLFDOO\OHVVWKDQP$0+]ZLWK2(DW9,+ ,&&DFWLYHZKLOH(PEHGGHG(UDVHRU(PEHGGHG3URJUDPLVLQSURJUHVV 'HYLFHHQWHUVDXWRPDWLFVOHHSPRGHZKHQDGGUHVVHVDUHVWDEOHIRUW$&&QV7\SLFDOVOHHSPRGHFXUUHQWLVHTXDO WR,&& 7RWDOFXUUHQWGXULQJDFFHOHUDWHGSURJUDPPLQJLVWKHVXPRI9$&&DQG9&&FXUUHQWV 0+]DSSOLHVRQO\WRWKH:6- June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 71 D a t a S h e e t Test Conditions 'HYLFH 8QGHU 7HVW &/ Figure 11. Table 21. Test Setup Test Specifications Test Condition All Speed Options Unit S) ,QSXW5LVHDQG)DOO7LPHV QV ,QSXW3XOVH/HYHOV ±9&& 9 ,QSXWWLPLQJPHDVXUHPHQWUHIHUHQFHOHYHOV 9&& 9 2XWSXWWLPLQJPHDVXUHPHQWUHIHUHQFHOHYHOV 9&& 9 2XWSXW/RDG&DSDFLWDQFH&/ LQFOXGLQJMLJFDSDFLWDQFH Key to Switching Waveforms Waveform Inputs Outputs 6WHDG\ &KDQJLQJIURP+WR/ &KDQJLQJIURP/WR+ 'RQ¶W&DUH$Q\&KDQJH3HUPLWWHG &KDQJLQJ6WDWH8QNQRZQ 'RHV1RW$SSO\ &HQWHU/LQHLV+LJK,PSHGDQFH6WDWH+LJK= Switching Waveforms All Inputs and Outputs VCC Input VCC/2 Measurement Level VCC/2 Output 0.0 V Figure 12. 72 Input Waveforms and Measurement Levels S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t AC Characteristics VCC Power-up Parameter Description Test Setup Speed Unit W9&6 9&&6HWXS7LPH 0LQ V W567+ 5(6(7/RZ+ROG7LPH 0LQ V 1RWHV 9&&UDPSUDWHLV!9V 9&&UDPSUDWH9VD+DUGZDUH5HVHWZLOOEHUHTXLUHG tVCS VCC RESET# Figure 13. VCC Power-up Diagram CLK Characterization Parameter I&/. 66 MHz 80 MHz (WaitState=6,7) 80 MHz (WaitState less than 5) Unit 0D[ 0+] 0LQ 0+] FRQWLQXRXVEXUVW &/.GXW\ 0LQ .+] ZRUG EXUVW &/.GXW\ 0LQ QV FRQWLQXRXVEXUVW 0LQ QV ZRUG EXUVW 0LQ QV 0D[ QV Description &/.)UHTXHQF\ W&/.+ &/.KLJKWLPH W&/./ &/./RZ7LPH W&5 &/.5LVH7LPH W&) &/.)DOO7LPH Condition 1RWH0+]DSSOLHVRQO\WRWKH:6- tCLK tCH CLK tCL tCF tCR 1RWH)RU:6-PRGHOQXPEHUVDQGDQGDGGLWLRQDOFORFNF\FOHLVUHTXLUHGGXULQJERXQGDU\FURVVLQJZKLOH LQFRQWLQXRXVUHDGPRGH Figure 14. June 24, 2005 S29WS-J_00_A4 CLK Characterization S29WS128J/064J 73 D a t a S h e e t Synchronous/Burst Read Parameter Description JEDEC 66 MHz 80 MHz (WS064J only) Unit Standard W,$&& /DWHQF\6WDQGDUGZDLWVWDWH+DQGVKDNHPRGHIRU:RUGDQGDQG &RQWLQXRXV:RUG%XUVW 0D[ QV W,$&& /DWHQF\6WDQGDUGZDLWVWDWH+DQGVKDNHPRGHIRU:RUG%XUVW 0D[ QV W%$&& %XUVW$FFHVV7LPH9DOLG&ORFNWR2XWSXW'HOD\ 0D[ W$&6 $GGUHVV6HWXS7LPHWR&/.1RWH 0LQ QV W$&+ $GGUHVV+ROG7LPHIURP&/.1RWH 0LQ QV W%'+ 'DWD+ROG7LPHIURP1H[W&ORFN&\FOH 0LQ QV W&5 &KLS(QDEOHWR5'<9DOLG 0D[ QV W2( 2XWSXW(QDEOHWR2XWSXW9DOLG 0D[ QV W&(= &KLS(QDEOHWR+LJK= 0D[ QV W2(= 2XWSXW(QDEOHWR+LJK= 0D[ QV W&(6 &(6HWXS7LPHWR&/. 0LQ QV QV W5'<6 5'<6HWXS7LPHWR&/. 0LQ W5$&& 5HDG\$FFHVV7LPHIURP&/. 0D[ W$$6 $GGUHVV6HWXS7LPHWR$9'1RWH 0LQ QV W$$+ $GGUHVV+ROG7LPHWR$9'1RWH 0LQ QV W&$6 &(6HWXS7LPHWR$9' 0LQ QV W$9& $9'/RZWR&/. 0LQ QV W$9' $9'3XOVH 0LQ QV W$&& $FFHVV7LPH 0D[ QV QV QV W&.$ &/.WRDFFHVVUHVXPH 0D[ W&.= &/.WR+LJK= 0D[ QV W2(6 2XWSXW(QDEOH6HWXS7LPH 0LQ QV QV 1RWHV $GGUHVVHVDUHODWFKHGRQWKHILUVWRIHLWKHUWKHDFWLYHHGJHRI&/.RUWKHULVLQJHGJHRI$9' 74 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a tCES CE# S h e e t tCEZ 7 cycles for initial access shown. 1 2 3 4 5 6 7 CLK tAVC AVD# tAVD tACS tBDH Addresses Aa tBACC tACH Hi-Z Data tIACC Da Da + 1 tACC Da + n tOEZ OE# tCR RDY tRACC tOE Hi-Z Hi-Z tRDYS 1RWHV )LJXUHVKRZVWRWDOQXPEHURIZDLWVWDWHVVHWWRVHYHQF\FOHV7KHWRWDOQXPEHURIZDLWVWDWHVFDQEHSURJUDPPHGIURP WZRF\FOHVWRVHYHQF\FOHV ,IDQ\EXUVWDGGUHVVRFFXUVDWDZRUGERXQGDU\WZRDGGLWLRQDOFORFNF\FOHZKHQZDLWVWDWHLVVHWWROHVVWKDQRU WKUHHDGGLWLRQDOFORFNF\FOHZKHQZDLWVWDWHLVVHWWRDUHLQVHUWHGDQGLVLQGLFDWHGE\5'< 7KHGHYLFHLVLQV\QFKURQRXVPRGH Figure 15. June 24, 2005 S29WS-J_00_A4 CLK Synchronous Burst Mode Read (rising active CLK) S29WS128J/064J 75 D a t a tCES CE# S h e e t tCEZ 4 cycles for initial access shown. 1 2 3 4 5 CLK tAVC AVD# tAVD tACS tBDH Addresses Aa tBACC tACH Hi-Z Data tIACC tACC Da Da + 1 Da + n tOEZ OE# Hi-Z tRACC tOE tCR Hi-Z RDY tRDYS 1RWHV )LJXUHVKRZVWRWDOQXPEHURIZDLWVWDWHVVHWWRIRXUF\FOHV7KHWRWDOQXPEHURIZDLWVWDWHVFDQEHSURJUDPPHGIURPWZR F\FOHVWRVHYHQF\FOHV&ORFNLVVHWIRUDFWLYHIDOOLQJHGJH ,IDQ\EXUVWDGGUHVVRFFXUVDWDZRUGERXQGDU\WZRDGGLWLRQDOFORFNF\FOHZKHQZDLWVWDWHLVVHWWROHVVWKDQRU WKUHHDGGLWLRQDOFORFNF\FOHZKHQZDLWVWDWHLVVHWWRDUHLQVHUWHGFORFNF\FOHDUHLQVHUWHGDQGLVLQGLFDWHGE\5'< 7KHGHYLFHLVLQV\QFKURQRXVPRGH Figure 16. CLK Synchronous Burst Mode Read (Falling Active Clock) tCEZ 7 cycles for initial access shown. tCAS CE# 1 2 3 4 5 6 7 CLK tAVC AVD# tAVD tAAS Addresses Aa tBACC tAAH Hi-Z Data tIACC Da tACC Da + 1 tBDH Da + n tOEZ OE# tCR RDY Hi-Z tRACC tOE Hi-Z tRDYS 1RWHV )LJXUHVKRZVWRWDOQXPEHURIZDLWVWDWHVVHWWRVHYHQF\FOHV7KHWRWDOQXPEHURIZDLWVWDWHVFDQEHSURJUDPPHGIURP WZRF\FOHVWRVHYHQF\FOHV&ORFNLVVHWIRUDFWLYHULVLQJHGJH ,IDQ\EXUVWDGGUHVVRFFXUVDWDZRUGERXQGDU\WZRDGGLWLRQDOFORFNF\FOHDUHLQVHUWHGDQGLVLQGLFDWHGE\5'< 7KHGHYLFHLVLQV\QFKURQRXVPRGH Figure 17. 76 Synchronous Burst Mode Read S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a tCES S h e e t 7 cycles for initial access shown. CE# 1 2 3 4 5 6 7 CLK tAVC AVD# tAVD tACS Addresses AC tBACC tACH Data tIACC DC DD DE DF D8 DB tBDH OE# tCR RDY tRACC tOE tRACC Hi-Z tRDYS 1RWHV )LJXUHVKRZVWRWDOQXPEHURIZDLWVWDWHVVHWWRVHYHQF\FOHV7KHWRWDOQXPEHURIZDLWVWDWHVFDQEHSURJUDPPHGIURP WZRF\FOHVWRVHYHQF\FOHV&ORFNLVVHWIRUDFWLYHULVLQJHGJH ,IDQ\EXUVWDGGUHVVRFFXUVDWDZRUGERXQGDU\WZRDGGLWLRQDOFORFNF\FOHDUHLQVHUWHGDQGLVLQGLFDWHGE\5'< 7KHGHYLFHLVLQV\QFKURQRXVPRGHZLWKZUDSDURXQG ''LQGDWDZDYHIRUPLQGLFDWHVWKHRUGHUWKHGDWDZLWKLQDJLYHQZRUGDGGUHVVUDQJHIURPORZHVWWRKLJKHVW 6WDUWLQJDGGUHVVLQILJXUHLVWKHWKDGGUHVVLQUDQJH$& Figure 18. tCES 8-word Linear Burst with Wrap Around tCEZ 6 wait cycles for initial access shown. CE# 1 2 3 4 5 6 CLK tAVC AVD# tAVD tACS Addresses Aa tBACC tACH Hi-Z Data tIACC Da tCR RDY Da+2 Da+3 tBDH tRACC OE# Da+1 Da + n tOEZ tOE Hi-Z Hi-Z tRDYS 1RWHV )LJXUHDVVXPHVZDLWVWDWHVIRULQLWLDODFFHVVDQGV\QFKURQRXVUHDG 7KH6HW&RQILJXUDWLRQ5HJLVWHUFRPPDQGVHTXHQFHKDVEHHQZULWWHQZLWK$ GHYLFHZLOORXWSXW5'<RQHF\FOHEHIRUH YDOLGGDWD Figure 19. June 24, 2005 S29WS-J_00_A4 Linear Burst with RDY Set One Cycle Before Data S29WS128J/064J 77 D a t a S h e e t Asynchronous Mode Read Parameter Description JEDEC 66 MHz 80 MHz (WS064J only) Unit Standard $FFHVV7LPHIURP&(/RZ 0D[ QV W$&& $V\QFKURQRXV$FFHVV7LPH 0D[ QV W$9'3 $9'/RZ7LPH 0LQ QV W$$9'6 $GGUHVV6HWXS7LPHWR5LVLQJ(GJHRI$9' 0LQ QV W$$9'+ $GGUHVV+ROG7LPHIURP5LVLQJ(GJHRI$9' 0LQ QV 2XWSXW(QDEOHWR2XWSXW9DOLG 0D[ W&( W2( 5HDG QV 0LQ QV 0LQ QV 0D[ QV QV W2(+ 2XWSXW(QDEOH+ROG7LPH W2(= 2XWSXW(QDEOHWR+LJK= W&$6 &(6HWXS7LPHWR$9' 0LQ 7RJJOHDQG'DWD3ROOLQJ CE# tOE OE# tOEH WE# tCE tOEZ Data Valid RD tACC RA Addresses tAAVDH tCAS AVD# tAVDP tAAVDS 1RWH5$ 5HDG$GGUHVV5' 5HDG'DWD Figure 20. 78 Asynchronous Mode Read with Latched Addresses S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t CE# tOE OE# tOEH WE# tCE Data tOEZ Valid RD tACC RA Addresses AVD# 1RWH5$ 5HDG$GGUHVV5' 5HDG'DWD Figure 21. Asynchronous Mode Read Hardware Reset (RESET#) Parameter Description JEDEC All Speed Options Unit Std W5HDG\ 5(6(73LQ/RZ'XULQJ(PEHGGHG$OJRULWKPV WR5HDG0RGH6HH1RWH 0D[ V W5HDG\ 5(6(73LQ/RZ127'XULQJ(PEHGGHG$OJRULWKPV WR5HDG0RGH6HH1RWH 0D[ QV W53 5(6(73XOVH:LGWK 0LQ QV W5+ 5HVHW+LJK7LPH%HIRUH5HDG6HH1RWH 0LQ QV W53' 5(6(7/RZWR6WDQGE\0RGH 0LQ V 1RWH1RWWHVWHG June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 79 D a t a S h e e t CE#, OE# tRH RESET# tRP tReady Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms CE#, OE# tReady RESET# tRP Figure 22. 80 Reset Timings S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Erase/Program Operations Parameter Description JEDEC Standard W$9$9 W:& :ULWH&\FOH7LPH1RWH W$9:/ W$6 $GGUHVV6HWXS7LPH1RWHV W:/$; W$+ $GGUHVV+ROG7LPH1RWHV 0LQ 6\QFKURQRXV $V\QFKURQRXV 6\QFKURQRXV $V\QFKURQRXV 80 MHz (WS064J only) 66 MHz 0LQ 0LQ Unit QV QV QV W$9'3 $9'/RZ7LPH 0LQ QV W'9:+ W'6 'DWD6HWXS7LPH 0LQ QV W:+'; W'+ 'DWD+ROG7LPH 0LQ QV W*+:/ W*+:/ 5HDG5HFRYHU\7LPH%HIRUH:ULWH 0LQ QV W&$6 &(6HWXS7LPHWR$9' 0LQ QV W&+ &(+ROG7LPH 0LQ QV W:/:+ W:3 :ULWH3XOVH:LGWK 0LQ QV W:+:/ W:3+ :ULWH3XOVH:LGWK+LJK 0LQ QV W65: /DWHQF\%HWZHHQ5HDGDQG:ULWH2SHUDWLRQV 0LQ QV W:+(+ W:+:+ W:+:+ 3URJUDPPLQJ2SHUDWLRQ1RWH 7\S V W:+:+ W:+:+ $FFHOHUDWHG3URJUDPPLQJ2SHUDWLRQ1RWH 7\S V W:+:+ W:+:+ W(/:/ 6HFWRU(UDVH2SHUDWLRQ1RWHV 7\S &KLS(UDVH2SHUDWLRQ1RWHV VHF W9,' 9$&&5LVHDQG)DOO7LPH 0LQ QV W9,'6 9$&&6HWXS7LPH'XULQJ$FFHOHUDWHG3URJUDPPLQJ 0LQ V W9&6 9&&6HWXS7LPH 0LQ V W&6 &(6HWXS7LPHWR:( 0LQ QV W$96: $9'6HWXS7LPHWR:( 0LQ QV W$9+: $9'+ROG7LPHWR:( 0LQ QV W$9+& $9'+ROG7LPHWR&/. 0LQ QV W&6: &ORFN6HWXS7LPHWR:( 0LQ QV 1RWHV 1RWWHVWHG $V\QFKURQRXVPRGHDOORZVERWK$V\QFKURQRXVDQG6\QFKURQRXVSURJUDPRSHUDWLRQ6\QFKURQRXVPRGHDOORZVERWK $V\QFKURQRXVDQG6\QFKURQRXVSURJUDPRSHUDWLRQ ,QDV\QFKURQRXVSURJUDPRSHUDWLRQWLPLQJDGGUHVVHVDUHODWFKHGRQWKHIDOOLQJHGJHRI:(RUULVLQJHGJHRI$9',Q V\QFKURQRXVSURJUDPRSHUDWLRQWLPLQJDGGUHVVHVDUHODWFKHGRQWKHILUVWRIHLWKHUWKHULVLQJHGJHRI$9'RUWKHDFWLYH HGJHRI&/. 6HHWKH(UDVHDQG3URJUDPPLQJ3HUIRUPDQFHVHFWLRQIRUPRUHLQIRUPDWLRQ 'RHVQRWLQFOXGHWKHSUHSURJUDPPLQJWLPH June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 81 D a t a S h e e t Program Command Sequence (last two cycles) VIH Read Status Data CLK VIL tAVDP AVD# tAH tAS Addresses Data VA PA 555h A0h VA In Progress PD Complete tDS tDH CE# tCH OE# tWP WE# tCS tWHWH1 tWPH tWC tVCS VCC 1RWHV 3$ 3URJUDP$GGUHVV3' 3URJUDP'DWD9$ 9DOLG$GGUHVVIRUUHDGLQJVWDWXVELWV ³,QSURJUHVV´DQG³FRPSOHWH´UHIHUWRVWDWXVRISURJUDPRSHUDWLRQ $±$DUHGRQ¶WFDUHGXULQJFRPPDQGVHTXHQFHXQORFNF\FOHV &/.FDQEHHLWKHU9,/RU9,+ 7KH$V\QFKURQRXVSURJUDPPLQJRSHUDWLRQLVLQGHSHQGHQWRIWKH6HW'HYLFH5HDG0RGHELWLQWKH&RQILJXUDWLRQ5HJLVWHU Figure 23. 82 Asynchronous Program Operation Timings: AVD# Latched Addresses S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Program Command Sequence (last two cycles) Read Status Data CLK tACS tCSW AVD# tAVDP Addresses Data A0h Complete tDS tDH tAVSW OE# VA In Progress PD tCAS CE# VA PA 555h tCH tAH tWP WE# tWHWH1 tWPH tWC tVCS VCC 1RWHV 3$ 3URJUDP$GGUHVV3' 3URJUDP'DWD9$ 9DOLG$GGUHVVIRUUHDGLQJVWDWXVELWV ³,QSURJUHVV´DQG³FRPSOHWH´UHIHUWRVWDWXVRISURJUDPRSHUDWLRQ $±$DUHGRQ¶WFDUHGXULQJFRPPDQGVHTXHQFHXQORFNF\FOHV &/.FDQEHHLWKHU9,/RU9,+ 7KH$V\QFKURQRXVSURJUDPPLQJRSHUDWLRQLVLQGHSHQGHQWRIWKH6HW'HYLFH5HDG0RGHELWLQWKH&RQILJXUDWLRQ5HJLVWHU Figure 24. June 24, 2005 S29WS-J_00_A4 Asynchronous Program Operation Timings: WE# Latched Addresses S29WS128J/064J 83 D a t a S h e e t Program Command Sequence (last two cycles) Read Status Data tAVCH CLK tACS tCSW AVD# tAVDP Addresses Data A0h Complete tDS tDH tAVSW OE# VA In Progress PD tCAS CE# VA PA 555h tCH tAH tWP WE# tWHWH1 tWPH tWC tVCS VCC 1RWHV 3$ 3URJUDP$GGUHVV3' 3URJUDP'DWD9$ 9DOLG$GGUHVVIRUUHDGLQJVWDWXVELWV ³,QSURJUHVV´DQG³FRPSOHWH´UHIHUWRVWDWXVRISURJUDPRSHUDWLRQ $±$DUHGRQ¶WFDUHGXULQJFRPPDQGVHTXHQFHXQORFNF\FOHV $GGUHVVHVDUHODWFKHGRQWKHILUVWRIHLWKHUWKHULVLQJHGJHRI$9'RUWKHDFWLYHHGJHRI&/. (LWKHU&(RU$9'LVUHTXLUHGWRJRIURPORZWRKLJKLQEHWZHHQSURJUDPPLQJFRPPDQGVHTXHQFHV 7KH6\QFKURQRXVSURJUDPPLQJRSHUDWLRQLVGHSHQGHQWRIWKH6HW'HYLFH5HDG0RGHELWLQWKH&RQILJXUDWLRQ5HJLVWHU7KH &RQILJXUDWLRQ5HJLVWHUPXVWEHVHWWRWKH6\QFKURQRXV5HDG0RGH Figure 25. 84 Synchronous Program Operation Timings: WE# Latched Addresses S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Program Command Sequence (last two cycles) Read Status Data tAVCH CLK tAS tAH AVD# tAVDP Addresses VA PA 555h Data A0h VA In Progress PD Complete tDS tDH tCAS CE# OE# tCH tCSW tWP WE# tWHWH1 tWPH tWC tVCS VCC 1RWHV 3$ 3URJUDP$GGUHVV3' 3URJUDP'DWD9$ 9DOLG$GGUHVVIRUUHDGLQJVWDWXVELWV ³,QSURJUHVV´DQG³FRPSOHWH´UHIHUWRVWDWXVRISURJUDPRSHUDWLRQ $±$DUHGRQ¶WFDUHGXULQJFRPPDQGVHTXHQFHXQORFNF\FOHV $GGUHVVHVDUHODWFKHGRQWKHILUVWRIHLWKHUWKHULVLQJHGJHRI$9'RUWKHDFWLYHHGJHRI&/. (LWKHU&(RU$9'LVUHTXLUHGWRJRIURPORZWRKLJKLQEHWZHHQSURJUDPPLQJFRPPDQGVHTXHQFHV 7KH6\QFKURQRXVSURJUDPPLQJRSHUDWLRQLVGHSHQGHQWRIWKH6HW'HYLFH5HDG0RGHELWLQWKH&RQILJXUDWLRQ5HJLVWHU7KH &RQILJXUDWLRQ5HJLVWHUPXVWEHVHWWRWKH6\QFKURQRXV5HDG0RGH Figure 26. June 24, 2005 S29WS-J_00_A4 Synchronous Program Operation Timings: CLK Latched Addresses S29WS128J/064J 85 D a t a S h e e t Erase Command Sequence (last two cycles) VIH Read Status Data CLK VIL tAVDP AVD# tAH tAS Addresses 555h for chip erase Data VA SA 2AAh 55h VA 10h for chip erase In Progress 30h Complete tDS tDH CE# tCH OE# tWP WE# tCS tVCS tWHWH2 tWPH tWC VCC 1RWHV 6$LVWKHVHFWRUDGGUHVVIRU6HFWRU(UDVH $GGUHVVELWV$±$DUHGRQ¶WFDUHVGXULQJXQORFNF\FOHVLQWKHFRPPDQGVHTXHQFH Figure 27. 86 Chip/Sector Erase Command Sequence S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t CE# AVD# WE# Addresses PA Data Don't Care OE# ACC A0h Don't Care PD Don't Care tVIDS 1 μs VID tVID VIL or VIH 1RWH8VHVHWXSDQGKROGWLPHVIURPFRQYHQWLRQDOSURJUDPRSHUDWLRQ Figure 28. Accelerated Unlock Bypass Programming Timing AVD# tCEZ tCE CE# tCH tOEZ tOE OE# tOEH WE# tACC Addresses VA VA Status Data Data Status Data 1RWHV 6WDWXVUHDGVLQILJXUHDUHVKRZQDVDV\QFKURQRXV 9$ 9DOLG$GGUHVV7ZRUHDGF\FOHVDUHUHTXLUHGWRGHWHUPLQHVWDWXV:KHQWKH(PEHGGHG$OJRULWKPRSHUDWLRQLV FRPSOHWHDQG'DWD3ROOLQJZLOORXWSXWWUXHGDWD :KLOHLQ$V\QFKURQRXVPRGH5'<ZLOOEHORZZKLOHWKHGHYLFHLVLQHPEHGGHGHUDVHRUSURJUDPPLQJPRGH Figure 29. June 24, 2005 S29WS-J_00_A4 Data# Polling Timings (During Embedded Algorithm) S29WS128J/064J 87 D a t a S h e e t AVD# tCEZ tCE CE# tCH tOEZ tOE OE# tOEH WE# tACC Addresses VA VA Data Status Data Status Data 1RWHV 6WDWXVUHDGVLQILJXUHDUHVKRZQDVDV\QFKURQRXV 9$ 9DOLG$GGUHVV7ZRUHDGF\FOHVDUHUHTXLUHGWRGHWHUPLQHVWDWXV:KHQWKH(PEHGGHG$OJRULWKPRSHUDWLRQLV FRPSOHWHWKHWRJJOHELWVZLOOVWRSWRJJOLQJ :KLOHLQ$V\QFKURQRXVPRGH5'<ZLOOEHORZZKLOHWKHGHYLFHLVLQHPEHGGHGHUDVHRUSURJUDPPLQJPRGH Figure 30. Toggle Bit Timings (During Embedded Algorithm) CE# CLK AVD# Addresses VA VA OE# tIACC Data tIACC Status Data Status Data RDY 1RWHV 7KHWLPLQJVDUHVLPLODUWRV\QFKURQRXVUHDGWLPLQJV 9$ 9DOLG$GGUHVV7ZRUHDGF\FOHVDUHUHTXLUHGWRGHWHUPLQHVWDWXV:KHQWKH(PEHGGHG$OJRULWKPRSHUDWLRQLV FRPSOHWHWKHWRJJOHELWVZLOOVWRSWRJJOLQJ 5'<LVDFWLYHZLWKGDWD$ LQWKH&RQILJXUDWLRQ5HJLVWHU:KHQ$ LQWKH&RQILJXUDWLRQ5HJLVWHU5'<LVDFWLYH RQHFORFNF\FOHEHIRUHGDWD Figure 31. 88 Synchronous Data Polling Timings/Toggle Bit Timings S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a (QWHU (PEHGGHG (UDVLQJ (UDVH 6XVSHQG (UDVH :( S h e e t (QWHU(UDVH 6XVSHQG3URJUDP (UDVH6XVSHQG 5HDG (UDVH 5HVXPH (UDVH (UDVH6XVSHQG 6XVSHQG 5HDG 3URJUDP (UDVH (UDVH &RPSOHWH '4 '4 1RWH'4WRJJOHVRQO\ZKHQUHDGDWDQDGGUHVVZLWKLQDQHUDVHVXVSHQGHGVHFWRU7KHV\VWHPPD\XVH2(RU&( WRWRJJOH'4DQG'4 Figure 32. DQ2 vs. DQ6 Temporary Sector Unprotect Parameter JEDEC Description Std All Speed Options Unit W9,'5 9,'5LVHDQG)DOO7LPH6HH1RWH 0LQ QV W9++ 9++5LVHDQG)DOO7LPH6HH1RWH 0LQ QV W563 5(6(76HWXS7LPHIRU7HPSRUDU\6HFWRU 8QSURWHFW 0LQ V W55% 5(6(7+ROG7LPHIURP5'<+LJKIRU 7HPSRUDU\6HFWRU8QSURWHFW 0LQ V 1RWH1RWWHVWHG VID VID RESET# VIL or VIH VIL or VIH tVIDR tVIDR Program or Erase Command Sequence CE# WE# tRRB tRSP RDY Figure 33. June 24, 2005 S29WS-J_00_A4 Temporary Sector Unprotect Timing Diagram S29WS128J/064J 89 D a t a S h e e t VID VIH RESET# SA, A6, A1, A0 Valid* Valid* Sector Protect/Unprotect Data 60h Valid* Verify 60h 40h Status Sector Protect: 150 µs Sector Unprotect: 1.5 ms 1 µs CE# WE# OE# 1RWH)RUVHFWRUSURWHFW$ $ $ )RUVHFWRUXQSURWHFW$ $ $ Figure 34. Sector/Sector Block Protect and Unprotect Timing Diagram Address boundary occurs every 64 words, beginning at address 00003Fh: 00007Fh, 0000BFh, etc.) Address 000000h is also a boundary crossing. C60 C61 C62 3C 3D 3E C63 C63 C63 C63 C64 C65 C66 3F 3F 3F 3F 40 41 42 CLK Address (hex) AVD# (stays high) tRACC tRACC RDY(1) latency tRACC tRACC RDY(2) Data OE#, CE#f latency D60 D61 D62 D63 D63 D64 D65 D66 (stays low) 1RWHV 5'<DFWLYHZLWKGDWD$ LQWKH&RQILJXUDWLRQ5HJLVWHU 5'<DFWLYHRQHFORFNF\FOHEHIRUHGDWD$ LQWKH&RQILJXUDWLRQ5HJLVWHU &[[LQGLFDWHVWKHFORFNWKDWWULJJHUV'[[RQWKHRXWSXWVIRUH[DPSOH&WULJJHUV')LJXUHVKRZVWKHGHYLFHQRW FURVVLQJDEDQNLQWKHSURFHVVRISHUIRUPLQJDQHUDVHRUSURJUDP ,IWKHVWDUWLQJDGGUHVVODWFKHGLQLVHLWKHU(KRU)KRUVRPHPXOWLSOHRIHLWKHUWKHUHLVQRDGGLWLRQDOF\FOHODWHQF\ DWWKHERXQGDU\FURVVLQJ Figure 35. 90 Latency with Boundary Crossing S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Address boundary occurs every 64 words, beginning at address 00003Fh: (00007Fh, 0000BFh, etc.) Address 000000h is also a boundary crossing. C60 C61 C62 3C 3D 3E C63 C63 C63 C63 C64 C65 C66 3F 3F 3F 3F 40 41 42 CLK Address (hex) AVD# (stays high) tRACC RDY(1) tRACC latency tRACC tRACC RDY(2) latency Data OE#, CE# D60 D61 D62 D63 D63 Invalid Read Status (stays low) 1RWHV 5'<DFWLYHZLWKGDWD$ LQWKH&RQILJXUDWLRQ5HJLVWHU 5'<DFWLYHRQHFORFNF\FOHEHIRUHGDWD$ LQWKH&RQILJXUDWLRQ5HJLVWHU &[[LQGLFDWHVWKHFORFNWKDWWULJJHUV'[[RQWKHRXWSXWVIRUH[DPSOH&WULJJHUV')LJXUHVKRZVWKHGHYLFHFURVVLQJ DEDQNLQWKHSURFHVVRISHUIRUPLQJDQHUDVHRUSURJUDP Figure 36. June 24, 2005 S29WS-J_00_A4 Latency with Boundary Crossing into Program/Erase Bank S29WS128J/064J 91 D a t a S h e e t Data D0 D1 Rising edge of next clock cycle following last wait state triggers next burst data AVD# total number of clock cycles following AVD# falling edge OE# 1 2 3 4 0 1 5 6 7 3 4 5 CLK 2 number of clock cycles programmed :DLW6WDWH'HFRGLQJ$GGUHVVHV $$$ ³´⇒5HVHUYHG $$$ ³´⇒5HVHUYHG $$$ $$$ $$$ $$$ $$$ $$$ ³´⇒SURJUDPPHGWRWDO ³´⇒SURJUDPPHGWRWDO ³´⇒ SURJUDPPHGWRWDO ³´⇒SURJUDPPHGWRWDO ³´⇒SURJUDPPHGWRWDO ³´⇒SURJUDPPHGWRWDO 1RWH)LJXUHDVVXPHVDGGUHVV'LVQRWDWDQDGGUHVVERXQGDU\DFWLYHFORFNHGJHLVULVLQJDQGZDLWVWDWHLVVHWWR³´ Figure 37. 92 Example of Wait States Insertion S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Last Cycle in Program or Sector Erase Command Sequence Read status (at least two cycles) in same bank and/or array data from other bank tWC tRC Begin another write or program command sequence tRC tWC CE# OE# tOE tOEH tGHWL WE# tWPH tWP tDS tOEZ tACC tOEH tDH Data RD RD PD/30h AAh tSR/W Addresses PA/SA RA RA 555h tAS AVD# tAH 1RWH%UHDNSRLQWVLQZDYHIRUPVLQGLFDWHWKDWV\VWHPPD\DOWHUQDWHO\UHDGDUUD\GDWDIURPWKH³QRQEXV\EDQN´ZKLOH FKHFNLQJWKHVWDWXVRIWKHSURJUDPRUHUDVHRSHUDWLRQLQWKH³EXV\´EDQN7KHV\VWHPVKRXOGUHDGVWDWXVWZLFHWRHQVXUH YDOLGLQIRUPDWLRQ Figure 38. Back-to-Back Read/Write Cycle Timings June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 93 D a t a S h e e t Erase and Programming Performance Parameter 6HFWRU(UDVH7LPH &KLS(UDVH7LPH Typ (Note 1) Max (Note 2) .ZRUG .ZRUG - - Unit V ([FOXGHVKSURJUDPPLQJ SULRUWRHUDVXUH1RWH V :RUG3URJUDPPLQJ7LPH V $FFHOHUDWHG:RUG3URJUDPPLQJ7LPH V &KLS3URJUDPPLQJ7LPH 1RWH $FFHOHUDWHG&KLS 3URJUDPPLQJ7LPH V - - Comments ([FOXGHVV\VWHPOHYHO RYHUKHDG1RWH ([FOXGHVV\VWHPOHYHO RYHUKHDG1RWH V 1RWHV 7\SLFDOSURJUDPDQGHUDVHWLPHVDVVXPHWKHIROORZLQJFRQGLWLRQV°&99&&.F\FOHV$GGLWLRQDOO\ SURJUDPPLQJW\SLFDOVDVVXPHVDFKHFNHUERDUGSDWWHUQ 8QGHUZRUVWFDVHFRQGLWLRQVRI&9&& 9F\FOHV 7KHW\SLFDOFKLSSURJUDPPLQJWLPHLVFRQVLGHUDEO\OHVVWKDQWKHPD[LPXPFKLSSURJUDPPLQJWLPHOLVWHG ,QWKHSUHSURJUDPPLQJVWHSRIWKH(PEHGGHG(UDVHDOJRULWKPDOOZRUGVDUHSURJUDPPHGWRKEHIRUHHUDVXUH 6\VWHPOHYHORYHUKHDGLVWKHWLPHUHTXLUHGWRH[HFXWHWKHWZRRUIRXUEXVF\FOHVHTXHQFHIRUWKHSURJUDPFRPPDQG 6HH7DEOH³&RPPDQG'HILQLWLRQV´RQSDJHIRUIXUWKHULQIRUPDWLRQRQFRPPDQGGHILQLWLRQV 7KHGHYLFHKDVDPLQLPXPHUDVHDQGSURJUDPF\FOHHQGXUDQFHRIF\FOHV 94 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Physical Dimensions VBH084 - 84-ball Fine-Pitch Ball Grid Array (FBGA) 8x11.6 mm MCP Compatible Package (128Mb) 0.05 C (2X) D D1 A e 10 9 e 7 8 SE 7 6 E1 E 5 4 3 2 1 M A1 CORNER L K B INDEX MARK 10 H G F E SD 6 0.05 C (2X) J D C B A A1 CORNER 7 NXφb φ 0.08 M C TOP VIEW φ 0.15 M C A B BOTTOM VIEW 0.10 C A2 A A1 C 0.08 C SEATING PLANE SIDE VIEW NOTES: PACKAGE VBH 084 JEDEC 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. N/A 2. ALL DIMENSIONS ARE IN MILLIMETERS. 11.60 mm x 8.00 mm NOM PACKAGE SYMBOL MIN NOM MAX A --- --- 1.00 A1 0.18 --- --- A2 0.62 --- 0.76 3. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010 (EXCEPT AS NOTED). NOTE 4. OVERALL THICKNESS BALL HEIGHT SYMBOL "ME" IS THE BALL COLUMN MATRIX SIZE IN THE "E" DIRECTION. BODY THICKNESS D 11.60 BSC. BODY SIZE E 8.00 BSC. BODY SIZE D1 8.80 BSC. BALL FOOTPRINT BALL FOOTPRINT N IS THE TOTAL NUMBER OF SOLDER BALLS. E1 7.20 BSC. MD 12 ROW MATRIX SIZE D DIRECTION ME 10 ROW MATRIX SIZE E DIRECTION N 84 TOTAL BALL COUNT φb 0.33 --- 0.43 6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW PARALLEL TO THE D OR E DIMENSION, RESPECTIVELY, SD OR SE = 0.000. BALL DIAMETER e 0.80 BSC. BALL PITCH SD / SE 0.40 BSC. SOLDER BALL PLACEMENT (A2-A9, B10-L10, M2-M9, B1-L1) e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL ROW MATRIX SIZE IN THE "D" DIRECTION. DEPOPULATED SOLDER BALLS WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3339 \ 16-038.25b 1RWH%6&LVDQ$16,VWDQGDUGIRU%DVLF6SDFH&HQWHULQJ June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 95 D a t a S h e e t VBR080 - 80-ball Fine-Pitch Ball Grid Array (FBGA) 7 x 9 mm (64Mb) D1 0.15 C (2X) D A e 8 e 7 7 SE 6 5 E1 E 4 3 2 1 K A1 CORNER INDEX MARK B 0.15 C (2X) 10 J H G F E D C B A A1 CORNER 6 SD NXφb 7 φ 0.08 M C φ 0.15 M C A B TOP VIEW BOTTOM VIEW 0.20 C A2 A A1 C 0.08 C SEATING PLANE SIDE VIEW NOTES: PACKAGE VBR 080 JEDEC 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. N/A 2. ALL DIMENSIONS ARE IN MILLIMETERS. 9.00 mm x 7.00 mm NOM PACKAGE SYMBOL MIN NOM MAX A --- --- 1.00 A1 0.17 - -- --- A2 0.62 --- 0.73 3. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010 (EXCEPT AS NOTED). NOTE 4. OVERALL THICKNESS BALL HEIGHT SYMBOL "ME" IS THE BALL COLUMN MATRIX SIZE IN THE "E" DIRECTION. BODY THICKNESS D 9.00 BSC. BODY SIZE E 7.00 BSC. BODY SIZE N IS THE TOTAL NUMBER OF SOLDER BALLS. D1 7.20 BSC. BALL FOOTPRINT E1 5.60 BSC. BALL FOOTPRINT MD 10 ROW MATRIX SIZE D DIRECTION ME 8 ROW MATRIX SIZE E DIRECTION N 80 TOTAL BALL COUNT φb 0.35 --- 0.45 6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW PARALLEL TO THE D OR E DIMENSION, RESPECTIVELY, SD OR SE = 0.000. BALL DIAMETER e 0.80 BSC. BALL PITCH SD / SE 0.40 BSC. SOLDER BALL PLACEMENT NONE e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL ROW MATRIX SIZE IN THE "D" DIRECTION. DEPOPULATED SOLDER BALLS WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3366 \ 16-038.25d1 1RWH%6&LVDQ$16,VWDQGDUGIRU%DVLF6SDFH&HQWHULQJ 96 S29WS128J/064J S29WS-J_00_A4 June 24, 2005 D a t a S h e e t Revision Summary Revision A0 (July 22, 2004) ,QLWLDOUHOHDVH Revision A1 (October 6, 2004) $GGµ%)¶SDUWVRQ9DOLG&RPELQDWLRQWDEOH Revision A2 (December 10, 2004) 5HPRYHDOOLQWHUPVRI0+]VSHHGELQ &KDQJHVWDWHPHQWRIFRPPDQGGXULQJWLPHRXWSHULRGRIVHFWRUHUDVH &KDQJHH[LWFRPPDQGVWDWHPHQWDERXWSDVVZRUGSURJUDPFRPPDQG &KDQJHH[LWFRPPDQGVWDWHPHQWDERXWSDVVZRUGSURWHFWLRQPRGHORFNLQJELWSURJUDPFRPPDQG &KDQJHH[LWFRPPDQGVWDWHPHQWDERXWSHUVLVWHQWVHFWRUSURWHFWLRQPRGHORFNLQJELWSURJUDP FRPPDQG &KDQJHH[LWFRPPDQGVWDWHPHQWDERXW6HFXUHG6LOLFRQVHFWRUSURWHFWLRQELWSURJUDPFRPPDQG &KDQJHH[LWFRPPDQGVWDWHPHQWDERXW33%SURJUDPFRPPDQG &KDQJHH[LWFRPPDQGVWDWHPHQWDERXW$OO33%HUDVHFRPPDQG &KDQJHH[LWFRPPDQGVWDWHPHQWDERXW33%33%ORFNELWVWDWXVFRPPDQG &KDQJH33%FRPPDQGWDEOH 5HPRYHQRWHLQFRPPDQGWDEOH &KDQJHZDYHIRUPDERXWERXQGDU\FURVVLQJ 5HPRYH'&VSHFRXWSXWGLVDEOHVWDWXVLQV\QFKURQRXVUHDGPRGH &KDQJHWKHZRUGIURP603/WR3/IURP23%3WR2: &KDQJHWKHVWDWHPHQW33%/RFN%LW6HW&RPPDQG 'HOHWH9,2SLQ $GGHGGHVFULSWLRQDW³5'<&RQILJXUDWLRQ´LQSDJH 0RGLILHGW$+LQ$V\QFKURQRXVPRGHWRQVLQSDJH Revision A3 (February 19, 2005) &KDQJH6HFVLWR6HFXUHG6LOLFRQ $GGPLJUDWLRQVWDWHPHQW 0RGLI\6\QF/DWHQF\$V\Q$FFHVVWLPH#0+] 8SGDWH3URGXFW6HOHFWRU*XLGHRQW$&&W&(W,$&�+] 0RGLI\7DEOH:DLW6WDWHVIRU6WDQGDUG:DLWVWDWH+DQGVKDNLQJ &KDQJH6XSSO\9ROWDJHWR9WR9IRU0+]SDUWV 0RGLI\&/.&KDUDFWHUL]DWLRQWDEOH Revision A4 (June 24, 2005) $GGHGLQIRUPDWLRQIRU5HYLVLRQIRUERXQGDU\FURVVLQJZKLOHLQ&RQWLQXRXVUHDGPRGH 5HPRYHGDOOUHIHUHQFHVWR:6-0+]DQG:6-,QGXVWULDOJUDGHV June 24, 2005 S29WS-J_00_A4 S29WS128J/064J 97 D a t a S h e e t Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with abovementioned uses of the products. Any semiconductor device has an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion LLC product under development by Spansion LLC. Spansion LLC reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion LLC assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright ©2004-2005 Spansion LLC. All rights reserved. Spansion, the Spansion logo, and MirrorBit are trademarks of Spansion LLC. Other company and product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 98 S29WS128J/064J S29WS-J_00_A4 June 24, 2005