FAIRCHILD FAN7083M_12

FAN7083_GF085
High Side Gate Driver with Reset
Features
Description
• Qualified to AEC Q100
The FAN7083_GF085 is a high-side gate drive IC with reset
input. It is designed for high voltage and high speed driving of
MOSFET or IGBT, which operates up to 600V. Fairchild's highvoltage process and common-mode noise cancellation technique provide stable operation in the high side driver under
high-dv/dt noise circumstances. An advanced level-shift circuit
allows high-side gate driver operation up to VS=-5V (typical) at
VBS=15V. Logic input is compatible with standard CMOS outputs. The UVLO circuits prevent from malfunction when VCC
and VBS are lower than the specified threshold voltage. It is
available with space saving SOIC-8 Package. Minimum source
and sink current capability of output driver is 200mA and 400mA
respectively, which is suitable for magnetic-and piezo type injectors and general MOSFET/IGBT based high side driver applications.
• Floating channel designed for bootstrap operation up fully
operational to + 600V
• Tolerance to negative transient voltage on VS pin
• dv/dt immune.
• Gate drive supply range from 10V to 20V
• Under-voltage lockout
• CMOS Schmitt-triggered inputs with pull-down
• High side output in phase with input
• RESET input is 3.3V and 5V logic compatible
Typical Applications
SOIC-8
• Diesel and gasoline injectors/valves
• MOSFET-and IGBT high side driver applications

For Fairchild’s definition of “green” Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html
Ordering Information
Device
Package
Operating
Temp.
SOIC-8
-40 C ~ 125 C
FAN7083MX_GF085 SOIC-8
-40 C ~ 125 C
FAN7083M_GF085
X : Tape & Reel type
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
1
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FAN7083_GF085 High Side Gate Driver with Reset
September 2012
VB
VCC
UV
DETECT
HV Level
Shift
IN
R
HO
S
PULSE
GEN
LOGIC
RESET
PULSE
FILTER
R Q
VS
UV
COM
DETECT
Pin Assignments
1
2
3
4
VCC
VB
IN
HO
COM
VS
RESET N.C
8
7
6
5
Pin Definitions
Pin Number
Pin Name
I/O
1
VCC
P
Driver supply voltage
2
IN
I
Logic input for high side gate drive output, in phase with HO
3
COM
P
Ground
4
RESET
I
Reset input
5
NC
-
NC
6
VS
P
High side floating offset for MOSFET Source connection
7
HO
A
High side drive output for MOSFET Gate connection
8
VB
P
Driver output stage supply
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
Pin Function Description
2
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FAN7083_GF085 High Side Gate Driver with Reset
Block Diagrams
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM.
Parameter
High side floating supply offset voltage
Symbol
Min.
Max.
Unit
VS
VB-25
VB+0.3
V
High side floating supply voltage
VB
-0.3
625
V
High side floating output voltage
VHO
Vs-0.3
VB+0.3
V
Supply voltage
VCC
-0.3
25
V
Input voltage for IN
VIN
-0.3
Vcc+0.3
V
VRESET
-0.3
Vcc+0.3
V
0.625
W
200
C/W
Input voltage for RESET
Power Dissipation 1)
Pd
Thermal resistance, junction to ambient 1)
Rthja
Electrostatic discharge voltage
(Human Body Model)
VESD
1K
V
Charge device model
VCDM
500
V
Junction Temperature
Tj
Storage Temperature
TS
-55
150
C
150
C
Note: 1) The thermal resistance and power dissipation rating are measured bellow conditions;
JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural convection(StillAir)
JESD51-3 : Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package
2) Pulse width more than 80nS for preventing malfunction have to be provided to input .(Guaranteed by design)
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.-40°C <= Ta <= 125°C
Parameter
Symbol
Min.
Max.
Unit
VB
Vs + 10
Vs + 20
V
High side floating supply offset voltage(DC)
VS
-4 (@VBS >= 10V)
-5 (@VBS >= 11.5V)
600
V
High side floating supply offset voltage(Transient)
VS
-25 (~200ns)
-20(200ns~240ns)
-7(240ns~400ns)
600
V
High side floating output voltage
VHO
Vs
VB
V
Allowable offset voltage Slew Rate 1)
dv/dt
-
50
V/ns
Supply voltage
VCC
10
20
V
Input voltage for IN
VIN
0
Vcc
V
Input voltage for RESET
VRESET
0
Switching Frequency 2)
Fs
Ambient Temperature
Ta
High side floating supply voltage
-10V Transient 0.2us
-40
Vcc
V
200
KHz
125
C
Note : 1) Guaranteed by design.
2) Duty = 0.5
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
3
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FAN7083_GF085 High Side Gate Driver with Reset
Absolute Maximum Ratings
Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 15V, VBS = 15V, VRESET = 5V, VS = 0V, RL = 50, CL = 2.5nF.
Parameter
Symbol
Conditions
Min.
Typ.
Max. Unit
VCC and VBS supply under voltage
positive going threshold
VCCUV+
VBSUV+
-
-
9.0
9.8
V
VCC and VBS supply under voltage
negative going threshold
VCCUVVBSUV-
-
7.4
8.4
-
V
VCC and VBS supply under voltage hysteresis
VCCUVH
VBSUVH
-
0.2
0.6
-
V
tduvcc
tduvbs
VCC: 10V-->7.3V or 7.3V-->10V
VBS: 10V-->7.3V or 7.3V-->10V
0.5
0.5
20
20
us
us
Vcc and VBS supply Characteristics
Under voltage lockout response time
Offset supply leakage current
ILK
VB=VS=600V
-
-
50
uA
Quiescent VBS supply current
IQBS
VIN=0, VRESET=5V
-
50
100
uA
Quiescent Vcc supply current
IQCC1
VIN=VRESET=0
-
65
140
uA
Quiescent Vcc supply current
IQCC2
VIN=15V, VRESET=0
-
75
160
uA
High logic level input voltage for IN
VIH
-
0.63Vcc
-
V
Low logic level input voltage for IN
VIL
-
-
-
0.4Vcc
V
Input Characteristics
High logic level input current for IN
IIN+
VIN=15V
-
15
50
uA
Low logic level input bias current for IN
IIN-
VIN=0
-
0
1
uA
High logic level input voltage for RESET
VRIH
-
3.0
-
-
V
Low logic level input voltage for RESET
VRIL
-
-
-
1.4
V
High logic level input current for RESET
IRIN+
VRESET=5V
-
5
30
uA
Low logic level input bias current for RESET
IRIN-
VRESET=0
-
0
1
uA
VOH
IO=0
-
-
0.1
V
Low level output voltage, VO
VOL
IO=0
-
-
0.1
V
Peak output source current
IO1+
-
200
-
-
mA
Peak output sink current
IO1-
-
400
-
-
mA
Equivalent output resistance
ROP
54
75

RON
24
38

Output characteristics
High level output voltage, VBIAS- VO
Note: The input parameter are referenced to COM. The VO and IO parameters are referenced to COM.
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
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FAN7083_GF085 High Side Gate Driver with Reset
Statics Electrical Characteristics
Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 15V, VBS = 15V, VRESET = 5V, VS = 0V, RL = 50, CL = 2.5nF.
Parameter
Symbol
Conditions
IN-to-output turn-on propagation delay
tplh
50% input level to 10% output level,
VS = 0V
-
115
250
ns
IN-to-output turn-off propagation delay
tphl
50% input level to 90% output level
VS = 0V
-
90
200
ns
RESET-to-output turn-off propagation delay
tphl_res
50% input level to 90% output level
-
90
200
ns
RESET-to-output turn-on propagation delay
tplh_res
50% input level to 10% output level
-
115
250
ns
tr1
Tj=25C,VBS=15V
-
200
400
ns
-
-
500
ns
-
25
200
ns
-
-
400
ns
Output rising time
tr2
Output falling time
tf1
Tj=25C,VBS=15V
tf2
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
5
Min. Typ. Max. Unit
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FAN7083_GF085 High Side Gate Driver with Reset
Dynamic Electrical Characteristics
FAN7083_GF085 High Side Gate Driver with Reset
Application Information
1. Relationship in input/output and supplies
VCC
VBS
RESET
IN
HO
< VCCUVLO-
X
X
X
OFF
X
< VBSUVLO-
X
X
OFF
X
X
LOW
X
OFF
X
X
X
LOW
OFF
> VCCUVLO+
> VBSUVLO+
HIGH
HIGH
ON
Notes:
X menans independent from signal
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
6
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FAN7083_GF085 High Side Gate Driver with Reset
Typical Application Circuit
Db
Up to 600V
VCC
VCC
VB
1
8
IN
C1
HO
2
7
COM
VS
3
6
RESET
NC
4
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
Rg
Cbs R1
C2
Load
5
7
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FAN7083_GF085 High Side Gate Driver with Reset
Typical Waveforms
1. Input/Output Timing
IN
RESET
HO
Figure 1a. Input/output Timing Diagram
IN
IN
RESET
RESET
VS
HO
HO
tplh
tphl
tplh_res
tphl_res
Figure 1C. Input(RESET)/output Timing Diagram
Figure 1b. Input(IN)/output Timing Diagram
2. Ouput(HO) Switching Timing
90%
90%
10%
10%
tr
tf
Figure 2. Switching Time Waveform Definitions
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
8
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Ig
Ig
IN
RESET
VCC
VB
IN
HO
COM
VS
RESET
NC
50
1u
2.5n
15V
VB-VS
Figure3b. VB Drop Voltage Test Circuit
VBdrop
Brake before make
Figure 3a. VB Drop Voltage Diagram
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
9
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FAN7083_GF085 High Side Gate Driver with Reset
3.VB Drop Voltage Diagram
This performance graphs based on ambient temperature -40C ~125C
500
500
ta=25°C, RL=50, CL=2.5nF
400
400
Turn-On Delay (ns)
Turn-On Delay Time (ns)
VBS=15V, RL=50, CL=2.5nF
300
Max
200
Typ
100
0
-50
-25
0
25
50
75
100
300
200
Max
Typ
100
0
10
125
12
Turn-Off Delay Time (ns)
Turn-Off Delay Time (ns)
400
300
Max
Typ
0
-50
-25
0
25
50
75
100
400
300
Max
200
Typ
100
0
10
125
12
18
20
600
600
VBS=15V, RL=50, CL=2.5nF
500
Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
16
Figure5b. Turn-Off Delay Time vs VBS Supply Voltage
Figure 5a. Turn-Off DelayTime vs Temperature
Max
RL=50ohm, CL=2.5nF
300
Typ
200
0
-50
14
Vbias Supply Voltage (V)
Temperature ('C)
100
20
ta=25°C RL=50, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
400
18
500
500
100
16
Figure 4b. Turn-On Delay Time vs VBS Supply Voltage
Figure 4a. Turn-On Delay Time vs Temperature
200
14
Vbias Supply Voltage (V)
Temperature ('C)
RL=0ohm, CL=1nF
Max
Max
400
300
0
25
50
75
100
Max
100
0
10
125
12
14
16
18
20
Figure 6b. Turn-On Rise Time vs VBS Supply Voltage
Figure 6a. Turn-On Rise Time vs Temperature
FAN7083_GF085 Rev. 1.0.1
RL=0Ohm, CL=1.0nF
Typ
VB Supply Voltage (V)
Temperature ('C)
©2012 Fairchild Semiconductor Corporation
RL=50Ohm, CL=2.5nF
Typ
200
Typ
-25
ta=25°C RL=50, CL=2.5nF
500
10
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FAN7083_GF085 High Side Gate Driver with Reset
Performance Graphs
300
ta=25°C RL=50, CL=2.5nF
250
400
Turn-Off Fall Time (ns)
Turn-Off Fall Time(ns)
VBS=15V, RL=50, CL=2.5nF
300
200
Max.
100
RL = 50Ohm, CL=2,5nF
Typ.
Max.
-25
0
25
50
75
150
Max
RL=50Ohm, CL=2.5nF
100
Typ
Max
50
RL=0Ohm, CL=1.0nF
Typ.
RL = 0Ohm, CL=1,0nF
0
-50
200
100
0
10
125
12
Reset to Turn-Off Delay Time (ns)
Reset to Output Turn-Off Delay Time (ns)
VBS=15V, RL=50, CL=2.5nF
400
300
Max
Typ
0
-50
-25
0
25
50
75
100
ta=25°C RL=50, CL=2.5nF
400
300
200
Max
Typ
100
0
10
125
12
500
500
VBS=15V, RL=50, CL=2.5nF
400
300
Max
Typ
-25
0
25
50
75
100
20
ta=25°C, RL=50, CL=2.5nF
300
Max
200
Typ
100
12
14
16
18
20
VB Supply Voltage (V)
Figure 9a. RESET to output Turn-On Delay Time vs Temperature
FAN7083_GF085 Rev. 1.0.1
18
400
0
10
125
Temperature ('C)
©2012 Fairchild Semiconductor Corporation
16
Figure 8b. RESET to output Turn-Off Delay Time vs VBS Supply
Reset to Turn-On Delay Time (ns)
Reset to Output Turn-On Delay Time (ns)
Figure 8a. RESET to output Turn-Off Delay Time vs Temperature
0
-50
14
VB Supply Voltage (V)
Temperature ('C)
100
20
500
500
200
18
Figure 7b. Turn-Off Falling Time vs VBS Supply Voltage
Figure 7a. Turn-Off Falling Time vs Temperature
100
16
VB Supply Voltage (V)
Temperature(oC)
200
14
Typ
Figure 9b. RESET to output Turn-On Delay Time vs VBS Supply
11
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FAN7083_GF085 High Side Gate Driver with Reset
500
14
Input Voltage (V)
Input Voltage(V)
12
11
10
Min
9
12
10
Max
8
6
4
2
8
-50
-25
0
25
50
75
100
0
10
125
12
Input Voltage (V)
Input Voltage(V)
20
10
8
7
Max
6
5
8
6
Min
4
2
4
-50
-25
0
25
50
75
100
0
10
125
12
Temperature( C)
Shutdown Logic "1" Threshold Voltage (V)
8
7
6
5
4
Min
2
1
0
25
50
75
100
125
Temperature ('C)
FAN7083_GF085 Rev. 1.0.1
18
20
8
7
6
5
4
3
Min
2
1
0
10
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 12a. Logic “1” Reset Threshold vs Temperature
©2012 Fairchild Semiconductor Corporation
16
Figure 11b. Logic “0” IN Threshold vs VCC Supply Voltage
Figure 11a. Logic “0” IN Threshold vs Temperature
-25
14
VCC Supply Voltage(V)
o
Shutdown Logic "1" Input Threshold Voltage (V)
18
12
9
0
-50
16
Figure 10b. Logic “1” IN Threshold vs VCC Supply Voltage
Figure 10a. Logic “1” IN Threshold vs Temperature
3
14
VCC Supply Voltage(V)
o
Temperature( C)
Figure 12b. Logic “1” Reset Threshold vs VCC Supply Voltage
12
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FAN7083_GF085 High Side Gate Driver with Reset
16
13
Shutdown Logic "0" Threshold Voltage (V)
Shutdown Logic "0" Input Threshold Voltage (V)
4
3
2
Max
1
0
-50
-25
0
25
50
75
100
125
5
4
3
2
Max
1
0
10
12
14
16
18
20
Vcc Supply Voltage (V)
Temperature ('C)
Figure 13a. Logic “0” Reset Threshold vs Temperature
Figure 13b. Logic “0” Reset Threshold vs VCC Supply Voltage
High Level Output Voltage vs Temperature
0.5
High Level Output Voltage(V)
High Level Output Voltage(V)
0.5
0.4
0.3
0.2
Max
0.1
0.0
-50
-25
0
25
50
75
100
0.4
0.3
0.2
0.1
Max
0.0
10
125
12
Temperature( C)
Figure 14a. High Level Output vs Temperature
16
18
20
Figure 14b. High Level Output vs VBS Supply Voltage
0.5
High Level Output Voltage(V)
0.5
High Level Output Voltage(V)
14
VBS Supply Voltage(V)
o
0.4
0.3
0.2
Max
0.1
0.0
-50
-25
0
25
50
75
100
0.2
0.1
Max
12
14
16
18
20
VBS Supply Voltage(V)
o
Figure 15a. Low Level Output vs Temperature
FAN7083_GF085 Rev. 1.0.1
0.3
0.0
10
125
Temperature( C)
©2012 Fairchild Semiconductor Corporation
0.4
Figure 15b. Low Level Output vs VBS Supply Voltage
13
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FAN7083_GF085 High Side Gate Driver with Reset
5
Offset Supply Leakage Current(uA)
Offset Supply Leakage Current(uA)
160
120
80
40
0
-50
Max.
-25
500
0
25
50
75
100
400
300
200
100
Max
0
125
0
100
200
Temperature( C)
200
150
0
-50
Max
Typ
-25
0
25
50
75
100
50
Max
Typ
12
14
16
18
20
22
24
250
Vcc Supply Current (uA)
Vcc Supply Current (uA)
100
Figure 17b. VBS Supply Current vs VBS Supply Voltage
250
200
Max
Typ
50
0
-50
150
VBS Floating Supply Voltage (V)
Figure 17a. VBS Supply Current vs Temperature
100
600
200
0
10
125
Temperature ('C)
150
500
250
VBS Supply Current (uA)
VBS Supply Current (uA)
250
50
400
Figure 16b. Offset Supply Leakage vs Voltage
Figure 16a. Offset Supply Leakage vs Temperature
100
300
VB Boost Voltage(V)
o
-25
0
25
50
75
100
Max
100
Typ
50
12
14
16
18
20
22
24
Vcc Fixed Supply Voltage (V)
Figure 18b. VCC supply Current vs VCC Supply Voltage
Figure 18a. VCC supply Current vs Temperature
FAN7083_GF085 Rev. 1.0.1
150
0
10
125
Temperature ('C)
©2012 Fairchild Semiconductor Corporation
200
14
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FAN7083_GF085 High Side Gate Driver with Reset
200
Input Voltage (V)
Logic "1" Input Bias Current (uA)
14
80
60
Max
40
Typ
20
12
10
Max
8
6
4
2
0
-50
-25
0
25
50
75
100
0
10
125
12
Temperature ('C)
Figure 19a. Logic “1” IN Current vs Temperature
18
20
5
Logic "0" Inpit Current(A)
Logic "0" Inpit Current(A)
16
Figure 19b. Logic “1” IN Current vs Voltage
5
4
3
2
Max
1
0
-50
-25
0
25
50
75
100
4
3
2
1
Max
0
10
125
12
Figure20a. Logic “0” IN Current vs Temperature
18
20
5
Logic "0" Inpit Current(A)
80
60
40
Max
0
-50
16
Figure 20b. Logic “0” IN Current vs Voltage
100
20
14
VCC Supply Voltage(V)
o
Temperature( C)
Shutdown Logic "1" Input Bias Current (uA)
14
VCC Supply Voltage(V)
Typ
-25
0
25
50
75
100
2
1
Max
-25
0
25
50
75
100
125
o
Temperature( C)
Figure 21. Logic “1” Reset Current vs Temperature
FAN7083_GF085 Rev. 1.0.1
3
0
-50
125
Temperature ('C)
©2012 Fairchild Semiconductor Corporation
4
Figure 22. Logic “1” Reset Current vs Temperature
15
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FAN7083_GF085 High Side Gate Driver with Reset
16
100
VBS Undervoltage Lockout - (V)
VBS Undervoltage Lockout + (V)
11
11
10
9
8
Max
Typ
Min
7
6
-50
-25
0
25
50
75
100
10
Max
9
Typ
8
Min
7
6
5
-50
125
-25
0
Temperature ('C)
11
8
Max
Typ
Min
7
6
-50
-25
0
25
50
75
100
125
Max
9
Typ
8
Min
7
6
5
-50
125
-25
0
25
50
75
100
125
Temperature ('C)
Figure 24b. VCC Undervoltage(-) vs Temperature
Figure 24a. VCC Undervoltage(+) vs Temperature
500
500
Io+, Output Source Current (mA)
Io+, Output Source Current (mA)
100
10
Temperature ('C)
Vcc=VBS=15V
400
Typ.
300
Min.
200
100
0
-50
75
11
VCC Undervoltage Lockout - (V)
VCC Undervoltage Lockout + (V)
12
9
50
Figure 23b. VBS Undervoltage(-) vs Temperature
Figure 23a. VBS Undervoltage(+) vs Temperature
10
25
Temperature ('C)
-25
0
25
50
75
100
200
Typ
Min
100
12
14
16
18
20
VBS Supply Voltage (V)
o
Figure 25b. Output Source Current vs Voltage
Figure 25a. Output Source Current vs Temperature
FAN7083_GF085 Rev. 1.0.1
300
0
10
125
Temperature ( C)
©2012 Fairchild Semiconductor Corporation
Vcc=15V
400
16
www.fairchildsemi.com
FAN7083_GF085 High Side Gate Driver with Reset
12
Output Sink Current, IO- (mA)
Io-,Output Sink Cureent (mA)
1000
Vcc=VBS=15V
Typ.
800
Min.
600
400
200
0
-50
-25
0
25
50
75
100
Vcc=15V
800
600
Typ
400
Min
200
0
10
125
12
Temperature ( C)
VS Offset Supply Voltage (V)
-18
Allowable Negative VS (V)
18
20
(V)
-2
-20
-16
-14
-12
-10
Typ
-6
-4
-2
0
-50
16
Figure 26b. Output Sink Current vs Voltage
Figure 26a. Output Sink Current vs Temperature
-8
14
VBS Supply Voltage
o
-25
0
25
50
75
100
o
Typ. @ 125 C
RL=50, CL=2.5nF
-6
o
-8
Typ. @ 25 C
-10
-12
-14
12
14
16
18
20
VBS Floating Supply Voltage(V)
Figure 27b. Negative Allowable Offset vs Voltage
Figure 27a. Negative Allowable Offset vs Temperature
FAN7083_GF085 Rev. 1.0.1
10<=VCC<=20V,
Min
-16
10
125
Temperature ('C)
©2012 Fairchild Semiconductor Corporation
-4
17
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FAN7083_GF085 High Side Gate Driver with Reset
1000
5.00
4.80
A
0.65
3.81
8
5
6.20
5.80
PIN ONE
INDICATOR
B
1.75
4.00
3.80
1
5.60
4
1.27
(0.33)
0.25
M
C B A
1.27
LAND PATTERN RECOMMENDATION
0.25
0.10
SEE DETAIL A
1.75 MAX
R0.10
0.10
0.51
0.33
0.50 x 45°
0.25
C
OPTION A - BEVEL EDGE
GAGE PLANE
R0.10
8°
0°
0.90
0.406
0.25
0.19
C
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
18
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FAN7083_GF085 High Side Gate Driver with Reset
Package Dimensions
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Rev. I43
©2012 Fairchild Semiconductor Corporation
FAN7083_GF085 Rev. 1.0.1
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FAN7083_GF085 High Side Gate Driver with Reset
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