STMICROELECTRONICS 74LVX125TTR

74LVX125
LOW VOLTAGE QUAD BUS BUFFERS (3-STATE)
WITH 5V TOLERANT INPUTS
■
HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V
■
5V TOLERANT INPUTS
■
POWER-DOWN PROTECTION ON INPUTS
■
INPUT VOLTAGE LEVEL:
VIL = 0.8V, VIH = 2V at VCC =3V
■
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
■
LOW NOISE:
VOLP = 0.3V (TYP.) at VCC =3.3V
■
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4 mA (MIN) at VCC =3V
■
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
■
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
■
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVX125 is a low voltage CMOS QUAD
BUS BUFFERs fabricated with sub-micron silicon
gate and double-layer metal wiring C2MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
T&R
SOP
TSSOP
74LVX125MTR
74LVX125TTR
This device requires the 3-STATE control input G
to be set high to place the output into the high
impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V. It combines high speed
performance with the true CMOS low power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 3
1/12
74LVX125
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
1G to 4G
1A to 4A
1Y to 4Y
GND
VCC
14
NAME AND FUNCTION
Output Enable Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
A
G
Y
X
L
H
H
L
L
Z
L
H
X :Don‘t Care
Z : High Impedance
Table 4: Absolute Maximum Ratings
Symbol
VCC
Parameter
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Current
ICC or IGND DC VCC or Ground Current
Storage Temperature
Tstg
TL
Lead Temperature (10 sec)
Value
Unit
-0.5 to +7.0
V
-0.5 to +7.0
V
-0.5 to VCC + 0.5
- 20
V
mA
± 20
mA
± 25
mA
± 50
mA
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions
Symbol
Value
Unit
Supply Voltage (note 1)
2 to 3.6
V
VI
Input Voltage
0 to 5.5
V
VO
Output Voltage
Top
Operating Temperature
VCC
dt/dv
Parameter
Input Rise and Fall Time (note 2) (VCC = 3V)
1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2.0V
2/12
0 to VCC
V
-55 to 125
°C
0 to 100
ns/V
74LVX125
Table 6: DC Specifications
Test Condition
Symbol
VIH
VIL
VOH
VOL
IOZ
II
ICC
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
High Impedance
Output Leakage
Current
Input Leakage
Current
Quiescent Supply
Current
Value
TA = 25°C
VCC
(V)
Min.
2.0
3.0
3.6
2.0
3.0
3.6
Typ.
Max.
1.5
2.0
2.4
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
1.5
2.0
2.4
0.5
0.8
0.8
Max.
1.5
2.0
2.4
0.5
0.8
0.8
Unit
V
0.5
0.8
0.8
V
2.0
IO=-50 µA
1.9
2.0
3.0
IO=-50 µA
2.9
3.0
3.0
IO=-4 mA
2.58
2.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=4 mA
0.36
0.44
0.55
3.6
VI = VIH or VIL
VO = VCC or GND
±0.25
± 2.5
±5
µA
3.6
VI = 5.5V or GND
± 0.1
±1
±1
µA
3.6
VI = VCC or GND
2
20
20
µA
1.9
1.9
2.9
2.9
2.48
2.4
V
V
Table 7: Dynamic Switching Characteristics
Test Condition
Symbol
VOLP
VOLV
VIHD
VILD
Parameter
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
TA = 25°C
VCC
(V)
Min.
3.3
3.3
3.3
Value
-0.5
CL = 50 pF
Typ.
Max.
0.3
0.5
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-0.3
V
2.0
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
3/12
74LVX125
Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)
Test Condition
Symbol
tPLH
tPHL
tPZL
tPZH
Parameter
Propagation Delay
Time
Output Enable
Time
tPLZ
tPHZ
Output Disable
Time
tOSLH
tOSHL
Output to Output
Skew Time (note
1,2)
VCC
(V)
CL
(pF)
2.7
2.7
Value
TA = 25°C
-55 to 125°C
Typ.
Max.
Min.
Max.
Min.
Max.
15
50
5.8
8.3
10.1
13.6
1.0
1.0
13.5
17.0
1.0
1.0
14.5
18.0
3.3(*)
15
4.4
6.2
1.0
8.5
1.0
9.5
3.3(*)
2.7
2.7
50
6.9
9.7
1.0
12.0
1.0
13.0
15
50
5.3
7.8
9.3
12.8
1.0
1.0
12.5
16.0
1.0
1.0
13.5
17.0
3.3(*)
15
4.0
5.6
1.0
7.5
1.0
8.5
3.3(*)
2.7
50
6.5
9.1
1.0
11.0
1.0
12.0
50
10.0
15.7
1.0
19.0
1.0
20.0
(*)
50
8.3
11.2
1.0
13.0
1.0
14.0
50
0.5
1.0
1.5
1.5
50
0.5
1.0
1.5
1.5
3.3
2.7
(*)
3.3
Min.
-40 to 85°C
Unit
ns
ns
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
Table 9: Capacitive Characteristics
Test Condition
Symbol
Parameter
CIN
Input Capacitance
COUT
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
CPD
VCC
(V)
Value
TA = 25°C
Min.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Typ.
Max.
3.3
4
10
3.3
6
pF
3.3
14
pF
10
Max.
10
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per circuit)
4/12
74LVX125
Figure 3: Test Circuit
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
VCC
tPZH, tPHZ
GND
CL =15/50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
5/12
74LVX125
Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)
6/12
74LVX125
SO-14 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
1.35
1.75
0.053
0.069
A1
0.1
0.25
0.004
0.010
A2
1.10
1.65
0.043
0.065
B
0.33
0.51
0.013
0.020
C
0.19
0.25
0.007
0.010
D
8.55
8.75
0.337
0.344
E
3.8
4.0
0.150
0.157
e
1.27
0.050
H
5.8
6.2
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.4
1.27
0.016
0.050
k
0°
8°
0°
8°
ddd
0.100
0.004
0016019D
7/12
74LVX125
TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
8/12
74LVX125
Tape & Reel SO-14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
22.4
0.519
0.882
Ao
6.4
6.6
0.252
0.260
Bo
9
9.2
0.354
0.362
Ko
2.1
2.3
0.082
0.090
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
9/12
74LVX125
Tape & Reel TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
10/12
TYP
0.504
22.4
0.519
0.882
Ao
6.7
6.9
0.264
0.272
Bo
5.3
5.5
0.209
0.217
Ko
1.6
1.8
0.063
0.071
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
74LVX125
Table 10: Revision History
Date
Revision
27-Aug-2004
3
Description of Changes
Ordering Codes Revision - pag. 1.
11/12
74LVX125
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