74V1G79 SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1G79 is an advanced high-speed CMOS SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. it is designed to operate from 2V to 5.5V, making this device ideal for portable applications. This D-Type flip-flop is controlled by a clock input (CK). On the positive transition of the clock, the Q output will be set to the logic state that was setup at the D input. SOT23-5L SOT323-5L ORDER CODES PACKAGE T&R SOT23-5L SOT323-5L 74V1G79STR 74V1G79CTR Following the hold time interval, data at the D input can be changed without affecting the level at the output. Power down protection is provided on inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V systems. It’s available in the commercial and extended temperature range. All inputs and output are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/10 74V1G79 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 D 2 CK 4 3 Q GND VCC 5 NAME AND FUNCTION Data Input Clock Input (Positive Edge) Flip-Flop Output Ground (0V) Positive Supply Voltage TRUTH TABLE D CK Q L L H H L Qn H Qn ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) ± 50 mA -65 to +150 °C 260 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Value Unit Supply Voltage 2 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 0 to 100 0 to 20 ns/V ns/V VCC dt/dv Parameter Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 1) VIN from 30% to 70% of V CC 2/10 74V1G79 DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II ICC Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 1.5 1.5 0.7VCC 0.7VCC 0.7VCC Unit Max. V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC V 2.0 IO=-50 µA 1.9 2.0 1.9 1.9 3.0 IO=-50 µA 2.9 3.0 2.9 2.9 4.5 IO=-50 µA 4.4 4.5 3.0 IO=-4 mA 2.58 4.5 IO=-8 mA 3.94 2.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=50 µA 0.0 0.1 0.1 0.1 4.5 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=4 mA 0.36 0.44 0.55 4.5 IO=8 mA 0.36 0.44 0.55 0 to 5.5 VI = 5.5V or GND ± 0.1 ±1 ±1 µA 5.5 VI = VCC or GND 1 10 20 µA 4.4 4.4 2.48 2.4 3.8 V 3.7 V AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time CK to Q tW ts th fMAX CK Pulse Width, HIGH or LOW Setup Time D to CK, HIGH or LOW Hold Time D to CK, HIGH or LOW Maximum Clock Frequency VCC (V) CL (pF) Value TA = 25°C -55 to 125°C Max. Min. Max. Typ. Max. Min. 15 5.4 8.0 1.0 9.5 1.0 10.5 50 5.9 8.5 1.0 10.0 1.0 11.0 5.0(**) 15 3.9 5.5 1.0 6.5 1.0 7.5 5.0(**) 50 4.5 6.5 1.0 7.5 1.0 8.5 (*) 3.3(*) 3.3 Min. -40 to 85°C (*) 4.0 4.0 4.0 (**) 5.0 3.0 3.0 3.0 3.3(*) 4.0 4.0 4.0 5.0(**) 3.0 3.0 3.0 3.3(*) 1.0 1.0 1.0 (**) 1.0 1.0 1.0 3.3 5.0 3.3(*) 50 100 120 90 90 5.0(**) 50 165 180 150 150 Unit ns ns ns ns MHz (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 3/10 74V1G79 CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Min. Typ. Max. 10 CIN Input Capacitance 4 CPD Power Dissipation Capacitance (note 1) 8 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC TEST CIRCUIT CL = 15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) 4/10 74V1G79 WAVEFORM: PROPAGATION DELAY, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 5/10 74V1G79 SOT23-5L MECHANICAL DATA mm. mils DIM. MIN. MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 2.60 3.00 102.3 118.1 E1 1.50 1.75 59.0 68.8 e 0.95 37.4 e1 1.9 74.8 L 6/10 TYP 0.35 0.55 13.7 21.6 74V1G79 SOT323-5L MECHANICAL DATA mm. mils DIM. MIN. TYP MAX. MIN. TYP. MAX. A 0.80 1.10 31.5 43.3 A1 0.00 0.10 0.0 3.9 A2 0.80 1.00 31.5 39.4 b 0.15 0.30 5.9 11.8 C 0.10 0.18 3.9 7.1 D 1.80 2.20 70.9 86.6 E 1.80 2.40 70.9 94.5 E1 1.15 1.35 45.3 53.1 e 0.65 25.6 e1 1.3 51.2 L 0.10 0.30 3.9 11.8 7/10 74V1G79 Tape & Reel SOT23-xL MECHANICAL DATA mm. inch DIM. MIN. TYP A MIN. TYP. 180 13.0 13.2 MAX. 7.086 C 12.8 D 20.2 0.795 N 60 2.362 T 8/10 MAX. 0.504 0.512 14.4 0.519 0.567 Ao 3.13 3.23 3.33 0.123 0.127 0.131 Bo 3.07 3.17 3.27 0.120 0.124 0.128 Ko 1.27 1.37 1.47 0.050 0.054 0.0.58 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 3.9 4.0 4.1 0.153 0.157 0.161 74V1G79 Tape & Reel SOT323-xL MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 175 180 185 6.889 7.086 7.283 C 12.8 13 13.2 0.504 0.512 0.519 D 20.2 N 59.5 0.795 60 T 60.5 2.362 14.4 0.567 Ao 2.25 0.088 Bo 2.7 0.106 Ko 1.2 0.047 Po 3.98 4 4.2 0.156 0.157 0.165 P 3.98 4 4.2 0.156 0.157 0.165 9/10 74V1G79 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 10/10