FAIRCHILD FSL106HR

FSL106HR
Green Mode Fairchild Power Switch (FPS™)
Features
Description


The FSL106HR integrated Pulse Width Modulator
(PWM) and SenseFET is specifically designed for highperformance offline Switch-Mode Power Supplies
(SMPS) with minimal external components. FSL106HR
includes integrated high-voltage power switching
regulators
that
combine
an
avalanche-rugged
SenseFET with a current-mode PWM control block.
Internal Avalanche-Rugged SenseFET (650V)
Under 50mW Standby Power Consumption at
265VAC, No-load Condition with Burst Mode

Precision Fixed Operating Frequency with
Frequency Modulation for Attenuating EMI




Internal Startup Circuit




Built-in Soft-Start: 20ms
Pulse-by-Pulse Current Limiting
Various Protections: Over-Voltage Protection
(OVP), Overload Protection (OLP), Output-Short
Protection (OSP), Abnormal Over-Current
Protection (AOCP), Internal Thermal Shutdown
Function with Hysteresis (TSD)
Auto-Restart Mode
Under-Voltage Lockout (UVLO)
Low Operating Current: 1.8mA
Adjustable Peak Current Limit
The integrated PWM controller includes: Under-Voltage
Lockout (UVLO) protection, Leading-Edge Blanking
(LEB), a frequency generator for EMI attenuation, an
optimized gate turn-on/turn-off driver, Thermal
Shutdown (TSD) protection, and temperaturecompensated precision current sources for loop
compensation and fault protection circuitry. The
FSL106HR offers good soft-start performance. When
compared to a discrete MOSFET and controller or RCC
switching converter solution, the FSL106HR reduces
total component count, design size, and weight; while
increasing efficiency, productivity, and system reliability.
This device provides a basic platform that is well suited
for the design of cost-effective flyback converters.
Maximum Output Power(1)
Applications



SMPS for Home Appliance
Adapter
Related Resources

230VAC ± 15%(2)
SMPS for VCR, STB, DVD, & DVCD Players
Adapter(3)
Open
Frame
9W
13W
85-265VAC
(3)
Adapter
8W
Open
Frame
10W
Notes:
1.
AN-4137 — Design Guidelines for Off-line Flyback
Converters using FPS™

AN-4141 — Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback
Applications

AN-4147 — Design Guidelines for RCD Snubber of
Flyback

Fairchild Power Supply WebDesigner — Flyback
Design & Simulation - In Minutes at No Expense
2.
3.
The junction temperature can limit the maximum
output power.
230VAC or 100/115VAC with doubler.
Typical continuous power in a non-ventilated
enclosed adapter measured at 50°C ambient.
Ordering Information
Part Number
Operating
Temperature Range
Top Mark
Package
Packing Method
FSL106HR
-40 to 105°C
FSL106HR
8-Lead, Dual Inline Package (DIP)
Rail
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
April 2012
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Typical Application Diagram
Figure 1. Typical Application
Internal Block Diagram
V ST R
5
VCC
2
D ra in
6 ,7 ,8
IC H
V B U R L/V B U R H
V CC
8 V /1 2V
V CC Good
Inte rna l
B ia s
V R EF
V CC
I D EL A Y
R a ndom
Fre que nc y
G e ne ra tor
IF B
V FB 3
OSC
PWM
2 .5 R
S
Q
R
Q
G a te
Driv e r
R
IPK 4
O n -Tim e
D e te c tor
LE B
S oft
S ta rt
OSP
V SD
V CC Good
VCC
V O VP
S
Q
R
Q
1 GN D
A OC P
V AO C P
TS D
Figure 2. Internal Block Diagram
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
2
Figure 3. Pin Configuration
Pin Definitions
Pin #
Name
1
GND
Ground. SenseFET source terminal on the primary side and internal control ground.
2
VCC
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (VSTR) via an internal switch during startup (see Figure 2 ). Once
VCC reaches the UVLO upper threshold (12V), the internal startup switch opens and device
power is supplied via the auxiliary transformer winding.
3
VFB
Feedback Voltage. The non-inverting input to the PWM comparator, it has a 0.4mA current
source connected internally, while a capacitor and opto-coupler are typically connected
externally. There is a delay while charging external capacitor CFB from 2.4V to 6V using an
internal 5µA current source. This delay prevents false triggering under transient conditions, but
still allows the protection mechanism to operate under true overload conditions.
4
IPK
Peak Current Limit. Adjusts the peak current limit of the SenseFET. The feedback 0.4mA
current source is diverted to the parallel combination of an internal 6kΩ resistor and any
external resistor to GND on this pin to determine the peak current limit.
5
VSTR
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the VCC pin
and ground. Once VCC reaches 12V, the internal switch is opened.
6, 7, 8
Drain
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the
transformer decreases leakage inductance.
Description
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Pin Configuration
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TJ = 25°C, unless otherwise specified.
Symbol
Parameter
Min.
Max.
Unit
VSTR
VSTR Pin Voltage
-0.3
650.0
V
VDS
Drain Pin Voltage
-0.3
650.0
V
VCC
Supply Voltage
26
V
VFB
Feedback Voltage Range
ID
Continuous Drain Current
IDM
Drain Current Pulsed(4)
-0.3
(5)
12.0
V
0.7
A
2.8
A
EAS
Single Pulsed Avalanche Energy
15
mJ
PD
Total Power Dissipation
1.5
W
TJ
Operating Junction Temperature
TA
Operating Ambient Temperature
-40
+105
°C
Storage Temperature
-55
+150
°C
TSTG
Internally Limited
(6)
ESD
ΘJA
ΘJC
ΘJT
5
Human Body Model, JESD22-A114
(6)
Charged Device Model, JESD22-C101
Junction-to-Case Thermal Resistance
KV
2
Junction-to-Ambient Thermal Resistance(7,8)
(7,9)
(7,10)
Junction-to-Top Thermal Resistance
°C
80
°C/W
19
°C/W
33.7
°C/W
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Notes:
4. Repetitive rating: pulse width limited by maximum junction temperature.
5. L=30mH, starting TJ=25°C.
6. Meets JEDEC standards JESD 22-A114 and JESD 22-C101.
7. All items are tested with the standards JESD 51-2 and JESD 51-10.
8. ΘJA free-standing, with no heat-sink, under natural convection.
9. ΘJC junction-to-lead thermal characteristics under ΘJA test condition. TC is measured on the source #7 pin closed
to plastic interface for ΘJA thermo-couple mounted on soldering.
10. ΘJT junction-to-top of thermal characteristic under ΘJA test condition. Tt is measured on top of package. Thermocouple is mounted in epoxy glue.
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
4
TA = 25°C unless otherwise specified.
Symbol
Parameter
Conditions
Min. Typ. Max. Units
SenseFET Section
BVDSS
Drain-Source Breakdown Voltage
VCC = 0V, ID = 250µA
IDSS
Zero Gate Voltage Drain Current
VDS = 650V, VGS = 0V
Drain-Source On-State Resistance
VGS = 10V, VGS = 0V, TC = 25°C
RDS(ON)
650
V
11.5
250
µA
18.0
Ω
CISS
Input Capacitance
VGS = 0V, VDS = 25V, f = 1MHz
137
pF
COSS
Output Capacitance
VGS = 0V, VDS = 25V, f = 1MHz
15.7
pF
CRSS
Reverse Transfer Capacitance
VGS = 0V, VDS = 25V, f = 1MHz
2.9
pF
td(ON)
Turn-On Delay
VDD = 350V, ID = 0.7A
8.6
ns
tr
td(OFF)
tf
Rise Time
VDD = 350V, ID = 0.7A
9.7
ns
Turn-Off Delay
VDD = 350V, ID = 0.7A
23.6
ns
Fall Time
VDD = 350V, ID = 0.7A
49.2
ns
Control Section
fOSC
∆fOSC
Switching Frequency
VDS = 650V, VGS = 0V
Switching Frequency Variation
VGS = 10V, VGS = 0V, TC = 125°C
fFM
Frequency Modulation
DMAX
Maximum Duty Cycle
VFB = 4V
DMIN
Minimum Duty Cycle
VFB = 0V
VSTART
VSTOP
90
100
110
±5
±10
±3
UVLO Threshold Voltage
71
After Turn-On
77
KHz
%
KHz
83
%
0
0
0
%
11
12
13
V
7
8
9
V
IFB
Feedback Source Current
VFB = 0V
320
400
480
µA
tS/S
Internal Soft-Start Time
VFB = 4V
15
20
25
ms
0.56
0.70
0.84
V
0.37
0.50
0.63
V
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
Burst Mode Section
VBURH
VBURL
TJ = 25°C
Burst Mode Voltage
VBUR(HYS)
200
mV
Protection Section
ILIM
Peak Current Limit
TJ = 25°C, di/dt = 300mA/µs
0.62
(11)
0.70
0.84
tCLD
Current Limit Delay Time
VSD
Shutdown Feedback Voltage
VCC = 15V
5.5
6.0
6.5
V
IDELAY
Shutdown Delay Current
VFB = 5V
3.5
5.0
6.5
µA
VOVP
Over-Voltage Protection Threshold
VFB = 2V
22.5
24.0
25.5
V
1.00
1.35
µs
tOSP
VOSP
Threshold Time
Output-Short Threshold Feedback
Protection(11) Voltage
Feedback Blanking
Time
tOSP_FB
VAOCP
AOCP Voltage(11)
TSD
Thermal
Shutdown(11)
HYSTSD
tLEB
200
A
ns
TJ = 25°C
OSP Triggered When tON<tOSP,
VFB>VOSP and Lasts Longer than
tOSP_FB
1.44
1.60
V
2.0
2.5
µs
TJ = 25°C
0.85
1.00
1.15
V
125
137
150
°C
Shutdown Temperature
Hysteresis
60
Leading-Edge Blanking Time(11)
300
°C
ns
Continued on the following page…
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
5
TA = 25°C unless otherwise specified.
Symbol
Parameter
Conditions
Min. Typ. Max. Units
Total Device Section
IOP1
Operating Supply Current
(While Switching)
IOP2
ICH
VSTR
(11)
VCC = 14V, VFB > VBURH
2.5
3.5
mA
Operating Supply Current
(Control Part Only)
VCC = 14V, VFB < VBURL
1.8
2.5
mA
Startup Charging Current
VCC = 0V
0.9
1.1
1.3
mA
Minimum VSTR Supply Voltage
VCC = VFB = 0V, VSTR Increase
35
Note:
11. Though guaranteed by design, it is not 100% tested in production.
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
V
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics (Continued)
www.fairchildsemi.com
6
These characteristic graphs are normalized at TA=25.
Operating Frequency (fOSC)
Maximum Duty Cycle (DMAX)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1
1
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
-40℃ -25℃
0℃
25℃
50℃
75℃ 100℃ 120℃ 140℃
-40℃ -25℃
Figure 4. Operating Frequency vs. Temperature
0℃
25℃
50℃
75℃ 100℃ 120℃ 140℃
Figure 5. Maximum Duty Cycle vs. Temperature
Start Threshold Voltage (VSTART)
Operating Supply Current (Iop2)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1.0
1.0
0.9
0.9
0.8
0.8
0.7
0.7
0.6
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics
0.6
-40
-25
0
25
50
75
100
120
140
-40
-25
0
25
50
75
100
120
140
Figure 6. Operating Supply Current vs. Temperature
Figure 7. Start Threshold Voltage vs. Temperature
Stop Theshold Voltage (VSTOP)
Feedback Source Current (IFB)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1
1
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
-40℃ -25℃
0℃
25℃
50℃
-40℃ -25 ℃
75℃ 100℃ 120℃ 140℃
Figure 8. Stop Threshold Voltage vs. Temperature
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
0℃
25 ℃
50℃
75 ℃ 100 ℃ 120℃ 140 ℃
Figure 9. Feedback Source Current vs. Temperature
www.fairchildsemi.com
7
These characteristic graphs are normalized at TA=25.
Peak Current Limit (ILIM)
Startup Charging Current (ICH)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1
1
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
-40℃ -25℃
0℃
25℃
50℃
-40℃ -25℃
75℃ 100℃ 120℃ 140℃
0℃
25℃
50℃
75℃ 100℃ 120℃ 140℃
Figure 10. Startup Charging Current vs. Temperature
Figure 11. Peak Current Limit vs. Temperature
Burst Operating Supply Current (Iop1)
Over-Voltage Protection (V OVP)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1.0
1
0.9
0.9
0.8
0.8
0.7
0.7
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics (Continued)
0.6
0.6
-40
-25
0
25
50
75
100
120
-40℃ -25℃
140
Figure 12. Burst Operating Supply Current
vs. Temperature
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
0℃
25℃
50℃
75℃ 100℃ 120℃ 140℃
Figure 13. Over-Voltage Protection vs. Temperature
www.fairchildsemi.com
8
Startup
Feedback Control
At startup, an internal high-voltage current source
supplies the internal bias and charges the external
capacitor (CA) connected with the VCC pin, as illustrated
in Figure 14. When VCC reaches the start voltage of 12V,
the FPS™ begins switching and the internal highvoltage current source is disabled. The FPS continues
normal switching operation and the power is provided
from the auxiliary transformer winding unless VCC goes
below the stop voltage of 8V.
FSL106HR employs current-mode control, as shown in
Figure 16. An opto-coupler (such as the FOD817A) and
shunt regulator (such as the KA431) are typically used
to implement the feedback network. Comparing the
feedback voltage with the voltage across the RSENSE
resistor makes it possible to control the switching duty
cycle. When the shunt regulator reference pin voltage
exceeds the internal reference voltage of 2.5V, the optocoupler LED current increases, the feedback voltage VFB
is pulled down, and the duty cycle is reduced. This
typically occurs when the input voltage is increased or
the output load is decreased.
Figure 14. Startup Circuit
Figure 16. Pulse-Width-Modulation Circuit
Oscillator Block
Leading-Edge Blanking (LEB)
The oscillator frequency is set internally and the FPS
has a random frequency fluctuation function. Fluctuation
of the switching frequency of a switched power supply
can reduce EMI by spreading the energy over a wider
frequency range than the bandwidth measured by the
EMI test equipment. The amount of EMI reduction is
directly related to the range of the frequency variation.
The range of frequency variation is fixed internally;
however, its selection is randomly chosen by the
combination of external feedback voltage and internal
free-running oscillator. This randomly chosen switching
frequency effectively spreads the EMI noise nearby
switching frequency and allows the use of a costeffective inductor instead of an AC input line filter to
satisfy the world-wide EMI requirements.
At the instant the internal SenseFET is turned on, the
primary-side capacitance and secondary-side rectifier
diode reverse recovery typically cause a high current
spike through the SenseFET. Excessive voltage across
the RSENSE resistor leads to incorrect feedback operation
in the current-mode PWM control. To counter this effect,
the FPS employs a leading-edge blanking (LEB) circuit
(see the Figure 16). This circuit inhibits the PWM
comparator for a short time (tLEB) after the SenseFET is
turned on.
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Functional Description
Protection Circuits
The FPS has several protective functions, such as
overload protection (OLP), over-voltage protection
(OVP), output-short protection (OSP), under-voltage
lockout (UVLO), abnormal over-current protection
(AOCP), and thermal shutdown (TSD). Because these
various protection circuits are fully integrated in the IC
without external components, the reliability is improved
without increasing cost. Once a fault condition occurs,
switching is terminated and the SenseFET remains off.
This causes VCC to fall. When VCC reaches the UVLO
stop voltage, VSTOP (8V), the protection is reset and the
internal high-voltage current source charges the VCC
capacitor via the VSTR pin. When VCC reaches the UVLO
start voltage, VSTART (12V), the FPS resumes normal
operation. In this manner, the auto-restart can
alternately enable and disable the switching of the
power SenseFET until the fault condition is eliminated.
Figure 15. Frequency Fluctuation Waveform
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
9
When the secondary rectifier diodes or the transformer
pin are shorted, a steep current with extremely high di/dt
can flow through the SenseFET during the LEB time.
Even though the FPS has OLP (Overload Protection), it
is not enough to protect the FPS in that abnormal case,
since severe current stress is imposed on the
SenseFET until OLP triggers. The FPS includes the
internal AOCP (Abnormal Over-Current Protection)
circuit shown in Figure 19. When the gate turn-on signal
is applied to the power SenseFET, the AOCP block is
enabled and monitors the current through the sensing
resistor. The voltage across the resistor is compared
with a preset AOCP level. If the sensing resistor voltage
is greater than the AOCP level, the set signal is applied
to the latch, resulting in the shutdown of the SMPS.
Figure 17. Auto-Restart Protection Waveforms
Overload Protection (OLP)
Overload is defined as the load current exceeding a preset level due to an unexpected event. In this situation,
the protection circuit should be activated to protect the
SMPS. However, even when the SMPS is operating
normally, the overload protection (OLP) circuit can be
activated during the load transition or startup. To avoid
this undesired operation, the OLP circuit is designed to
be activated after a specified time to determine whether
it is a transient situation or a true overload situation.
Figure 19. Abnormal Over-Current Protection
Thermal Shutdown (TSD)
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Abnormal Over-Current Protection (AOCP)
The SenseFET and the control IC are integrated,
making it easier to detect the temperature of the
SenseFET.
When
the
temperature
exceeds
approximately 137°C, thermal shutdown is activated.
In conjunction with the IPK current limit pin (if used), the
current-mode feedback path limits the current in the
SenseFET when the maximum PWM duty cycle is
attained. If the output consumes more than this
maximum power, the output voltage (VO) decreases
below its rating voltage. This reduces the current
through the opto-coupler LED, which also reduces the
opto-coupler transistor current, thus increasing the
feedback voltage (VFB). If VFB exceeds 2.4V, the
feedback input diode is blocked and the 5µA current
source (IDELAY) starts to charge CFB slowly up to VCC. In
this condition, VFB increases until it reaches 6V, when
the switching operation is terminated, as shown in
Figure 18. The shutdown delay is the time required to
charge CFB from 2.4V to 6V with 5µA current source.
Over-Voltage Protection (OVP)
In the event of a malfunction in the secondary-side
feedback circuit or an open feedback loop caused by a
soldering defect, the current through the opto-coupler
transistor becomes almost zero. Then, VFB climbs up in
a similar manner to the overload situation, forcing the
preset maximum current to be supplied to the SMPS
until the overload protection is activated. Because
excess energy is provided to the output, the output
voltage may exceed the rated voltage before the
overload protection is activated, resulting in the
breakdown of the devices in the secondary side. To
prevent this situation, an over-voltage protection (OVP)
circuit is employed. In general, VCC is proportional to the
output voltage and the FPS uses VCC instead of directly
monitoring the output voltage. If VCC exceeds 24V, OVP
circuit is activated, resulting in termination of the
switching operation. To avoid undesired activation of
OVP during normal operation, VCC should be designed
to be below 24V.
Figure 18. Overload Protection (OLP)
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
10
feedback voltage drops below VBURH. Switching
continues until the feedback voltage drops below VBURL.
At this point, switching stops and the output voltages
start to drop at a rate dependent on the standby current
load. This causes the feedback voltage to rise. Once it
passes VBURH, switching resumes. The feedback voltage
then falls and the process repeats. Burst mode
alternately enables and disables switching of the
SenseFET and reduces switching loss in standby mode.
If the output is shorted, steep current with extremely
high di/dt can flow through the SenseFET during the
LEB time. Such a steep current brings high-voltage
stress on the drain of SenseFET when turned off. To
protect the device from such an abnormal condition,
OSP detects VFB and SenseFET turn-on time. When the
VFB is higher than 1.6V and the SenseFET turn-on time
is lower than 1.0µs, the FPS recognizes this condition
as an abnormal error and shuts down PWM switching
until VCC reaches VSTART again. An abnormal condition
output is shown in Figure 20.
Figure 20. Output Short Waveforms (OSP)
Soft-Start
The FPS has an internal soft-start circuit that slowly
increases the feedback voltage, together with the
SenseFET current, after it starts. The typical soft-start
time is 20ms, as shown in Figure 21, where progressive
increments of the SenseFET current are allowed during
the startup phase. The pulse width to the power
switching device is progressively increased to establish
the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage.
Soft-start helps to prevent transformer saturation and
reduce the stress on the secondary diode.
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
Output-Short Protection (OSP)
Figure 22. Burst-Mode Operation
Adjusting Peak Current Limit
As shown in Figure 23, a combined 6kΩ internal
resistance is connected to the non-inverting lead on the
PWM comparator. An external resistance of Rx on the
current limit pin forms a parallel resistance with the 6kΩ
when the internal diodes are biased by the main current
source of 400µA. For example, FSL106HR has a typical
SenseFET peak current limit (ILIM) of 0.7A. ILIM can be
adjusted to 0.5A by inserting Rx between the IPK pin and
the ground. The value of the Rx can be estimated by the
following equations:
0.7A: 0.5A = 6kΩ: XkΩ
(1)
X = Rx || 6kΩ
(2)
where X is the resistance of the parallel network.
Figure 21. Internal Soft-Start
Burst Operation
To minimize power dissipation in standby mode, the
FPS enters burst mode. As the load decreases, the
feedback voltage decreases. As shown in Figure 22, the
device automatically enters burst mode when the
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
Figure 23. Peak Current Limit Adjustment
www.fairchildsemi.com
11
Physical Dimensions
9.83
9.00
6.67
6.096
8.255
7.61
3.683
3.20
5.08 MAX
7.62
0.33 MIN
3.60
3.00
(0.56)
2.54
0.56
0.355
0.356
0.20
9.957
7.87
1.65
1.27
7.62
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 24. 8-Lead, Dual Inline Package (DIP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
12
FSL106HR — Green Mode Fairchild Power Switch (FPS™)
© 2010 Fairchild Semiconductor Corporation
FSL106HR • Rev. 1.0.1
www.fairchildsemi.com
13