FAIRCHILD 74VHCT540AM

Revised April 2005
74VHCT540A
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHCT540A is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissipation.
The VHCT540A is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers.
This device is similar in function to the VHCT240A while
providing flow-through architecture (inputs on opposite side
from outputs). This pinout arrangement makes this device
especially useful as an output port for microprocessors,
allowing ease of layout and greater PC board density.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery
backup. This circuit prevents device destruction due to mismatched supply and input voltages.
Note 1: Outputs in OFF-STATE
Features
■ High Speed:
tPD
5.4 ns (typ) at VCC
5V
4 PA (max) at TA
■ Low Power Dissipation: ICC
25qC
■ Power down protection is provided on all inputs and
outputs
■ Pin and function compatible with 74HCT540
Ordering Code:
Order Number
Package Number
74VHCT540AM
74VHCT540ASJ
74VHCT540AMTC
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC20
74VHCT540AN
Package Dissipation
M20B
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagram
IEEE/IEC
Truth Table
Pin Descriptions
Inputs
OE1
Pin Names
Description
OE1, OE2
3-STATE Output Enable Inputs
I0 - I7
O0 - O7
OE2
I
Outputs
L
L
H
L
H
X
X
Z
Inputs
X
H
X
Z
3-STATE Outputs
L
L
L
H
H HIGH Voltage Level
L LOW Voltage Level
© 2005 Fairchild Semiconductor Corporation
DS500012
X Immaterial
Z High Impedance
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74VHCT540A Octal Buffer/Line Driver with 3-STATE Outputs
June 1997
74VHCT540A
Absolute Maximum Ratings(Note 2)
Recommended Operating
Conditions (Note 6)
0.5V to 7.0V
0.5V to 7.0V
Supply Voltage (VCC)
DC Input Voltage (VIN )
4.5V to 5.5V
Supply Voltage (VCC)
DC Output Voltage (VOUT)
0V to 5.5V
Input Voltage (VIN)
0.5V to 7.0V
0.5V to VCC 0.5V
20 mA
(Note 3)
(Note 4)
Input Diode Current (IIK)
Output Voltage (VOUT)
Output Diode Current (IOK)
(Note 4)
0V to VCC
(Note 3)
0V to 5.5V
40qC to 85qC
Operating Temperature (TOPR)
r20 mA
r25 mA
r75 mA
65qC to 150qC
(Note 5)
DC Output Current (IOUT)
DC VCC/GND Current (ICC)
Storage Temperature (TSTG)
Input Rise and Fall Time (tr, tf)
Lead Temperature (TL)
260 qC
(Soldering, 10 seconds)
5.0V r 0.5V
VCC
0 | 20 ns/V
Note 2: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications.
Note 3: When outputs are in OFF-STATE or when VCC
OV.
Note 4: HIGH or LOW state. IOUT absolute maximum rating must be
observed.
Note 5: VOUT GND, VOUT ! VCC (outputs active).
Note 6: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA
Min
25qC
TA
Typ
VIH
HIGH Level Input Voltage 4.5 5.5
VIL
LOW Level Input Voltage
VOH
HIGH Level
4.5
4.4
Output Voltage
4.5
3.94
VOL
LOW Level
4.5
Output Voltage
4.5
IOZ
3-STATE Output
OFF-STATE Current
IIN
Input Leakage Current
ICC
Max
40qC to 85qC
Min
2.0
Max
2.0
4.5 5.5
0.0
Conditions
V
0.8
0.8
4.5
Units
V
4.4
V
VIN
3.80
V
or VIL
VIN
0.1
0.1
V
0.36
0.44
V
or VIL
VIH
VIH
IOH
50 PA
IOH
8 mA
IOL
50 PA
IOL
8 mA
5.5
r0.25
r2.5
PA
VIN VIH or VIL
VOUT VCC or GND
0 5.5
r0.1
r1.0
PA
VIN
5.5V or GND
Quiescent Supply Current
5.5
4.0
40.0
PA
VIN
VCC or GND
ICCT
Maximum ICC/input
5.5
1.35
1.50
mA
VIN 3.4V
other inputs
IOFF
Output Leakage Current
0
0.5
5.0
PA
VOUT
5.5V
Noise Characteristics
Symbol
Parameter
VOLP
Quiet Output Maximum
(Note 7)
Dynamic VOL
VOLV
Quiet Output Minimum
(Note 7)
Dynamic VOL
VIHD
Minimum HIGH Level Dynamic
(Note 7)
Input Voltage
VILD
Maximum HIGH Level Dynamic
(Note 7)
Input Voltage
TA
Typ
Limits
5.0
1.2
1.6
V
CL
50 pF
5.0
1.2
1.6
V
CL
50 pF
5.0
2.0
V
CL
50 pF
5.0
0.8
V
CL
50 pF
Note 7: Parameter guaranteed by design.
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25qC
VCC
(V)
2
Units
Conditions
VCC or GND
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Time
tPZL
3-STATE Output
tPZH
Enable Time
tPLZ
3-STATE Output
tPHZ
Disable Time
tOSLH
Output to Output
tOSHL
Skew
CIN
Input Capacitance
COUT
Output Capacitance
CPD
Power Dissipation Capacitance
Note 8: Parameter guaranteed by design. tOSLH
VCC
(V)
TA
Min
5.0 r 0.5
5.0 r 0.5
5.0 r 0.5
25qC
40qC to 85qC
Max
Min
Max
5.4
7.4
1.0
8.5
5.9
8.4
1.0
9.5
8.3
11.3
1.0
13.0
8.8
12.3
1.0
14.0
9.4
11.9
1.0
13.5
5.0 r 0.5
Units
Conditions
ns
CL
15 pF
CL
50 pF
CL
15 pF
ns
RL
1 k:
CL
50 pF
ns
RL
1 k: CL
50 pF
1.0
1.0
ns
(Note 8)
10
10
pF
VCC
Open
9
pF
VCC
5.0V
19
pF
(Note 9)
4
|tPLHmax t PLHmin|; tOSLH
TA
Typ
CL
50 pF
|tPHLmax tPHLmin|.
Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN I CC/8 (per bit).
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74VHCT540A
AC Electrical Characteristics
74VHCT540A
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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74VHCT540A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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74VHCT540A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
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6
74VHCT540A Octal Buffer/Line Driver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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