APPLICATION NOTE Prevention of Data Corruption in ST6 On-Chip EEPROM C. PILON INTRODUCTION The ST6 Microcontroller has been designed to avoid any potential corruption of data programmed into its on-chip EEPROM (when available). Data integrity can be ensured as long as the application designer follows the guidelines provided in this note. In general, EEPROM data corruption occurs whenever the reset signal is not controlled when the power supply goes up or down. This is particularly true with a slow ramp-up and/or slow fall time of the power supply, since the device may be in a supply voltage area where the device functionality is not guaranteed for a long time. If no special care is taken during the power up sequence regarding the reset signal then the microcontroller core may start writing into the EEPROM. The same behaviour may occur upon a power down. Two complementary solutions are possible to prevent from these unwanted actions, a software solution and a hardware solution. 1 SOFTWARE SOLUTION This solution only applies to the power down sequence which represents the majority of data corruption risks. The solution consists in disabling the enable bit of the EEPROM control register after writing into the EEPROM and before switching ”off” the application; this avoids any spurious writing as described above. Note that this bit is automatically reset upon power on, thus the reason why most cases of data corruption can occur at power down, as the enable bit may have been modified by the user software. AN671 / 02,94 PREVENTION OF DATA CORRUPTION IN ST6 ON-CHIP EEPROM 2 HARDWARE SOLUTION No problems can occur when the device is in the reset state as long as the voltage has not reached the minimum value at which the CPU performs. A simple level detection circuit which forces the reset input low before reaching this critical point prevents any unwanted writing into the EEPROM. Figure 1. Reset Network Reset Pin Figure 2. Supply/ Reset graph Vdd max. Min operating voltage Reset Pin 2/4 PREVENTION OF DATA CORRUPTION IN ST6 ON-CHIP EEPROM 3 SUMMARY Using both solutions shown in this note avoids any potential for data corruption during the power supply rise/fall time. The software solution is inexpensive and must be systematically used. The hardware solution costs little and should be used whenever the power supply is particularly slow (rise/fall time > 100ms) or if the supply comes from the mains through a single resistor and diode network. 3/4 PREVENTION OF DATA CORRUPTION IN ST6 ON-CHIP EEPROM NOTES : Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components by SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom U.S.A. 4/4