FAIRCHILD MM74HCT05M

MM74HCT05
Hex Inverter (Open Drain)
Features
General Description
■ Open drain for wire-NOR function
The MM74HCT05 is a logic function fabricated by using
advanced silicon-gate CMOS technology, which provides the inherent benefits of CMOS—low quiescent
power and wide power supply range. The device is also
input and output characteristic and pinout compatible
with standard DM74LS logic families. The MM74HCT05
open drain Hex Inverter requires the addition of an external resistor to perform a wire-NOR function.
■ LS-TTL pinout and threshold compatible
■ Fanout of 10 LS-TTL loads
■ Typical propagation delays:
– tPZL (with 1kΩ resistor) 10ns
– tPLZ (with 1kΩ resistor) 8ns
All inputs are protected from static discharge damage by
internal diodes to VCC and ground.
MM74HCT devices are intended to interface between
TTL and NMOS components and standard CMOS
devices. These parts are also plug-in replacements for
LS-TTL devices and can be used to reduce power consumption in existing designs.
Ordering Information
Order Number
Package
Number
Package Description
MM74HCT05M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
MM74HCT05SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT05MTC
MM74HCT05N
MTC14
N14A
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
MM74HCT05 — Hex Inverter (Open Drain)
March 2008
MM74HCT05 — Hex Inverter (Open Drain)
Connection Diagram
Top View
Logic Diagram
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
Typical Application
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
VCC
Supply Voltage
VIN
DC Input Voltage
–1.5 to VCC+1.5V
DC Output Voltage
–0.5 to VCC+0.5V
VOUT
IIK, IOK
–0.5 to +7.0V
Clamp Diode Current
±20mA
IOUT
DC Output Current, per pin
±25mA
ICC
DC VCC or GND Current, per pin
±50mA
TSTG
PD
Storage Temperature Range
–65°C to +150°C
Power Dissipation
Note 2
600mW
S.O. Package only
TL
500mW
Lead Temperature (Soldering 10 seconds)
260°C
Notes:
1. Unless otherwise specified all voltages are referenced to ground.
2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
VCC
Supply Voltage
VIN
DC Input Voltage
VOUT
TA
t r, t f
DC Output Voltage
Operating Temperature Range
Input Rise or Fall Times
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
Min.
Max.
Units
4.5
5.5
V
0
VCC
V
0
5.5
V
–40
+85
°C
500
ns
www.fairchildsemi.com
3
MM74HCT05 — Hex Inverter (Open Drain)
Absolute Maximum Ratings(1)
TA = –40°C
to 85°C
TA = 25°C
Symbol
Parameter
Conditions
Typ.
Guaranteed Limits Units
VIH
Minimum HIGH Level Input
Voltage
2.0
2.0
V
VIL
Maximum LOW Level Input
Voltage
0.8
0.8
V
VOL
Maximum LOW
Level Voltage
0
0.1
0.1
V
VIN = VIH, |IOUT| = 4.0mA,
VCC = 4.5V
0.2
0.26
0.33
VIN = VIH, |IOUT| = 4.8mA,
VCC = 5.5V
0.2
0.26
0.33
± 0.1
± 1.0
µA
VIN = VIH, |IOUT| = 20µA
Maximum Input Current
VIN = VCC or GND,
VIH or VIL
ILKG
Maximum HIGH Level Output
Leakage Current
VIN = VIH or VIL,
VOUT = VCC
0.5
5.0
µA
ICC
Maximum Quiescent Supply
Current
VIN = VCC or GND,
IOUT = 0µA
2.0
20
µA
VIN = 2.4V or 0.5V(3)
0.3
0.4
mA
10
µA
IIN
IOHZ
Off State Current
VCC = 4.5V–5.5V, VO = 5.5V
Note:
3. This is measured per input with all other inputs held at VCC or ground.
AC Electrical Characteristics
VCC = 5V, TA = 25°C,CL = 15pF, tr = tf = 6ns unless otherwise noted.
Symbol
Parameter
Conditions
Typ.
Guaranteed
Limit
Units
tPZL
Maximum Propagation Delay
RL = 1kΩ
8
15
ns
tPLZ
Maximum Propagation Delay
RL = 1kΩ
9
16
ns
AC Electrical Characteristics
VCC = 5V, ± 10%, CL = 50pF, tr = tf = 6ns unless otherwise specified.
TA=25°C
Symbol
Parameter
Conditions
Typ.
TA = –40°C
to 85°C
Guaranteed Limits
Units
tPZL
Maximum Propagation Delay
RL = 1kΩ
10
22
28
ns
tPLZ
Maximum Propagation Delay
RL = 1kΩ
12
20
25
ns
tTHL
Maximum Output Fall Time
10
15
19
ns
CPD
Power Dissipation Capacitance
CIN
Maximum Input Capacitance
(per gate), RL = ∞,
(4)
20
5
pF
10
pF
Note:
4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f+ICC VCC, and the no load dynamic current
consumption, IS = CPD VCC f + ICC.
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
4
MM74HCT05 — Hex Inverter (Open Drain)
DC Electrical Characteristics
(VCC = 5V ± 10% unless otherwise specified)
8.75
8.50
0.65
A
7.62
14
8
B
5.60
4.00
3.80
6.00
PIN ONE
INDICATOR
1
1.70
7
0.51
0.35
1.27
0.25
(0.33)
1.75 MAX
1.50
1.25
1.27
LAND PATTERN RECOMMENDATION
M
C B A
SEE DETAIL A
0.25
0.10
C
0.25
0.19
0.10 C
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
GAGE PLANE
FLASH OR BURRS.
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
0.36
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
0.50 X 45°
0.25
R0.10
R0.10
8°
0°
0.90
0.50
(1.04)
SEATING PLANE
DETAIL A
SCALE: 20:1
Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
5
MM74HCT05 — Hex Inverter (Open Drain)
Physical Dimensions
MM74HCT05 — Hex Inverter (Open Drain)
Physical Dimensions (Continued)
Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
6
MM74HCT05 — Hex Inverter (Open Drain)
Physical Dimensions (Continued)
0.65
0.43 TYP
1.65
6.10
0.45
12.00° TOP
& BOTTOM
R0.09 min
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 1982
E. LANDPATTERN STANDARD: SOP65P640X110-14M
F. DRAWING FILE NAME: MTC14REV6
1.00
R0.09min
Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
7
MM74HCT05 — Hex Inverter (Open Drain)
Physical Dimensions (Continued)
19.56
18.80
14
8
6.60
6.09
1
7
(1.74)
8.12
7.62
1.77
1.14
3.56
3.30
0.35
0.20
5.33 MAX
0.38 MIN
3.81
3.17
0.58
0.35
8.82
2.54
NOTES: UNLESS OTHERWISE SPECIFIED
THIS PACKAGE CONFORMS TO
A) JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
DIMENSIONS ARE EXCLUSIVE OF BURRS,
C) MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5-1994
E) DRAWING FILE NAME: MKT-N14AREV7
Figure 4. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
8
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
the design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I33
©1984 Fairchild Semiconductor Corporation
MM74HCT05 Rev. 1.5.0
www.fairchildsemi.com
9
MM74HCT05 — Hex Inverter (Open Drain)
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