STMICROELECTRONICS L4989

L4989
LOW POWER VOLTAGE REGULATOR
PRODUCT PREVIEW
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OPERATING DC SUPPLY VOLTAGE RANGE
5.6V TO 31V
VERY LOW QUIESCENT CURRENT WITH
WATCHDOG DISABLED
PRECISION OUTPUT VOLTAGE (3%)
LOW-DROP VOLTAGE
(180mV typ at Io = 150mA)
RESET CIRCUIT SENSING THE OUTPUT
VOLTAGE DOWN TO 1V
PROGRAMMABLE RESET DELAY WITH
EXTERNAL CAPACITOR
WATCHDOG DISABLE INPUT
PROGRAMMABLE WATCHDOG TIMER WITH
EXTERNAL CAPACITOR
THERMAL SHUTDOWN AND SHORT
CIRCUIT PROTECTION
WIDE TEMPERATURE RANGE (Tj = -40°C TO
150°C)
SO8
SO20
ORDERING NUMBERS: L4989D (SO8)
L4989 (SO20)
BLOCK DIAGRAMt
Vs
Vo
Vi
Co
Start up
1.25V
Voltage
Reference
gnd
100mV
+
_
Wi
Vcw
Ctw
WE
Vcr
watchdog
Res
Reset
Ctr
March 2004
This is preliminary information on a new product now in development. Details are subject to change without notice.
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L4989
PIN DESCRIPTION
N. (SO8)
N. (SO20)
NAME
FUNCTION
1
1
WEn
Watchdog enable input.
If high it activates the watchdog operation.
2
4
gnd
Ground reference
5,6,15,16
gnd
Ground
Connected these pins to a heat spreader ground
3
7
Res
Reset output.
It is pulled down when output voltage goes below Vo_th or
frequency at Wi is too low.
4
10
Vcr
Reset timing adjust.
A capacitor between Vcr pin and gnd, sets the reset delay time
(trd)
5
11
Vcw
Watchdog timer adjust
A capacitor between Vcw pin and gnd, sets the time response of
the watchdog monitor.
6
14
Wi
Watchdog input.
If the frequency at this input pin is too low, the Reset output is
activated.
7
17
Vo
Voltage regulator output
Block to ground with a capacitor >100nF (needed for regulator
stability)
8
20
Vs
Supply voltage
Block to ground directly at IC pin with a ceramic capacitor
2,3,8,9,12,
13,18,19
N. C.
not connected
PIN CONNECTIONS
VEN
1
20
VS
N.C.
2
19
N.C.
N.C.
3
18
N.C.
VEN
1
8
VS
GND
2
7
VO
RES
3
6
WI
GND
4
17
VO
VCR
4
5
VCW
GND
5
16
GND
GND
6
15
GND
RES
7
14
WI
N.C.
8
13
N.C.
N.C.
9
12
N.C.
VCR
10
11
WCW
D04AT515
SO8
D04AT516
SO20
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L4989
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
-0.3 to 40
V
VVsdc
DC supply voltage
IVsdc
Input current
VVo
DC output voltage
-0.3 to 6
IVo
DC output current
internally limited
VWi
Watchdog input voltage
-0.3 to VVo + 0.3
V
Vod
Open drain output voltage (RES)
-0.3 to VVo + 0.3
V
Iod
Open drain output current (RES)
internally limited
Vcr
Reset delay voltage
-0.3 to VVo + 0.3
V
Vcw
Watchdog delay voltage
-0.3 to VVo + 0.3
V
VWEn
Watchdog enable input
-0.3 to 40
V
Junction temperature
-40 to 150
°C
±2
kV
Tj
VESD
internally limited
ESD voltage level (HBM-MIL STD 883C)
V
Note:
Maximum ratings are absolute ratings; exceeding any one of these values may cause perma-nent damage to the integrated circuit.
THERMAL DATA
Symbol
Rth-j amb
Parameter
Thermal Resistance Junction to ambient
SO8
SO12+4+4
Unit
130 to 180
50(*)
°C/W
(*) with 6 sq. cm on board heat sink
ELECTRICAL CHARACTERISTICS (Vs = 5.6V to 31V, Tj = -40°C to +150°C unless otherwise specified)
Pin
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
GENERAL
Output voltage
Vs=5.6 to 31V
Io=1 to 150mA
4.85
5.00
5.15
V
Short circuit current (1)
Vs=13.5V
160
210
250
mA
Output current limitation (1)
Vs=13.5V
170
250
290
mA
Vline
Line regulation voltage
Vs=5.6 to 31V
Io=1 to 150mA
25
mV
Vo
Vload
Load regulation voltage
Io=1 to 150mA
25
mV
Vs, Vo
Vdp
Drop voltage
Io=150mA
400
mV
Vs, Vo
SVR
Ripple rejection
fr = 100 Hz
Vs, Vo
Iqs_1
Current consumption
with watchdog not active
Iqs_1 = IVs – Io
Vs=13.5V, Io<1mA,
WEn low
Vo
Vo_ref
Vo
Ishort_13
Vo
Ilim
Vs, Vo
180
55
dB
69
115
µA
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L4989
Pin
Symbol
Parameter
Vs, Vo
Iqs_10
Current consumption
with watchdog not active
Iqs_10 = IVs – Io
Vs, Vo
Iqs_50
Vs, Vo
Iqs_150
Vs, Vo
Typ.
Max.
Unit
Vs=13.5V,
Io=10mA,
WEn low
127
300
µA
Current consumption
with watchdog not active
Iqs_50 = IVs – Io
Vs=13.5V, Io=50mA,
WEn low
498
900
µA
Current consumption
with watchdog not active
Iqs_150 = IVs – Io
Vs=13.5V, Io=150mA,
WEn low
1.40
2
mA
Iqn_1
Current consumption
with watchdog active
Iqn_1 = IVs – Io
Vs=13.5V, Io<1mA,
WEn high
110
170
µA
Vs, Vo
Iqn_10
Current consumption
with watchdog active
Iqn_10 = IVs – Io
Vs=13.5V,
Io=10mA,
WEn high
168
350
µA
Vs, Vo
Iqn_50
Current consumption
with watchdog active
Iqn_50 = IVs – Io
Vs=13.5V,
Io=50mA,
WEn high
538
1000
µA
Vs, Vo
Iqn_150
Current consumption
with watchdog active
Iqn_150 = IVs – Io
Vs=13.5V,
Io=150mA,
WEn high
1.45
2.00
mA
190
°C
Tw
Thermal protection temperature
Tw_hy
Thermal protection temperature
hysteresis
Test Condition
Min.
150
10
°C
Note: 1. see fig1 (behavior of output current versus regulated voltage Vo)
RESET
Pin
Symbol
Parameter
Test condition
min
Res
Vres_l
Reset output low voltage
Rext = 5kΩ to Vo,
Vo > 1V
Res
IRes_lkg
Reset output high leakage
current
VRes = 5V
Res
RRes
Internal Pull up resistance
versus Vo
10
Res
Vo_th
Reset threshold voltage
Vs = 5.6 to 31V Io = 1 to
150mA
Vcr
Vrhth
Reset timing low threshold
Vcr
Vrlth
Vcr
typ
max
Unit
0.4
V
1
µA
20
40
kΩ
6%
8%
10%
below
Vo_ref
Vs =13.5V
10%
13%
16%
Vo_ref
Reset timing high threshold
Vs =13.5V
44%
47%
50%
Vo_ref
Icr
Charge current
Vs =13.5V
8
15
30
µA
Vcr
Idr
Discharge current
Vs =13.5V
8
15
30
µA
Res
trr_2
Reset reaction time (2)
Vo = Vo_th - 100mV
100
250
700
µs
Res
trd
Reset delay time
Vs =13.5V, Ctr =1nF
65
115
165
ms
2. When Vo becomes lower than 4V, the reset reaction time decreases down to 2 s assuring a faster reset condition in this particular
case.
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L4989
WATCHDOG
Pin
Symbol
Parameter
Test condition
min
typ
max
Wi
Vih
Input high voltage
Vs=13.5V
Wi
Vil
Input low voltage
Vs=13.5V
Wi
Vih
Input hysteresis
Vs=13.5V
Wi
Rwi
Pull down resistor
Vs=13.5V
30
100
250
kΩ
Vcw
Vwhth
Low threshold
Vs=13.5V
10%
13%
16%
Vo_ref
Vcw
Vwlth
High threshold
Vs=13.5V
44%
47%
50%
Vo_ref
Vcw
Icwc
Charge current
Vs=13.5V, Vcw=0.1V
5
10
20
µA
Vcw
Icwd
Discharge current
Vs=13.5V, Vcw=2.5V
1.25
2.5
5
µA
Vcw
Twop
Watchdog period
Vs=13.5V, Ctw=47nF
20
40
80
ms
Res
twol
Watchdog output low time
Vs=13.5V, Ctw=47nF
4
8
16
ms
typ
max
Unit
1
V
3.5
Unit
V
1.5
500
V
mV
WEn
Pin
Symbol
Parameter
WEn
VWEn_low
WEn input low voltage
WEn
VWEn_high
WEn input high voltage
WEn
VWEn_hyst
WEn input hysteresis
WEn
RWEn
Pull down current
Test condition
min
3
Vs=13.5V
V
600
920
1300
mV
1
2.5
5
µA
VOLTAGE REGULATOR
The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure a very
low dropout voltage at current up to 150mA is obtained. The output voltage is regulated up to transient
input supply voltage of 40V. No functional interruption due to over-voltage pulses is generated.
The voltage Regulator is always active and not depending on the state of WEn input pin.
A short circuit protection to GND is provided.
Figure 1. Behavior of output current versus regulated voltage Vo
Vo
Vo_ref
Ishort Ilim
Iout
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L4989
The reset circuit monitors the output voltage Vo. If the output voltage stays lower than Vo_th for filter time
trr, then Res goes low. If the output voltage Vo becomes lower than 2.0V (typ) than Res goes immediately
low. The reset low signal is guaranteed for an output voltage Vo greater than 1V.
When the output voltage goes back higher than Vo_th then Res goes high with a delay trd. This delay is
obtained by 512 period of an oscillator. The oscillator period is given by:
( V rht h – V rlth ) ⋅ Ctr ( V rht h – V rlth ) ⋅ Ctr
Tosc = ------------------------------------------------- + ------------------------------------------------Icr
Id
trd is given by
trd = 512 x Tosc
where:
Icr = 15µA is an internally generated charge current,
Idr = 15µA is an internally generated discharge current,
Vrhth=2.35V and Vrlth=0.65V are two typ thresholds,
Ctr is an external capacitance.
The Reset is always active and not depending on the state of WEn input pin.
Figure 2. Reset Time Diagram
Wi
Vo
Vcr
Vout_th
< trr
trr
Tosc
Vrhth
Vrlth
trd = 512 Tosc
Res
Watchdog
The watchdog input Wi monitors a connected microcontroller. If pulses are missing, the Reset output
Res is set to low. The pulse sequence time can be set within a wide range with the external capacitor Ctw.
The watchdog circuit discharges the capacitor Ctw with the con-stant current Icwd. If the lower threshold
Vwlth is reached, a watchdog reset is generated.
To prevent this reset the microcontroller must generate a positive edge during the discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to calculate the minimum time tdis during
which the microcontroller must output the positive edge the fol-lowing equation can be used
(Vwhth-Vwlth) x Ctw = Icwd x tdis
Every Wi positive edge switches the current source from discharging to charging, the same happens when
the lower threshold is reached. When the voltage reaches the upper threshold Vwhth the current switches
from charging to discharging. The result is a saw toothwaveform at the watchdog timer capacitor Ctw.
The Watchdog operation is active only if WEn input pin is set to logic state high.
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L4989
Figure 3. Watchdog time diagram
Wi
Twop
Vwhth
Vcw
Vwlth
twol
Res
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L4989
mm
inch
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
A2
1.10
1.65
0.043
0.065
B
0.33
0.51
0.013
0.020
C
0.19
0.25
0.007
0.010
D (1)
4.80
5.00
0.189
0.197
E
3.80
4.00
0.15
0.157
e
1.27
0.050
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
k
ddd
Note:
OUTLINE AND
MECHANICAL DATA
0˚ (min.), 8˚ (max.)
0.10
0.004
(1) Dimensions D does not include mold flash, protrusions or gate burrs.
Mold flash, potrusions or gate burrs shall not exceed
0.15mm (.006inch) in total (both side).
SO-8
0016023 C
8/10
L4989
mm
inch
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.10
0.30
0.004
0.012
B
0.33
0.51
0.013
0.200
C
0.23
0.32
0.009
0.013
D (1)
12.60
13.00
0.496
0.512
E
7.40
7.60
0.291
0.299
e
1.27
0.050
H
10.0
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.40
1.27
0.016
0.050
k
ddd
OUTLINE AND
MECHANICAL DATA
0˚ (min.), 8˚ (max.)
0.10
0.004
(1) “D” dimension does not include mold flash, protusions or gate
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
SO20
0016022 D
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L4989
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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