INFINEON TLE4278G

5-V Low Drop Fixed Voltage Regulator
TLE 4278 G
Features
•
•
•
•
•
•
•
•
•
•
•
•
Output voltage tolerance ≤ ±2%
Very low current consumption
Separated reset and watchdog output
Low-drop voltage
Watchdog
Adjustable watchdog activating threshold
Adjustable reset threshold
Overtemperature protection
Reverse polarity protection
Short-circuit proof
Suitable for use in automotive electronics
Wide temperature range
P-DSO-14-3, -8, -9, -11, 14
Functional Description
The TLE 4278 is a monolithic integrated low-drop fixed output voltage regulator
supplying loads up to 200 mA. The IC is available in a P-DSO-14-8 package. It is
designed to supply microprocessor systems under the severe conditions of automotive
applications and therefore equipped with additional protection functions against overload, short circuit and overtemperature. The TLE 4278 can also be used in other
applications where a stabilized voltage is required.
An input voltage VI in the range of 5.5 V ≤ VI ≤ 45 V is regulated to VQ,nom = 5 V with an
accuracy of ±2%.
The device operates in the wide temperature range of Tj = -40 to 150 °C.
Two additional features are implemented in the TLE 4278 a load dependent watchdog
function as well as a sophisticated reset function including power on reset, under voltage
reset, adjustable reset delay time and adjustable reset switching threshold.
The watchdog function monitors the microcontroller, including time base failures. In case
of a missing rising edge within a certain pulse repetition time the watchdog output is set
Type
Ordering Code
Package
TLE 4278 G
Q67007-A9291
P-DSO-14-8
Data Sheet
1
Rev. 1.3, 2005-04-29
TLE 4278 G
to LOW. Programming of the max. repetition time can be done easily by an external reset
delay capacitor. To prevent a reset in case of missing pulses, the watchdog output WO
is separate from the reset output RO for the TLE 4278. The watchdog output can be
used as an interrupt signal for the microcontroller. In any case it is possible to connect
pin WO and pin RO externally.
When the controller is set to sleep mode or low power mode its current consumption
drops and no watchdog pulses are created. In order to avoid unnecessary wake-up
signals due to missing pulses at pin WI the watchdog feature can be disabled as a
function of the load current. The switch off threshold is set by an external resistor to pin
WADJ. The watchdog function can also be used as a timer, which periodically wakes up
the controller. Therefore the pin WADJ has to be connected to the output Q.
The power on reset feature is necessary for a defined start of the microprocessor when
switching on the application. The reset signal at pin RO goes high after a certain delay
timed trd when the output voltage of the regulator has surpassed the reset threshold. The
delay time is set by the external delay capacitor. An under voltage reset circuit
supervises the output voltage. In case VQ falls below the reset threshold the reset output
is set to LOW after a short reset reaction time trr. The reset LOW signal is generated
down to an output voltage VQ of 1 V. In addition the reset switching threshold can be
adjusted by an external voltage divider. This feature is useful with microprocessors
which guarantee a safe operation down to voltages below the internally set reset
threshold of 4.65 V typical.
Data Sheet
2
Rev. 1.3, 2005-04-29
TLE 4278 G
P-DSO-14-8
WO
WADJ
GND
GND
GND
D
RADJ
1
2
3
4
5
6
7
14
13
12
11
10
9
8
RO
VΙ
GND
GND
GND
VQ
WΙ
AEP02113
Figure 1
Pin Configuration (top view)
Table 1
Pin Definitions and Functions
Pin
Symbol Function
1
WO
Watchdog Output; the open collector output is connected to the
5 V output via an integrated resistor of 30 kΩ.
2
WADJ
Watchdog Adjust; an external resistor to GND determines the
watchdog activating threshold.
3, 4, 5,
GND
10, 11, 12
Ground
6
D
Reset Delay; connect a capacitor to ground for delay time
adjustment.
7
RADJ
Reset Switching Threshold Adjust; for setting the switching
threshold, connect a voltage divider from output to ground. If this
input is connected to ground, the reset is triggered at the internal
threshold.
8
WI
Watchdog Input; rising edge-triggered input for monitoring a
microcontroller.
9
Q
5 V Output Voltage; block to ground with min. 10 µF capacitor,
ESR ≤ 5 Ω.
13
I
Input Voltage; block to ground directly on the IC with ceramic
capacitor.
14
RO
Reset Output; the open collector output is connected to the 5 V
output via an integrated resistor of 30 kΩ.
Data Sheet
3
Rev. 1.3, 2005-04-29
TLE 4278 G
VΙ
13
9
Temperature
Sensor
Protection
Circuit
14
VQ
RO
Reset
Generator
+
-
Control
Amplifier
7
1
Bandgap
Reference
Watchdog
2
3-5, 10-12
WADJ
GND
Figure 2
Data Sheet
6
RADJ
WO
D
8
WΙ
AEB02114
Block Diagram
4
Rev. 1.3, 2005-04-29
TLE 4278 G
Table 2
Absolute Maximum Ratings
Tj = -40 to 150 °C
Parameter
Symbol
Limit Values
Unit
Notes
Min.
Max.
VI
II
-42
45
V
–
–
–
mA
Internally limited
VQ
IQ
-1
25
V
–
–
–
mA
Internally limited
VRO
IRO
-0.3
25
V
–
-5
5
mA
–
VD
ID
-0.3
7
V
–
-2
2
mA
–
Input Voltage I
Voltage
Current
Output Voltage Q
Voltage
Current
Reset Output RO
Voltage
Current
Reset Delay D
Voltage
Current
Reset Switching Threshold Adjust RADJ
Voltage
Current
VRADJ
IRADJ
-0.3
7
V
–
–
–
mA
Internally limited
VWI
IWI
-0.3
7
V
–
–
–
mA
Internally limited
VWO
IWO
-0.3
25
V
–
-5
5
mA
–
VWADJ
IWADJ
-0.3
7
V
–
–
–
mA
Internally limited
IGND
-100
50
mA
–
Watchdog Input WI
Voltage
Current
Watchdog Output WO
Voltage
Current
Watchdog Adjust WADJ
Voltage
Current
Ground GND
Current
Data Sheet
5
Rev. 1.3, 2005-04-29
TLE 4278 G
Table 2
Absolute Maximum Ratings (cont’d)
Tj = -40 to 150 °C
Parameter
Symbol
Limit Values
Unit
Notes
Min.
Max.
-50
150
°C
–
-50
150
°C
–
Temperatures
Junction temperature
Storage temperature
Tj
Tstg
Note: ESD protection according to MIL Std. 883: ±2 kV.
Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Table 3
Operating Range
Parameter
Input voltage
Junction temperature
Symbol
Limit Values
Unit
Notes
Min.
Max.
VI
Tj
5.5
45
V
–
-40
150
°C
–
Rthj-a
Rthj-pin
–
80
K/W
1)
–
30
K/W
Thermal Resistance
Junction ambient
Junction pin
Measured to pin 4
1) Package mounted on PCB 80 × 80 × 1.5 mm ; 35µ Cu; 5µ Sn; Heat Sink Area 6 cm ; zero airflow.
3
2
Note: In the operating range the functions given in the circuit description are fulfilled.
Data Sheet
6
Rev. 1.3, 2005-04-29
TLE 4278 G
Table 4
Electrical Characteristics
VI = 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified)
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit Test Condition
Output voltage
VQ
4.90
5.00
5.10
V
0 mA ≤ IQ ≤ 150 mA;
6 V ≤ VI ≤ 28 V
Output voltage
VQ
4.8
5.0
5.2
V
1 mA ≤ IQ ≤ 50 mA;
28 V ≤ VI ≤ 45 V
200
400
–
mA
Output current limiting IQ
Current consumption
Iq = II - IQ
Iq,o
–
180
200
µA
Current consumption
Iq = II - IQ
Iq,o
–
210
230
µA
Current consumption
Iq = II - IQ
Iq,150
–
5
12
mA
VQ = 4.8 V
Tj = 25 °C;
IQ = 0 mA
IQ = 0 mA;
Tj = 85 °C
IQ = 150 mA
Drop voltage
VDR = VI - VQ
Vdr
–
0.25
0.5
V
IQ = 150 mA1)
Load regulation
∆VQ.lo
-30
-5
–
mV
Line regulation
∆VQ,li
–
5
20
mV
IQ = 5 to 150 mA;
VI = 6 V
VI = 6 to 28 V
IQ = 5 mA
4.5
4.65
4.8
V
RADJ connected to GND
180
350
–
mV
IQ = 10 mA
1.28
1.35
1.45
V
–
0.20
0.40
V
VQ ≥ 3.5 V
Rext = 10 kΩ to VQ
VQ ≥ 1 V
4.5
–
–
V
–
20
30
45
kΩ
Internal connected to VQ
2
5
8
µA
VD = 1.0 V
Reset Generator
VQ,rt
Reset headroom
∆VQ,rt =
(VQ,nom VQ,rt)
Reset adjust threshold VRADJ,th
Reset low voltage
VRO,l
Reset threshold
Reset high voltage
Reset pull-up
Charging current
Data Sheet
VRO,h
RRO
ID,c
7
Rev. 1.3, 2005-04-29
TLE 4278 G
Table 4
Electrical Characteristics (cont’d)
VI = 13.5 V; -40 °C ≤ Tj ≤ 125 °C (unless otherwise specified)
Parameter
Symbol
Upper timing threshold VDU
Limit Values
Unit Test Condition
Min.
Typ.
Max.
1.5
1.9
2.3
V
–
Lower reset timing
threshold
VDRL
0.2
0.3
0.4
V
–
Delay time
trd
trr
12
20
28
ms
0.4
1.0
2.0
µs
CD = 47 nF
CD = 47 nF
1.28
1.35
1.45
V
Voltage at WADJ
650
720
800
–
IQ ≤ 10 mA
5
–
–
V/µs From 20% up to 80% VQ
–
0.2
0.4
V
Rext > 10 kΩ to VQ
4.5
–
–
V
–
20
30
45
kΩ
Internal connected to VQ
2
5
8
µA
0.6
1.3
2.0
µA
VD = 1.0 V
VD = 1.0 V
1.5
1.9
2.3
V
–
0.5
0.7
0.9
V
–
Reset reaction time
Watchdog
VWADJ,th
Current ratio
IQ/IWADJ
Slew rate
dVWI/dt
Watchdog low voltage VWOL
Watchdog high voltage VWOH
Watchdog pull-up
RWO
Charge current
ID,wc
Discharge current
ID,wd
Upper timing threshold VDU
Lower watchdog
VDWL
Activating threshold
timing threshold
Watchdog output
pulse period
TWD,p
42
60
80
ms
Cd = 47 nF
Watchdog output low
time
tWD,l
7
13
19
ms
VQ > VRT
35
47
61
ms
Cd = 47 nF
Watchdog trigger time TWI,tr
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value.
Data Sheet
8
Rev. 1.3, 2005-04-29
TLE 4278 G
ΙΙ
C Ι1
1000 µF
Ι WO
VΙ
WO
VΙ
WΙ
VWADJ
9
VQ
ΙQ
C Ι2
470 nF
Ι WADJ WADJ
VWO
13
VW
VD
CQ
10 µF
TLE 4278 G
1
2
8
3-5,
10-12
GND
6
D
CD
47 nF
Ι GND
RO
14
7
RADJ
Ι RO
VQ
VRO
VRE
AES02115
VDR = VΙ -VO Outside the control range
Figure 3
Data Sheet
Test Circuit
9
Rev. 1.3, 2005-04-29
TLE 4278 G
Application Information
Input, Output
The input capacitors CI1 and CI2 are necessary for compensating line influences. Using
a resistor of approx. 1 Ω in series with CI1, the LC circuit of input inductance and input
capacitance can be damped. To stabilize the regulation circuit the output capacitor CQ is
necessary. Stability is guaranteed at values CQ ≥ 10 µF with an ESR ≤ 5 Ω within the
operating temperature range.
VΙ
+12 V
C Ι1
CΙ2
13
9
VQ
470 nF
1
TLE 4278G
14
8
3-5,
10-12
GND
6
D
WO
R1
CQ
22 µF
RO
WΙ
RADJ
7
2
WADJ
µP
*)
Cooling
Area
CD
47 nF
R WADJ
R2
*) or short to GND
for internal threshold
Figure 4
Data Sheet
AES02116
Application Circuit
10
Rev. 1.3, 2005-04-29
TLE 4278 G
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
CD which can be calculated as follows:
CD = (∆trd × ID,c)/∆V
(1)
Definitions:
CD = delay capacitor
∆trd = delay time
ID,c = charge current, typical 5 µA
∆V = VDU, typical 1.9 V
VDU = upper delay switching threshold at CD for reset delay time
The reset reaction time trr is the time it takes the voltage regulator to set the reset out
•
•
•
•
•
LOW after the output voltage has dropped below the reset threshold. It is typically 1 µs
for delay capacitor of 47 nF. For other values for CD the reaction time can be estimated
using Equation (2):
trr ≈ 20 s/F × CD
(2)
VΙ
t
< t rr
VQ
V Q, rt
d V Ι D,c
=
dt
CD
VD
t
V DU
V DRL
VRO
t rr
t rd
t
t
Power-on-Reset
Figure 5
Data Sheet
Thermal
Shutdown
Voltage Dip
at Input
Undervoltage
Secondary
Spike
Overload
at Output
AED03010
Reset Timing (watchdog disabled)
11
Rev. 1.3, 2005-04-29
TLE 4278 G
Reset Switching Threshold
The present default value is 4.65 V. When using the TLE 4278 the reset threshold can
be set to 3.5 V < VQ,rt < 4.6 V by connecting an external voltage divider to pin RADJ. The
calculation can be easily done since the reset adjust input current can be neglected. If
this feature is not needed, the pin has to be connected to GND.
VQ,rt = Vref × (1 + R1/R2)
(3)
Definitions:
•
•
VQ,rt = Reset threshold
Vref = comparator reference voltage, typical 1.35 V
(Reset adjust input current ≈ 50 nA)
TLE 4278 G
Ι
13
9
Q
30 kΩ
14
RO
Band-GapReference
Band-GapReference
1.35 V
1.35 V
>1
+
-
R1
7
3 ... 5,
RADJ
10 ... 12
GND
R2
AES03071
Figure 6
The reset output pin is internally connected to the 5 V output Q via a 30 kΩ pull-up
resistor. Down to an output voltage VQ of typical 1 V the reset LOW signal at pin RO is
generated.
For the timing of the reset feature please refer to Figure 5.
Data Sheet
12
Rev. 1.3, 2005-04-29
TLE 4278 G
Watchdog Activating
The calculation of the external resistor which adjusts the watchdog switch off threshold
can be done by Equation (4):
RWADJ = VWADJ,th × (IQ/IWADJ)/IQ,act
(4)
Definitions:
•
•
•
VWADJ,th = switch off threshold, typical 1.35 V
IQ/IWADJ = current ratio, typical 720
IQ,act = switch off load current
TLE 4278 G
Ι
Q
Band-GapReference
HIGH
+
-
WADJ
Watchdog
active
LOW
Watchdog
disabled
R WADJ
GND
AES03072
Figure 7
Data Sheet
13
Rev. 1.3, 2005-04-29
TLE 4278 G
Watchdog Timing
The frequency of the watchdog pulses has to be higher than the minimum pulse
sequence which is set by the external reset delay capacitor CD. Calculation can be done
according to the formulas given in Figure 8.
The watchdog output is internally connected to the output Q via a 30 kΩ pull-up resistor.
To generate a watchdog created reset signal for the microcontroller the pin WO can be
connected to the reset input of the microcontroller. It is also allowed to parallel the
watchdog out to the reset out.
VW Ι
t
VΙ
VQ
t
T WD, p
VD
t
T WI, tr
VDU
VDWL
VWO
T WI, tr =
t WD, L
(VDU - VDWL )
Ι D, wd
C D ; T WD, p =
(VDU -VDWL ) (Ι D, wc + Ι D, wd )
Ι D, wc x Ι D, wd
C D ; t WD, L =
t
(VDU - VDWL )
Ι D, wc
t
CD
AED03099
Figure 8
Data Sheet
Timing of the Watchdog Function
14
Rev. 1.3, 2005-04-29
TLE 4278 G
Table 5
Hints for Unused Pins
Symbol
Function
Connect to
RO
Reset output
open
D
Reset delay
open or to output Q
RADJ
Reset switching threshold adjust
GND
WI
Watchdog input
GND
WO
Watchdog output
open
WADJ
Watchdog adjust
1)
Data Sheet
to output Q via a 270 kΩ resistor:
Watchdog always active
2)
to GND: Watchdog disabled
15
Rev. 1.3, 2005-04-29
TLE 4278 G
Drop Voltage Vdr versus
Output Current IQ
Current Consumption Iq
versus Output Current IQ
TL E42 7 8_ IQ -IQ .VSD
AED01544
mV
I q [mA]
V dr
700
V I = 13.5V
T j = 25°C
10
600
500
1
400
Tj = 125 C
300
Tj = 25 C
0.1
200
100
0
0
50
100
150
200
250
0.01
0.1
mA
1
10
100
ΙQ
IQ [mA]
Current Consumption Iq
versus Input Voltage VI
Output Voltage VQ
versus Input Voltage VI
AED01546
12
Iq mA
VQ
Tj = 25 ˚C
10
10
8
8
6
AED01547
mA
6
R L= 33 Ω
R L= 33 Ω
4
4
R L= 50 Ω
2
0
2
R L= 100 Ω
0
10
20
30
0
40 V 50
VI
Data Sheet
0
2
4
6
8
V
VΙ
16
Rev. 1.3, 2005-04-29
TLE 4278 G
Charge Current ID,wc and Discharge
Current ID,wd versus Temperature Tj
Ι
Switching Voltage VDU, VDWL and VDRL
versus Temperature Tj
AED03111
8
µA
VD
VΙ = 13.5 V
VD = 1.0 V
7
V Ι = 13.5 V
2.4
6
Ι D, wc
5
2.0
4
1.6
3
1.2
2
Ι D, wd
1
0
-40
AED03055
3.2
V
2.8
0
40
80
120
V DU
0.8
V DWL
0.4
V DRL
0
-40
C
0
40
80
Tj
Tj
Output Voltage VQ versus
Temperature Tj
VQ
Output Current Limit IQ versus
Input Voltage VI
AED03056
5.2
120 ˚C 160
AED03057
500
IQ
V
5.1
Tj = 25 ˚C
mA
400
VΙ = 13.5 V
5.0
300
4.9
200
4.8
100
4.7
4.6
-40
0
0
40
80
120 ˚C 160
10
20
30
40 V 50
VI
Tj
Data Sheet
0
17
Rev. 1.3, 2005-04-29
TLE 4278 G
Package Outlines
-0.01
0.2 +0.05
1.27
0.41 +0.1
-0.06
0.2 M
14
0.1
A C 14x
C
8˚ MAX.
4 -0.2 1)
1.75 MAX.
0.1 MIN.
(1.5)
0.33 ±0.08 x 45˚
0.64 ±0.25
6
±0.2
8
1
7
1)
8.75 -0.2
A
Index Marking
1)
Does not include plastic or metal protrusion of 0.15 max. per side
GPS09033
Figure 9
P-DSO-14-8 (Plastic Dual Small Outline)
Revision History
Version
Date
Changes
Rev. 1.2
2004-01-01
Final Data Sheet
Rev. 1.3
2005-04-29
* Typ. Perf. Char. Graph “Iq vs. IQ”: Replaced by a logarithmic
graph in order to precise at low IQ.
* Order number typo corrected
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
Data Sheet
18
Rev. 1.3, 2005-04-29
Edition 2005-04-29
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
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characteristics.
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We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices please contact your nearest
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