FXLP34 Single Bit Uni-Directional Translator Features Description 1.0V to 3.6V VCC Supply Voltage 4.6V Tolerant Inputs and Outputs The FXLP34 is a single translator with two separate supply voltages: VCC1 for input translation voltages and VCC for output translation voltages. The FXLP34 is part of Fairchild’s Ultra Low Power (ULP) series of products. This device operates with VCC values from 1.0V to 3.6V, and is intended for use in portable applications that require ultra low power consumption. Converts Any Voltage (1.0V to 3.6V) to (1.0V to 3.6V) tPD: - 4ns Typical for 3.0V to 3.6V VCC Power-Off High Impedance Inputs and Outputs Uses Proprietary Quiet Series™ Noise / EMI Reduction Circuitry Ultra-Small Micropak™ Leadless Packages Static Drive (IOH/IOL): - ±2.6mA at 3.00V VCC The internal circuit is composed of a minimum of buffer stages, to enable ultra low dynamic power. The FXLP34 is uniquely designed for optimized power and speed, and is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. Ultra-Low Dynamic Power Ordering Information Part Number Top Mark Package Packing Method FXLP34P5X X34 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on Tape & Reel FXLP34L6X X3 6-Lead MicroPak™, 1.00mm Wide 5000 Units on Tape & Reel FXLP34FHX X3 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch 5000 Units on Tape & Reel Micropak™ and Quiet Series™ are trademarks of Fairchild Semiconductor Corporation. © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com FXLP34 — Single Bit Uni-Directional Translator March 2011 FXLP34 — Single Bit Uni-Directional Translator Pin Configuration Figure 1. SC70 (Top View) Figure 2. MicroPak™ (Top Through View) Pin Definitions Pin # SC70 Pin # MicroPak™ Name 1 1 VCC1 2 2 A 3 3 GND Ground 4 4 Y Output 5 NC No Connect 6 VCC Output Translation Voltage 5 Description Input Translation Voltage Input Truth Table Inputs Outputs A Y L L H H H = Logic Level HIGH L = Logic Level Low © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC, VCC1 VIN Parameter Min. Max. Unit -0.5 +4.6 V -0.5 +4.6 V HIGH or LOW State -0.5 VCC +0.5V VCC=0V -0.5 +4.6 Supply Voltage DC Input Voltage (1) VOUT DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IOH/IOL ICC or IGND TSTG PD VIN < 0 -50 VOUT < 0V -50 VOUT > VCC +50 mA mA DC Output Source/Sink Current ±50 mA DC VCC or Ground Current per Supply Pin ±100 mA 150 °C Storage Temperature Range Power Dissipation at +85°C -65 SC70-6 180 MicroPak™-6 130 MicroPak2™-6 ESD V mW FXLP34 — Single Bit Uni-Directional Translator Absolute Maximum Ratings 120 Human Body Model, JEDEC:JESD22-A114 4000 Charge Device Model, JEDEC:JESD22-C101 2000 V Note: 1. IO Absolute Maximum Rating must be observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC, VCC1 VIN VOUT IOH/IOL TA JA Parameter Conditions Min. Max. Unit 1.0 3.6 V 0 3.6 V HIGH or LOW State 0 VCC VCC=0V 0 3.6 Supply Voltage Input Voltage Output Voltage Output Current in IOH/IOL VCC=3.0 to 3.6V ±2.6 VCC=2.3 to 2.7V ±2.1 VCC=1.65 to 1.95V ±1.5 VCC=1.40 to 1.60V ±1.0 VCC=1.10 to 1.30V ±0.5 VCC=1.0V ±20 µA +85 °C Operating Temperature, Free Air Thermal Resistance V -40 SC70-6 425 MicroPak™-6 500 MicroPak2™-6 560 mA °C/W Note: 2. Unused inputs must be held HIGH or LOW. They may not float. © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 3 Symbol Parameter Condition VIH VIL HIGH Level Input (VCC1) 1.0 to 3.6 LOW Level Input 1.0 to 3.6 VCC1 (V) Max. Min. 1.0 0.65 x VCCI 0.65 x VCCI 1.10VCC11.30 0.65 x VCCI 0.65 x VCCI 1.40VCC11.60 0.65 x VCCI 0.65 x VCCI 1.65VCC11.95 0.65 x VCCI 0.65 x VCCI 2.30VCC12.70 1.6 1.6 3.00VCC13.60 2.1 2.1 0.35 x VCCI 1.10VCC11.30 0.35 x VCCI 0.35 x VCCI 1.40VCC11.60 0.35 x VCCI 0.35 x VCCI 1.65VCC11.95 0.35 x VCCI 0.35 x VCCI 2.30VCC12.70 0.7 0.7 3.00VCC13.60 0.9 0.9 VCC-0.1 VCC-0.1 VCC-0.1 VCC-0.1 VCC-0.1 VCC-0.1 2.30VCC12.70 VCC-0.1 VCC-0.1 3.00VCC13.60 VCC-0.1 VCC-0.1 IOH=-0.5mA 1.10VCC11.30 0.75 x VCC 0.70 x VCC IOH=-1.0mA 1.40VCC11.60 1.07 0.99 IOH=-1.5mA 1.65VCC11.95 1.24 1.22 IOH=-2.1mA 2.30VCC12.70 1.95 1.87 IOH=-2.6mA 3.00VCC13.60 2.61 2.55 1.65VCC11.95 V 0.35 x VCCI VCC-0.1 1.40VCC11.60 1.0 to 3.6 1.0 to 3.6 1.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 1.0 to 3.6 1.65VCC11.95 V V 1.10VCC11.30 1.40VCC11.60 Unit Max. 1.0 VCC-0.1 HIGH Level Output (VCC) LOW Level Output Min. TA=-40 to +85°C 1.0 IOL=20µA VOL TA=+25°C 1.10VCC11.30 IOH=-20µA VOH VCC (V) 2.30VCC12.70 0.1 0.1 IOL=0.5mA 1.10VCC11.30 0.30 x VCC 0.30 x VCC IOL=1.0mA 1.40VCC11.60 0.31 0.37 IOL=1.5mA 1.65VCC1 1.95 0.31 0.35 IOL=2.1mA 2.30VCC12.70 0.31 0.33 IOL=2.6mA 3.00VCC13.60 0.31 0.33 1.0 to 3.6 ±0.1 ±1.0 µA 0 0 1.0 5.0 µA 1.0 to 3.6 1.0 to 3.6 0.9 5.0 µA IIN Input Leakage Current 0 VIN 3.60 IOFF Power Off Leakage Current 0 (VIN, VO) 3.60 ICC Quiescent Supply Current VIN=VCC or GND 1.0 to 3.6 FXLP34 — Single Bit Uni-Directional Translator Electrical Characteristics V Continued on the following page… © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 4 Symbol Parameter Condition VCC1 (V) TA=+25°C Min. Typ. 1.10 to 1.30 15.0 Max. Min. Max. 25.0 38.1 12.0 43.3 1.40 to 1.60 1.65 to 1.95 14.0 24.0 36.7 11.0 42.0 13.0 23.0 36.0 10.0 41.4 2.30 to 2.70 12.0 22.0 35.5 9.0 40.9 3.00 to 3.60 11.0 21.0 35.5 8.0 40.6 1.0 tPHL, tPLH Propagation Delay Output Translation VCC(V)=1.0 CL=10pF, RL=1M tPHL, tPLH CL=10pF, RL=1M tPHL, tPLH CL=10pF, RL=1M 1.10 to 1.30 8.0 15.0 23.2 6.0 41.0 1.40 to 1.60 7.5 14.0 21.7 5.5 39.1 1.65 to 1.95 7.0 13.0 20.9 5.0 32.3 2.30 to 2.70 6.5 12.0 20.4 4.5 29.6 3.00 to 3.60 6.0 tPHL, tPLH CL=10pF, RL=1M 12.0 20.2 4.0 29.4 1.10 to 1.30 5.0 11.0 16.3 4.0 20.6 1.40 to 1.60 4.8 10.0 14.8 3.5 19.3 1.65 to 1.95 4.5 9.0 14.1 3.0 18.7 2.30 to 2.70 4.0 8.0 13.5 2.5 18.0 3.00 to 3.60 3.5 8.0 13.3 2.0 tPHL, tPLH CL=10pF, RL=1M 17.8 1.10 to 1.30 4.0 9.0 13.5 3.0 17.5 1.40 to 1.60 3.5 8.0 12.0 2.5 16.3 1.65 to 1.95 3.0 7.0 11.3 2.0 15.6 2.30 to 2.70 2.5 6.0 10.7 1.5 15.0 3.00 to 3.60 2.5 6.0 10.5 1.0 14.7 tPHL, tPLH CL=10pF, RL=1M ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 12.0 1.10 to 1.30 3.0 7.0 10.9 2.5 14.3 1.40 to 1.60 2.5 6.0 9.4 2.0 13.1 1.65 to 1.95 2.0 5.0 8.6 1.5 11.4 2.30 to 2.70 1.5 4.0 8.0 1.0 10.8 3.00 to 3.60 1.5 4.0 7.8 1.0 10.5 1.0 Propagation Delay Output Translation VCC(V)=3.3 Figure 3, Figure 4 13.0 1.0 Propagation Delay Output Translation VCC(V)=2.5 ns 14.0 1.0 Propagation Delay Output Translation VCC(V)=1.8 Figure 18.0 1.0 Propagation Delay Output Translation VCC(V)=1.5 Unit 26.0 1.0 Propagation Delay Output Translation VCC(V)=1.2 TA=-40 to +85°C FXLP34 — Single Bit Uni-Directional Translator AC Electrical Characteristics 11.0 1.10 to 1.30 3.0 6.0 10.1 2.0 13.8 1.40 to 1.60 2.5 5.0 8.2 1.5 10.5 1.65 to 1.95 2.0 4.0 7.4 1.0 9.9 2.30 to 2.70 1.0 3.0 6.8 1.0 9.2 3.00 to 3.60 1.0 3.0 6.6 1.0 9.0 Continued on the following page… © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 5 Symbol Parameter Condition VCC1 (V) TA=+25°C Min. Typ. 1.10 to 1.30 16.0 Max. Min. Max. 27.0 43.0 12.0 44.8 1.40 to 1.60 1.65 to 1.95 15.0 26.0 41.6 11.0 43.6 14.0 25.0 40.9 10.0 47.9 2.30 to 2.70 13.0 24.0 40.5 9.0 47.5 3.00 to 3.60 12.0 23.0 40.4 8.0 41.4 1.0 tPHL, tPLH Propagation Delay Output Translation VCC(V)=1.0 CL=15pF, RL=1M tPHL, tPLH CL=15pF, RL=1M tPHL, tPLH CL=15pF, RL=1M 1.10 to 1.30 9.0 16.0 24.6 8.0 43.1 1.40 to 1.60 8.5 15.0 23.1 7.5 42.2 1.65 to 1.95 8.0 14.0 22.4 7.0 31.4 2.30 to 2.70 7.5 13.0 21.8 6.5 30.7 3.00 to 3.60 7.0 tPHL, tPLH CL=15pF, RL=1M 13.0 21.6 6.0 30.5 1.10 to 1.30 6.0 12.0 17.2 5.5 21.5 1.40 to 1.60 5.8 11.0 15.7 5.0 20.3 1.65 to 1.95 5.5 10.0 14.9 4.5 19.6 2.30 to 2.70 5.0 9.0 14.3 4.0 18.9 3.00 to 3.60 4.5 .0 14.2 3.5 tPHL, tPLH CL=15pF, RL=1M 18.7 1.10 to 1.30 5.0 8.0 14.2 5.5 18.2 1.40 to 1.60 4.5 7.0 12.7 4.0 17.0 1.65 to 1.95 4.0 6.0 11.9 3.5 16.3 2.30 to 2.70 3.5 5.0 11.3 3.0 15.7 3.00 to 3.60 3.5 5.0 11.2 2.5 14.4 tPHL, tPLH CL=15pF, RL=1M ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 12.0 1.10 to 1.30 4.0 7.0 11.3 3.5 14.9 1.40 to 1.60 3.5 6.0 9.8 3.0 13.6 1.65 to 1.95 3.0 5.0 9.1 2.5 12.0 2.30 to 2.70 2.5 4.0 8.5 2.0 11.3 3.00 to 3.60 2.5 4.0 8.3 2.0 11.1 1.0 Propagation Delay Output Translation VCC(V)=3.3 Figure 3, Figure 4 14.0 1.0 Propagation Delay Output Translation VCC(V)=2.5 ns 15.0 1.0 Propagation Delay Output Translation VCC(V)=1.8 Figure 19.0 1.0 Propagation Delay Output Translation VCC(V)=1.5 Unit 28.0 1.0 Propagation Delay Output Translation VCC(V)=1.2 TA=-40 to +85°C FXLP34 — Single Bit Uni-Directional Translator AC Electrical Characteristics (Continued) 11.0 1.10 to 1.30 3.0 6.0 10.5 2.0 14.2 1.40 to 1.60 2.5 5.0 8.6 1.5 11.0 1.65 to 1.95 2.0 4.0 7.8 1.0 10.3 2.30 to 2.70 1.5 3.0 7.2 1.0 9.7 3.00 to 3.60 1.5 3.0 7.0 1.0 9.4 Continued on the following page… © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 6 Symbol Parameter Condition VCC1 (V) TA=+25°C Min. Typ. 1.10 to 1.30 19.0 Max. Min. Max. 32.0 48.6 15.0 55.5 1.40 to 1.60 1.65 to 1.95 18.0 31.0 47.1 14.0 52.3 17.0 30.0 46.4 13.0 50.6 2.30 to 2.70 16.0 29.0 45.9 12.0 49.2 3.00 to 3.60 15.0 28.0 45.8 10.0 49.1 1.0 tPHL, tPLH Propagation Delay Output Translation VCC(V)=1.0 CL=30pF, RL=1M tPHL, tPLH CL=30pF, RL=1M tPHL, tPLH CL=30pF, RL=1M 1.10 to 1.30 11.0 19.0 29.0 10.0 46.5 1.40 to 1.60 10.0 18.0 27.5 9.0 42.6 1.65 to 1.95 9.0 17.0 26.7 8.0 36.7 2.30 to 2.70 8.5 16.0 26.1 7.0 36.0 3.00 to 3.60 8.0 tPHL, tPLH CL=30pF, RL=1M 16.0 26.0 6.0 35.9 1.10 to 1.30 6.0 13.0 19.8 5.5 25.3 1.40 to 1.60 5.8 12.0 18.3 5.0 23.0 1.65 to 1.95 5.5 11.0 17.6 4.5 22.4 2.30 to 2.70 5.0 10.0 17.0 4.0 21.7 3.00 to 3.60 4.5 9.0 16.8 3.5 tPHL, tPLH CL=30pF, RL=1M 21.5 1.10 to 1.30 5.0 11.0 16.2 5.5 20.4 1.40 to 1.60 4.5 10.0 14.7 4.0 19.2 1.65 to 1.95 4.0 9.0 13.9 3.5 18.5 2.30 to 2.70 3.5 8.0 13.3 3.0 17.9 3.00 to 3.60 3.5 8.0 13.1 2.5 17.6 tPHL, tPLH CL=30pF, RL=1M ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 ns Figure 3, Figure 4 13.0 1.10 to 1.30 4.0 8.0 12.7 3.5 15.9 1.40 to 1.60 3.5 7.0 11.2 3.0 14.3 1.65 to 1.95 3.0 6.0 10.5 2.5 13.6 2.30 to 2.70 2.5 5.0 9.9 2.0 12.8 3.00 to 3.60 2.5 5.0 9.7 2.0 12.5 1.0 Propagation Delay Output Translation VCC(V)=3.3 Figure 3, Figure 4 15.0 1.0 Propagation Delay Output Translation VCC(V)=2.5 ns 16.0 1.0 Propagation Delay Output Translation VCC(V)=1.8 Figure 22.0 1.0 Propagation Delay Output Translation VCC(V)=1.5 Unit 34.0 1.0 Propagation Delay Output Translation VCC(V)=1.2 TA=-40 to +85°C FXLP34 — Single Bit Uni-Directional Translator AC Electrical Characteristics (Continued) 12.0 1.10 to 1.30 3.0 8.0 11.7 2.0 15.0 1.40 to 1.60 2.5 7.0 9.8 1.5 12.2 1.65 to 1.95 2.0 6.0 8.9 1.0 11.5 2.30 to 2.70 1.5 5.0 8.3 1.0 10.7 3.00 to 3.60 1.5 5.0 8.1 1.0 10.4 Capacitance Symbol CIN Parameter Conditions VCC / VCC1 (V) Input Capacitance CI/O Input/Output Capacitance CPD Power Dissipation Capacitance © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 VI=0V or VCC1, f=10MHz, VCC / VCC1=3.6V 1.0 to 3.60 TA=+25°C Units Typical 2 pF 4 pF 8 pF www.fairchildsemi.com 7 all inputs and the input VCC1 are powered at the same time. The output VCC can then be powered to the target voltage level to which the device will translate. The output pin(s) then translate to logic levels dictated by the output VCC levels. To ensure that the system does not experience unnecessary ICC current draw, bus contention, or oscillations during power-up; adhere to the following guidelines. This device is designed with the output pin(s) supplied by VCC and the input pin(s) supplied by VCC1. The first recommendation is to begin by powering up the input side of the device with VCC1. The Input pin(s) should be ramped with or ahead of VCC1 or held LOW. This guards against bus contentions and oscillations as Upon completion of these steps, the device can be configured for the desired operation. Following these steps helps prevent possible damage to the translator device as well as other system components. AC Loadings and Waveforms FXLP34 — Single Bit Uni-Directional Translator Translator Power-up Sequence Recommendations Figure 3. AC Test Circuit Figure 4. Waveform for Inverting and Non-Inverting Functions Table 1. Symbol AC Load Table VCC 3.3V ±0.3V 2.5V ±0.2V 1.8V ±0.15V 1.5V ±0.10V 1.2V ±0.10V 1.0V Vmi 1.5V VCC1/2 VCC1/2 VCC1/2 VCC1/2 VCC1/2 Vmo 1.5V VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 8 FXLP34 — Single Bit Uni-Directional Translator Physical Dimensions Figure 5. 5-Lead, SC70, EIAJ SC-88a, 1.25mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf. Package Designator P5X © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 9 FXLP34 — Single Bit Uni-Directional Translator Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.254) (0.49) 5X 1.00 (0.75) PIN 1 IDENTIFIER 5 (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X 0.25 0.15 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X BOTTOM VIEW DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER (0.13) 4X Notes: 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 4. FILENAME AND REVISION: MAC06AREV4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. Figure 6. 6-Lead, MicroPak™, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator L6X © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 10 FXLP34 — Single Bit Uni-Directional Translator Physical Dimensions 0.89 0.35 0.05 C 1.00 2X B A 5X 0.40 PIN 1 MIN 250uM 0.66 1.00 1X 0.45 6X 0.19 0.05 C TOP VIEW RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 2X 0.90 0.05 C 0.35 0.55MAX C 5X 0.52 SIDE VIEW 0.73 (0.08) 4X 1 DETAIL A 2 1X 0.57 0.09 0.19 6X 3 0.20 6X ALTERNATIVE LAND PATTERN FOR UNIVERSAL APPLICATION (0.05) 6X 5X 0.35 0.25 6 5 4 0.35 0.60 (0.08) 4X 0.10 .05 C C B A 0.40 0.30 BOTTOM VIEW NOTES: A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REVISION: MGF06AREV3 Figure 7. 0.075X45° CHAMFER DETAIL A PIN 1 LEAD SCALE: 2X 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf. Package Designator FHX © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 11 FXLP34 — Single Bit Uni-Directional Translator © 2006 Fairchild Semiconductor Corporation FXLP34 • Rev. 1.0.4 www.fairchildsemi.com 12