M54HC113 M74HC113 DUAL J-K FLIP FLOP WITH PRESET . . . . . . . . HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS113 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC113F1R M74HC113M1R M74HC113B1R M74HC113C1R DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This circuit offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will function as shown in the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTIONS (top view) INPUT AND OUTPUT EQUIVALENT CIRCUIT NC = No Internal Connection October 1992 1/11 M54/M74HC113 TRUTH TABLE INPUTS PR L J X K X H L H H Q L L Qn Qn L H H L L H H L H H H Qn Qn TOGGLE H X X Qn Qn NO CHANGE LOGIC DIAGRAM CK X FUNCTION Q H X: Don’t Care 2/11 OUTPUTS PRESET NO CHANGE M54/M74HC113 PIN DESCRIPTION IEC LOGIC SYMBOL PIN No SYMBOL NAME AND FUNCTION 1, 13 1CK, 2CK 2, 12 1K, 2K 3, 11 1J, 2J Clock Input (HIGH to LOW edge triggered) Data Inputs: Flip-Flop 1 and 2 Data Inputs: Flip-Flop 1 and 2 4, 10 1PR, 2PR 5, 9 6, 8 1Q, 2Q 1Q, 2Q 7 GND True Flip-Flop Outputs Complement Flip-Flop Outputs Ground (0V) 14 V CC Positive Supply Voltage Set Inputs ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC VI Supply Voltage DC Input Voltage -0.5 to +7 -0.5 to VCC + 0.5 V V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK IOK DC Input Diode Current DC Output Diode Current ± 20 ± 20 mA mA IO DC Output Source Sink Current Per Output Pin ± 25 mA ± 50 500 (*) mA mW ICC or IGND PD DC VCC or Ground Current Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 o C 300 o C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Top Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time tr, tf VCC = 2 V Value 2 to 6 Unit V 0 to VCC V 0 to VCC -55 to +125 -40 to +85 0 to 1000 V C o C ns VCC = 4.5 V 0 to 500 VCC = 6 V 0 to 400 o 3/11 M54/M74HC113 DC SPECIFICATIONS Test Conditions Symbol VIH V IL V OH Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage II ICC 4/11 Low Level Output Voltage Input Leakage Current Quiescent Supply Current TA = 25 C 54HC and 74HC Min. Typ. Max. VCC (V) -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 2.0 1.5 1.5 1.5 4.5 6.0 3.15 4.2 3.15 4.2 3.15 4.2 2.0 0.5 0.5 0.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 2.0 4.5 6.0 6.0 2.0 Unit V 4.5 4.5 VOL Value o VI = IO=-20 µA VIH or V IL IO=-4.0 mA 1.9 2.0 1.9 1.9 4.4 5.9 4.5 6.0 4.4 5.9 4.4 5.9 4.18 4.31 4.13 4.10 IO=-5.2 mA 5.68 5.8 0.0 5.63 0.1 0.1 0.1 V V 5.60 0.0 0.1 0.1 0.1 6.0 4.5 VI = IO= 20 µA VIH or V IL IO= 4.0 mA 0.0 0.17 0.1 0.26 0.1 0.33 0.1 0.40 6.0 IO= 5.2 mA 0.18 0.26 0.33 0.40 VI = VCC or GND ±0.1 ±1 ±1 µA VI = VCC or GND 2 20 40 µA 4.5 6.0 6.0 V M54/M74HC113 AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CK - Q, Q) tPLH tPHL Propagation Delay Time (PRESET - Q, Q) fMAX Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CLOCK) tW(L) Minimum Pulse Width (PRESET) ts th tREM CIN CPD (*) Minimum Set-up Time Minimum Hold Time Minimum Removal Time (PRESET) Input Capacitance Power Dissipation Capacitance Value o VCC (V) TA = 25 C 54HC and 74HC Min. Typ. Max. -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 2.0 30 75 95 110 4.5 6.0 8 7 15 13 19 16 22 19 2.0 46 125 155 190 4.5 16 25 31 38 6.0 12 21 26 32 2.0 48 125 155 190 4.5 6.0 16 13 25 21 31 26 38 32 2.0 8 16 6.4 5.4 4.5 6.0 40 47 63 79 32 38 27 32 2.0 16 75 95 110 4 3 15 13 19 16 22 19 2.0 16 75 95 110 4.5 6.0 4 3 15 13 19 16 22 19 2.0 16 50 65 75 4.5 6.0 4 3 10 9 13 11 15 13 2.0 4.5 0 0 0 0 0 0 6.0 0 0 0 2.0 4.5 5 5 5 5 5 5 5 37 ns ns ns MHz 4.5 6.0 6.0 Unit 5 5 5 10 10 1 0 ns ns ns ns ns pF pF (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC/2 (per FLIP/FLOP) 5/11 M54/M74HC113 SWITCHING CHARACTERISTICS TEST WAVEFORM TEST CIRCUIT ICC (Opr.) INPUT TRANSITION TIME IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST 6/11 M54/M74HC113 Plastic DIP14 MECHANICAL DATA mm DIM. MIN. a1 0.51 B 1.39 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 I 5.1 0.201 L Z 3.3 1.27 0.130 2.54 0.050 0.100 P001A 7/11 M54/M74HC113 Ceramic DIP14/1 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 20 0.787 B 7.0 0.276 D E 3.3 0.130 0.38 e3 0.015 15.24 0.600 F 2.29 2.79 0.090 0.110 G 0.4 0.55 0.016 0.022 H 1.17 1.52 0.046 0.060 L 0.22 0.31 0.009 0.012 M 1.52 2.54 0.060 0.100 N P Q 10.3 7.8 8.05 5.08 0.406 0.307 0.317 0.200 P053C 8/11 M54/M74HC113 SO14 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 E 5.8 8.75 0.336 6.2 0.228 0.344 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.026 8° (max.) P013G 9/11 M54/M74HC113 PLCC20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 9.78 10.03 0.385 0.395 B 8.89 9.04 0.350 0.356 D 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 E 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 F 0.38 0.015 G 0.101 0.004 M 1.27 0.050 M1 1.14 0.045 P027A 10/11 M54/M74HC113 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 11/11