M74HCT125 QUAD BUS BUFFER (3-STATE) ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) ■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL ■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) ■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125 DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HCT125B1R M74HCT125M1R T&R M74HCT125RM13TR M74HCT125TTR DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. The device requires the 3-STATE control input G to be set high to place the output in to the high impedance state. The M74HCT125 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/9 M74HCT125 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 7 1G TO 4G 1A TO 4A 1Y TO 4Y GND VCC 14 NAME AND FUNCTION Output Enable Input Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A G Y X L H H L L Z L H ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 35 mA ± 70 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC 2/9 Parameter Value Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V 0 to VCC V -55 to 125 °C 0 to 500 ns VO Output Voltage Top Operating Temperature tr, tf Input Rise and Fall Time (VCC = 4.5 to 5.5V) M74HCT125 DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II IOZ ICC ∆ ICC Parameter High Level Input Voltage Low Level Input Voltage Min. 4.5 to 5.5 4.5 to 5.5 4.5 Low Level Output Voltage 4.5 Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current Additional Worst Case Supply Current TA = 25°C VCC (V) High Level Output Voltage Value Typ. Max. 2.0 -40 to 85°C -55 to 125°C Min. Min. Max. 2.0 0.8 Max. 2.0 0.8 V 0.8 IO=-20 µA 4.4 4.5 4.4 4.4 IO=-6.0 mA 4.18 4.31 4.13 4.10 Unit V V IO=20 µA 0.0 0.1 0.1 0.1 IO=6.0 mA 0.17 0.26 0.33 0.40 V 5.5 VI = VCC or GND ± 0.1 ±1 ±1 µA 5.5 VI = VIH or VIL VO = VCC or GND ± 0.5 ±5 ± 10 µA 5.5 VI = VCC or GND 4 40 80 µA 5.5 Per Input pin VI = 0.5V or VI = 2.4V Other Inputs at VCC or GND IO = 0 2.0 2.9 3.0 mA AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time VCC (V) CL (pF) 4.5 Value TA = 25°C Min. -40 to 85°C -55 to 125°C Min. Min. Typ. Max. 50 7 12 15 18 4.5 4.5 4.5 4.5 50 150 50 150 13 17 15 19 21 27 24 30 26 34 30 38 32 41 36 45 4.5 50 17 24 30 36 RL = 1 KΩ RL = 1 KΩ Max. Unit Max. ns ns ns ns 3/9 M74HCT125 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Value TA = 25°C VCC (V) Min. Typ. Max. 10 CIN Input Capacitance 5 CPD Power Dissipation Capacitance (note 1) 56 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 10 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC TEST CIRCUIT TEST tPLH, tPHL SWITCH Open tPZL, tPLZ VCC tPZH, tPHZ GND CL = 50pF/150pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω)) 4/9 M74HCT125 WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle) 5/9 M74HCT125 Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 1.39 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 I 5.1 0.201 L Z 3.3 1.27 0.130 2.54 0.050 0.100 P001A 6/9 M74HCT125 SO-14 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.026 8° (max.) PO13G 7/9 M74HCT125 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 8/9 M74HCT125 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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