74AC125 QUAD BUS BUFFERS (3-STATE) ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74AC125 is an advanced high-speed CMOS QUAD BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP 74AC125B 74AC125M T&R 74AC125MTR 74AC125TTR The device requires the 3-STATE control input G to be set high to place the output go in to the high impedance state. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/9 74AC125 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 7 1G to 4G 1A to 4A 1Y to 4Y GND VCC 14 NAME AND FUNCTION Output Enable Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A G Y X L H H L L Z L H X : Don’t Care Z : High Impedance ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V I IK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) ± 50 mA ± 200 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5V (note 1) 1) VIN from 30% to 70% of VCC 2/9 Value Unit 2 to 6 V 0 to VCC 0 to VCC V -55 to 125 °C 8 ns/V V 74AC125 DC SPECIFICATIONS Test Condition Symbol VIH V IL VOH VOL II I OZ ICC IOLD IOHD Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) Value TA = 25°C VCC (V) 3.0 4.5 5.5 3.0 VO = 0.1 V or VCC-0.1V -55 to 125°C Min. Min. Min. Typ. 2.1 3.15 3.85 1.5 2.25 2.75 1.5 0.9 0.9 0.9 2.25 2.75 1.35 1.65 1.35 1.65 1.35 1.65 VO = 0.1 V or VCC-0.1V 4.5 5.5 Max. -40 to 85°C Max. 2.1 3.15 3.85 Max. 2.1 3.15 3.85 3.0 IO=-50 µA 2.9 2.99 2.9 2.9 4.5 IO=-50 µA 4.4 4.49 4.4 4.4 5.49 Unit V V 5.5 IO=-50 µA 5.4 5.4 5.4 3.0 IO =-12 mA 2.56 2.46 2.4 4.5 IO =-24 mA 3.86 3.76 3.7 5.5 IO =-24 mA 4.86 4.76 4.7 3.0 IO=50 µA 0.002 0.1 0.1 0.1 4.5 IO=50 µA 0.001 0.1 0.1 0.1 5.5 IO=50 µA 0.001 0.1 0.1 0.1 3.0 IO =12 mA 0.36 0.44 0.5 4.5 IO =24 mA 0.36 0.44 0.5 5.5 IO =24 mA 0.36 0.44 0.5 5.5 VI = VCC or GND ± 0.1 ±1 ±1 µA 5.5 VI = VIH or VIL VO = VCC or GND ± 0.5 ±5 ± 10 µA 5.5 VI = VCC or GND 4 40 80 µA VOLD = 1.65 V max 75 50 mA VOHD = 3.85 V min -75 -50 mA 5.5 V V 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω AC ELECTRICAL CHARACTERISTICS Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time VCC (V) Value TA = 25°C -40 to 85°C -55 to 125°C Min. Typ. Max. Min. Max. Min. Max. 3.3 (*) 1.0 5.5 8.5 1.0 9.5 1.0 10.5 (**) 5.0 1.0 4.0 7.0 1.0 8.5 1.0 8.5 3.3 (*) 1.0 6.0 10.0 1.0 11.0 1.0 11.0 (**) 5.0 1.0 4.0 7.0 1.0 8.0 1.0 8.0 3.3 (*) 1.0 7.5 10.0 1.0 11.0 1.0 11.0 (**) 1.0 6.0 9.0 1.0 9.5 1.0 9.5 5.0 Unit ns ns ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 3/9 74AC125 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter CIN Input Capacitance C OUT Output Capacitance Power Dissipation Capacitance (note 1) C PD Value TA = 25°C VCC (V) Min. Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 5.0 4 pF 5.0 8 pF 24 pF 5.0 fIN = 10MHz 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per Buffer) TEST CIRCUIT TEST SWITCH tPLH, tPHL Open tPZL, tPLZ 2V CC tPZH, tPHZ Open C L = 50pF or equivalent (includes jig and probe capacitance) R L = R1 = 500Ω or equivalent R T = ZOUT of pulse generator (typically 50Ω) 4/9 74AC125 WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 5/9 74AC125 Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 1.39 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 I 5.1 0.201 L Z 3.3 1.27 0.130 2.54 0.050 0.100 P001A 6/9 74AC125 SO-14 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.026 8° (max.) PO13G 7/9 74AC125 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 8/9 74AC125 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Swit zerland - United Kingdom http://w ww.st.com 9/9