STMICROELECTRONICS TDA7701

TDA7701
BATTERY-OPERATED FULLY INTEGRATED FM TUNER
DATA BRIEF
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Main Features
SINGLE-CHIP FM TUNER FOR LOW-VOLTAGE/
LOW POWER APPLICATIONS
INTEGRATED LNA (WITH AGC) AND IMAGE
REJECTION MIXER
LOW-IF ARCHITECTURE WITH ON-CHIP
CHANNEL SELECTION FILTER
VCO WITH ON-CHIP VARACTOR
INTEGRATED TUNING PLL WITH AUTO
STATION SEARCH FUNCTION
ANALOG AND DIGITAL SIGNAL STRENGTH
INDICATION
FULLY INTEGRATED FM DEMODULATOR
AND ADJUSTMENT-FREE STEREO
DECODER
PROGRAMMABLE AUTOMATIC STEREO
BLEND AND SOFT MUTE
I2C/SPI-BUS CONTROLLED
LOW POWER CONSUMPTION
HIGH SENSITIVITY
HIGH AUDIO QUALITY
Description
TDA7701 is a single-chip FM Tuner specifically
designed in mixed Bipolar-CMOS technology for
low-voltage/low-power applications, where the
minimization of external component count and
PCB size and complexity are mandatory: typical
examples are mobile phones and portable multimedia equipment.
Housed in a small TFBGA40 package (5x5 mm), it
features the full FM signal processing chain from
antenna to stereo audio output: RF front-end processing, IF processing, demodulation and stereo
Figure 1. Package
TFBGA40
Table 1. Order Codes
Part Number
Package
TDA7701
TFBGA40
decoding, I2C/SPI-controlled tuning with station
detection.
Its low-IF architecture highly integrated RF/IF sections include a low-noise preamplifier with Automatic Gain Control, an image rejection mixer and
on-chip high-Q channel selection filters that bring
to a minimum the external component count and
PCB complexity while guaranteeing good selectivity and image-rejection performances Thanks to its
on-chip varactor, the tuning-PLL controlled VCO
needs just one external inductor for low phasenoise oscillation.
FM demodulation is performed by means of a fully
integrated circuit that eliminates the need for an
external LC tank while maximizing linearity.
The FM stereo signal is decoded through a fullyintegrated, adjustment-free dedicated PLL; automatic signal-dependent stereo blend and softmute functions are provided.
A single external reference frequency is needed
for IC operation, and can be selected among those
commonly used in GSM applications (13/19.2/26/
38.4 MHz + 32768Hz real-time/sleep clock).
February 2005
This is preliminary information on a new product now in development. Details are subject to change without notice.
Rev. 1
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PLLGND
PLLVCC
VCOGND
VCOVCC
RFIN-
RFIN+
RFGND
AGC
VREFINT
LFREF
LF
VCOOUT
VCOIN
Variable Gain
LNA
AGCTC
TUNVCC
Limiter
Soft
Mute
BUSEN
VREF
38 kHz
BUSGND
Stereo Decoder
& Blend
RSSI MPXSMSTDECIN
Pilot
Recovery
MPX
FM
Demodulator
I2C/SPI Bus I/F
DEMREF
CLOCK DATA DATAOUT CS
Channel Selection
Filter
VCO
CKIN
/N
Tuning
PLL
/4
IR Mixer
RFVCC
DIGGND
DIGVCC
RESET
SWPORT
INTX
OUT R
OUT L
TDA7701 -
Figure 2. Functional Block Diagram
TDA7701 Table 2. Revision History
Date
Revision
February 2005
1
Description of Changes
First Issue
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TDA7701 -
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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