TS634 DUAL WIDE BAND OPERATIONAL AMPLIFIER FOR ADSL LINE INTERFACE ■ LOW NOISE : 3.2nV/√Hz, 1.5pA/√Hz ■ HIGH OUTPUT CURRENT : 160mA min. ■ VERY LOW HARMONIC AND INTERMODULATION DISTORTION ■ HIGH SLEW RATE : 40V/µs ■ SPECIFIED FOR 25Ω LOAD D SO20 Batwing (Plastic Micropackage) DESCRIPTION This device is particularly intended for applications where multiple carriers must be amplified simultaneously with very low intermodulation products. It has been mainly designed to fit with ADSL chip-set such as ST70134 or ST70135. The TS634 is a high output current dual operational amplifier, with a large gain-bandwidth product (130MHz) and capable of driving a 25Ω load at 12V power supply. The TS634 is fitted out with Power Down function in order to decrease the consumption. ORDER CODE Part Number Package Temperature Range TS634ID D P • -40, +85°C D=Small Outline Package (SO) - also available in Tape & Reel (DT) PIN CONNECTIONS (top view) The TS634 is housed in SO20 batwing plastic package for a very low thermal resistance. SO20 batwing - Top View Power Down 1 20 Vcc+ 1 19 Output 1 18 Vcc- Inverting input 1 2 _ Non-inverting input 1 3 + Vcc - 4 17 Vcc - Vcc - 5 16 Vcc - Vcc - 6 15 Vcc - Vcc - 7 14 Vcc - Non-Inverting input 2 8 13 GND Inverting input 2 9 Thermal Heat Tabs connected to -Vcc APPLICATION 1 Power Down 2 10 + _ Thermal Heat Tabs connected to -Vcc 12 Output 2 11 Vcc+ 2 ■ UPSTREAM line driver for Asymmetric Digital Subscriber Line (ADSL) (NT). March 2003 1/9 TS634 ABSOLUTE MAXIMUM RATINGS Symbol VCC Vid Vin Parameter Supply voltage 1) Differential Input Voltage Input Voltage Range 2) 3) Value Unit ±7 V ±2 V ±6 V Toper Operating Free Air Temperature Range TS634TS634ID -40 to +85 °C Tstd Storage Temperature -65 to +150 °C 150 °C Tj Maximum Junction Temperature SO20-Batwing Rthjc Thermal Resistance Junction to Case 25 °C/W Rthja Thermal Resistance Junction to Ambient Area 45 °C/W Pmax. Maximum Power Dissipation (@25°C) 2.7 W Value Unit 1. All voltages values, except differential voltage are with respect to network terminal. 2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltages must never exceed VCC +0.3V. OPERATING CONDITIONS Symbol VCC Vicm Parameter Supply Voltage ±2.5 to ±6 Common Mode Input Voltage (VCC) +2 to (VCC ) -1 APPLICATION: ADSL LINE INTERFACE ASCOT ADSL CHIP-SET TS634 Line Driver TX emission LP filter (analog signal) ST70135 upstream ST70134 HYBRID CIRCUIT Power Down twisted-pair telephone line RX reception (analog signal) 4-bit Gain Control 2/9 V + VGA downstream TS636 Receiver V TS634 ELECTRICAL CHARACTERISTICS VCC = ±6Volts, Tamb = 25°C (unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit 6 mV DC PERFORMANCE ∆Vio Differential Input Offset Voltage Iio Input Offset Current Iib Input Bias Current CMR SVR ICC Common Mode Rejection Ratio Supply Voltage Rejection Ratio Total Supply Current per Operator Tamb = 25°C Tamb 0.2 Tmin. < Tamb < Tmax. 3 5 Tamb 5 Tmin. < Tamb < Tmax. 15 30 Vic = 2V to 2V, Tamb 90 Tmin. < Tamb < Tmax. 70 Vic = ±6V to ±4V, Tamb 70 Tmin. < Tamb < Tmax. 50 No load, Vout = 0 108 µA µA dB 88 dB 14 mA 4.5 V DYNAMIC PERFORMANCE VOH High Level Output Voltage Iout = 160mA RL connected to GND VOL Low Level Output Voltage Iout = 160mA RL connected to GND AVD Large Signal Voltage Gain GBP SR 4 -4.5 Vout = 7V peak RL = 25Ω, Tamb 6500 Tmin. < Tamb < Tmax. 5000 Gain Bandwidth Product AVCL = +7, f = 20MHz RL = 100Ω Slew Rate AVCL = +7, RL = 50Ω 23 Vid = ±1V, Tamb 160 Tmin. < Tamb < Tmax. 140 -4 V 11000 V/V 130 MHz 40 V/µs Isink Isource Output Current ΦM14 Phase Margin at AVCL = 14dB RL = 25Ω//15pF 60 ° ΦM6 Phase Margin at AVCL = 6dB RL = 25Ω//15pF 40 ° mA NOISE AND DISTORTION en Equivalent Input Noise Voltage f = 100kHz 3.2 nV/√Hz in Equivalent Input Noise Current f = 100kHz 1.5 pA/√Hz Total Harmonic Distortion Vout = 4Vpp, f = 100kHz AVCL = -10 RL = 25Ω//15pF -69 dB IM2-10 2nd Order Intermodulation Product F1 = 80kHz, F2 = 70kHz Vout = 8Vpp, AVCL = -10 Load = 25Ω//15pF -77 dBc IM3-10 3rd Order Intermodulation Product F1 = 80kHz, F2 = 70kHz Vout = 8Vpp, AVCL = -10 Load = 25Ω//15pF -77 dBc THD 3/9 TS634 POWER DOWN MODE VCC = ±6Volts, Tamb = 25°C Symbol Parameter Thershold Voltage for Power Down Mode Vpdw Iccpdw Rpdw Cpdw Min. Typ. Max Unit 0 3.3 0.8 V 2 150 µA ΜΩ pF Low Level High Level Total Power Down Mode Current Consumption Power Down Mode Ouput Impedance Power Down Mode Output Capacitance 1.4 33 STANDBY CONTROL OPERATOR STATUS operator 1 operator 2 operator 1 operator 2 Vhigh level Vlow level Standby Active Vhigh level Vhigh level Standby Standby Vlow level Vlow level Active Active Vlow level Vhigh level Active Standby POWER DOWN EQUIVALENT SCHEMATIC + _ .. POWER DOWN 0 .. . -10 -20 Ouput Vcc - -30 IM3 (dBc) Vcc + 3rd ORDER INTERMODULATION 2 tones : 70kHz and 80kHz -40 90kHz -50 230kHz -60 -70 -80 OUPUT IMPEDANCE IN POWER DOWN MODE In Power Down Mode the output of the driver is in "high impedance" state. It is really the case for the static mode. Regarding the dynamic mode, the impedance decreases due to a capacitive effect of the collector-substrat and base collector junction. The impedance behaviour comes capacitive, typically: 1.4MΩ // 33pF. 60kHz -90 220kHz -100 1 1,5 2 2,5 3 3,5 4 4,5 Vout peak (V) 2 tones : 180kHz and 280kHz 0 4/9 -20 -30 IM3 (dBc) INTERMODULATION DISTORTION The curves shown below are the measurements results of a single operator wired as an adder with a gain of 15dB. The operational amplifier is supplied by a symmetric ±6V and is loaded with 25Ω. Two synthesizers (Rhode & Schwartz SME) generate two frequencies (tones) (70 & 80kHz or 180 & 280kHz). An HP3585 spectrum analyzer measures the spurious level at different frequencies. The curves are traced for different output levels (the value in the X axis is the value of each tone). The output levels of the two tones are the same. The generators and spectrum analyzer are phase locked to enhance measurement precision. -10 -40 -50 80kHz -60 380kHz -70 -80 640kHz -90 740kHz -100 1 1,5 2 2,5 3 Vout peak (V) 3,5 4 4,5 TS634 Closed Loop Gain and Phase vs. Frequency Gain=+6, Vcc=±6V, RL=25Ω Closed Loop Gain and Phase vs. Frequency Gain=+2, Vcc=±6V, RL=25Ω 10 200 200 20 Gain Gain 15 0 -20 -100 Gain (dB) Phase -10 100 10 Phase (degrees) 100 Phase (degrees) Gain (dB) 0 5 Phase 0 0 -5 -100 -10 -15 -30 -200 10kHz 100kHz 1MHz 10MHz -20 100MHz -200 10kHz 100kHz 1MHz Frequency 10MHz 100MHz Frequency Closed Loop Gain and Phase vs. Frequency Gain=+11, Vcc=±6V, RL=25Ω 30 Equivalent Input Voltage Noise Gain=+100, Vcc=±6V, no load 200 20 100 15 Gain Phase 0 0 -10 en (nV/VHz) Gain (dB) 10 Phase (degrees) 20 + _ 10k 100 10 -100 5 -200 0 -20 -30 10kHz 100kHz 1MHz 10MHz Frequency 100Hz 100MHz 10kHz 100kHz 1MHz Frequency Maximum Output Swing Vcc=±6V, RL=25Ω Channel Separation (Xtalk) vs. Frequency XTalk=20Log(V2/V1), Vcc=±6V, RL=25Ω VIN 5 + 49.9Ω _ -10 4 output -20 3 -40 Xtalk (dB) input 1 0 -1 -2 -3 V1 1kΩ 100Ω -30 2 swing (V) 1kHz + 49.9Ω _ -50 100Ω -60 25Ω V2 1kΩ 25Ω -70 -80 -4 -90 -5 0 2 4 6 Time (µs) 8 10 -100 10kHz 100kHz 1MHz 10MHz Frequency 5/9 TS634 THE TS634 AS LINE DRIVER ON ADSL LINE INTERFACE. SINGLE SUPPLY IMPLEMENTATION WITH PASSIVE OR ACTIVE IMPEDANCE MATCHING. THE LINE INTERFACE - ADSL Remote Terminal (RT): The Figure1 shows a typical analog line interface used for ADSL service. On this note, the accent will be made on the emission path. The TS634 is used as a dual line driver for the upstream signal. The input provides two high pass filters with a break frequency of about 1.6kHz which is necessary to remove the DC component of the input signal. To avoid DC current flowing in the primary of the transformer, an output capacitor is used. The this case the load impedance is 25Ω for each driver. Figure 1 : Typical ADSL Line Interface high output current LP filter emission (analog) ST70135 upstream TS634 Line Driver ST70134 impedance matching HYBRID CIRCUIT twisted-pair telephone line downstream VGA reception (analog) TS636 Receiver For the remote terminal it is required to create an ADSL modem easy to plug in a PC. In such an application, the driver should be implemented with a +12 volts single power supply. This +12V supply is available on PCI connector of purchase. The Figure 2 shows a single +12V supply circuit that uses the TS634 as a remote terminal transmitter in differential mode. Figure 2 : TS634 as a differential line driver with a +12V single supply + _ 1k +12V 10n 12.5 For the ADSL upstream path necessary to avoid any distortion. In this simple non-inverting amplification configuration, it will be easy to implement a Sallen-Key lowpass filter by using the TS634. For ADSL over POTS, a maximum frequency of 135kHz is reached. For ADSL over ISDN, the maximum frequency will be 276kHz. INCREASING THE LINE LEVEL BY USING AN ACTIVE IMPEDANCE MATCHING With passive matching, the output signal amplitude of the driver must be twice the amplitude on the load. To go beyond this limitation an active maching impedance can be used. With this technique it is possible to keep good impedance matching with an amplitude on the load higher than the half of the ouput driver amplitude. This concept is shown in Figure 3 for a differential line. Figure 3 : TS634 as a differential line driver with an active impedance matching 1µ 100n +12V namic range between 0 and +12 V. Several options are possible to provide this bias supply (such as a virtual ground using an operational amplifier), such as a two-resistance divider which is the cheapest solution. A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the inverting input of the TS634. If we consider this bias current (5µA) as the 1% of the current through the resistance divider (500µA) to keep a stable mid supply, two 47kΩ resistances can be used. GND R2 1:2 Vi 47k Vcc/2 1/2 10µ Vi 1k 25Ω Hybrid & Transformer 100n 100Ω + _ _ Vcc+ Vo R3 +12V 1k 10n Vo° 1:n Vo 1/2 R1 R3 RL Vcc/2 GND 1/2 R1 100n 10µ Vi 1k 6/9 Rs1 GND R2 Vi 12.5 The driver is biased with a mid supply (nominaly +6V), in order to maintain the DC component of the signal at +6V. This allows the maximum dy- Vcc+ + R1 47k 100n GND 1µ Vo 1/2 R1 GND 100n + _ 100n R5 R4 Vcc+ GND Vo° Rs2 Vo Hybrid & Transformer 100Ω TS634 Component calculation: Let us consider the equivalent circuit for a single ended configuration, Figure 4. By identification of both equations (2) and (3), the synthesized impedance is, with Rs1=Rs2=Rs: Rs Ro = ----------------- ,( 4 ) R2 1 – ------R3 Figure 4 : Single ended equivalent circuit Figure 5 : Equivalent schematic. Ro is the synthesized impedance + Rs1 _ Vi Vo° Vo Ro R2 Iout -1 R3 1/2R1 1/2RL Vi.Gi 1/2RL Let us consider the unloaded system. Assuming the currents through R1, R2 and R3 as respectively: 2Vi Vi – Vo° ) Vi + Vo )---------, (------------------------- and (----------------------R2 R3 R1 As Vo° equals Vo without load, the gain in this case becomes : 2R2 R2 1 + ----------- + ------Vo ( noload ) R1 R3 G = ------------------------------- = ----------------------------------Vi R2 1 – ------R3 The gain, for the loaded system will be (1): 2R2 R2 1 + ----------- + ------1 R1 R3 Vo ( withload ) GL = ------------------------------------ = --- ----------------------------------- ,( 1 ) 2 R2 Vi 1 – ------R3 As shown in figure5, this system is an ideal generator with a synthesized impedance as the internal impedance of the system. From this, the output voltage becomes: Vo = ( ViG ) – ( RoIout ) ,( 2 ) with Ro the synthesized impedance and Iout the output current. On the other hand Vo can be expressed as: 2R2 R2 Vi 1 + ----------- + ------- R1 R3 Rs1Iout Vo = ----------------------------------------------- – --------------------- ,( 3 ) R2 R2 1 – ------1 – ------R3 R3 Unlike the level Vo° required for a passive impedance, Vo° will be smaller than 2Vo in our case. Let us write Vo°=kVo with k the matching factor varying between 1 and 2. Assuming that the current through R3 is negligeable, it comes the following resistance divider: kVoRL Ro = --------------------------RL + 2Rs1 After choosing the k factor, Rs will equal to 1/2RL(k-1). A good impedance matching assumes: 1 R o = --- RL ,( 5 ) 2 From (4) and (5) it becomes: 2Rs R2 ------- = 1 – ---------- ,( 6 ) R3 RL By fixing an arbitrary value for R2, (6) gives: R2 R3 = ------------------2Rs 1 – ---------RL Finally, the values of R2 and R3 allow us to extract R1 from (1), and it comes: 2R2 R1 = --------------------------------------------------------- ,( 7 ) R2 R2 2 1 – ------- GL – 1 – ------ R3 R3 with GL the required gain. GL (gain for the loaded system) R1 R2 (=R4) R3 (=R5) Rs GL is fixed for the application requirements GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3) 2R2/[2(1-R2/R3)GL-1-R2/R3] Abritrary fixed R2/(1-Rs/0.5RL) 0.5RL(k-1) 7/9 TS634 CAPABILITIES The table below shows the calculated components for different values of k. In this case R2=1000Ω and the gain=16dB. The last column displays the maximum amplitude level on the line regarding the TS634 maximum output capabilities (18Vpp diff.) and a 1:2 line transformer ratio. Active matching k 1.3 1.4 1.5 1.6 1.7 8/9 R1 (Ω) 820 490 360 270 240 Passive R3 (Ω) Rs (Ω) 1500 3.9 1600 5.1 2200 6.2 2400 7.5 3300 9.1 matching TS634 Output Level to get 12.4Vpp on the line (Vpp diff) 8 8.7 9.3 9.9 10.5 12.4 Maximum Line level (Vpp diff) 27.5 25.7 25.3 23.7 22.3 18 MEASUREMENT OF THE POWER CONSUMPTION Conditions: Power Supply: 12V Passive impedance matching Transformer turns ratio: 2 Maximun level required on the line: 12.4Vpp Maximum output level of the driver: 12.4Vpp Crest factor: 5.3 (Vp/Vrms) The TS634 power consumption during emission on 900 and 4550 meter twisted pair telephone lines: 450mW TS634 PACKAGE MECHANICAL DATA 20 PINS - PLASTIC MICROPACKAGE (SO) Millimeters Inches Dim. Min. A a1 a2 b b1 C c1 D E e e3 F L M S Typ. Max. Min. 2.65 0.3 2.45 0.49 0.32 0.1 0.35 0.23 Typ. 0.104 0.012 0.096 0.019 0.013 0.004 0.014 0.009 0.5 Max. 0.020 45° (typ.) 12.6 10 13.0 10.65 0.496 0.394 1.27 11.43 7.4 0.5 0.512 0.419 0.050 0.450 7.6 1.27 0.75 0.291 0.020 0.299 0.050 0.030 8° (max.) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com 9/9