TS34063 Dc to Dc Converter Controller Pin assignment: 1. SC 2. SE 3. CT 4. Gnd 5. Comp. 6. Vcc 7. Ipk 8. Vdriver Supply Voltage Range 3 V to 40V Output Driving Current 1.5A Oscillator Frequency up to 100KHz General Description The TS34063 is a monolithic switching regulator and subsystem intended for use as DC to DC converter. It contains an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active peak current limit circuit, drive and a high current output switch. The TS34063 is specifically designed to be incorporated in step-up, step-down and voltage inverting converter applications. The TS34063 is offered in SOP-8 and DIP-8 package. Features Pin Descriptions Power forward control circuit Name Description Operating voltage form 3V to 40V Low standby current Current limit adjustable Output switch current up to 1.5A Variable oscillator frequency up to 100KHz (max) Output voltage adjustable SC SE CT Gnd Comp. Vcc Ipk Vdriver Switch Collector Switch Emitter Timing Capacitor Ground Comparator Inverting Input Vcc Collector Ipk Sense Driver Applications Charger xD-ROM, xDSL product DC to DC converter s Ordering Information Part No. TS34063CD Operating Temp. (Ambient) o -20 ~ +85 C Block Diagram 1-8 DIP-8 SOP-8 TS34063CS TS34063 Package 2003/12 rev. C Absolute Maximum Rating Supply Voltage VCC 40 V Comparator Input Voltage Range VFB - 0.3 ~ 40 V Switch Collector Output Voltage VC(SW) 40 V Switch Emitter Voltage VE(SW) 40 V Switch Collector to Emitter Voltage VCE(SW) 40 V Driver Collector Voltage Vc(driver) 40 V Driver Collector Current (note 1) Ic(driver) 100 mA ISW 1.5 A Output Switching Current Power Dissipation DIP-8 1.0 Pd SOP-8 Operating Junction Temperature Range TJ Storage Temperature Range TSTG W 0.5 -0 ~ +125 o C -65 ~ +150 o C Note: Maximum package power dissipation limits must be observed Electrical Characteristics (VCC =5V, Ta =25 oC; unless otherwise specified.) Parameter Symbol Test Conditions Min Typ Max Unit Oscillator (OSC) Frequency Charge Current Discharge Current Discharge to Charge current ratio Current Limit Sense Voltage CT = 1nF, Vpin5= 0V 24 33 42 KHz ICHARGE FOSC VCC = 5V ~ 40V -- 30 -- uA IDISCHARGE VCC = 5V ~ 40V -- 200 -- uA Pin7 to Vcc -- 6.5 -- -- 250 -- 350 mV IDISCHARGE / ICHARGE VIPK(SENSE) IDISCHARGE = ICHARGE Output switch (note1) Saturation Voltage VCE(SAT) ISW = 1A, pin1,8 connected) -- 1.0 1.3 V Saturation Voltage VCE(SAT) ISW = 1A, Id=50mA -- 0.45 0.7 V DC current gain Collector off-state current HFE IC(OFF) ISW = 1A, Vce= 0.5V -- 75 -- -- Vce= 40V -- 0.01 100 uA 1.225 1.25 1.275 V -- -- 6 mV -- 3 5 mA Comparator Threshold Voltae Line regulation VREF RegLine VCC = 3V ~ 40V Total device VCC = 5V ~ 40V, CT = 1nF, Supply Current ICC pin7=Vcc, pin5>Vth, pin2=Gnd, remaining pins open Note: 1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible 2. If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (<=300mA) and high driver currents (>=30mA), it may take up to 2uS for it to come out of saturation. This condition will shorten the off time at frequencies >= 30KHz, and is magnified at high temperature. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-Darlington configuration is used, the following output drive condition is recommended: Forced Bata of output switch: Ic output / (Ic driver – 7mA*) >= 10 * The 100ohm resistor in the emitter of the driver divide requires about 7mA before the output switch conducts. TS34063 2-8 2003/12 rev. C Circuit Description TS34063 3-8 2003/12 rev. C Typical Application Circuit Figure 7. Step Up Converter TS34063 Test Conditions Results LINE REGULATION Vin= 8V~16V, Io= 175mA 30mV +/- 0.05% Load Regulation Vin= 12V, Io= 75mA to 175mA 10mV +/- 0.017% Output Ripple Vin=12V, Io= 175mA 400mVpp Efficiency Vin=12V, Io= 175mA 87.7% Output Ripple with Optional Filter Vin=12V, Io= 175mA 40mVpp 4-8 2003/12 rev. C Typical Application Circuit (continues) Figure 9. Step Down Converter TS34063 Test Conditions Results Line Regulation Vin= 15V~25V, Io= 500mA 12mV +/- 0.12% Load Regulation Vin= 25V, Io= 50mA to 500mA 3mV +/- 0.03% Output Ripple Vin= 25V, Io= 500mA 120mVpp Short Circuit Current Vin= 25V, RL= 0.1ohm 1.1A Efficiency Vin= 25V, Io= 500mA 83.7% Output Ripple with Optional Filter Vin= 25V, Io= 500mA 40mVpp 5-8 2003/12 rev. C Typical Application Circuit (continues) Figure 11. Voltage Inverting Converter TS34063 Test Conditions Results Line Regulation Vin= 4.5V~6.0V, Io= 100mA 3mV +/- 0.012% Load Regulation Vin= 5V, Io= 10mA to 100mA 22mV +/- 0.09% Output Ripple Vin= 5V, Io= 100mA 500mVpp Short Circuit Current Vin= 5V, RL= 0.1ohm 900mA Efficiency Vin= 5V, Io= 100mA 62.2% Output Ripple with Optional Filter Vin= 5V, Io= 100mA 70mVpp 6-8 2003/12 rev. C Design Formula Table Test ton toff ( ton+ toff ) CT Ipk(switch) Rsc L(min) Co Step Up Step Down Voltage Inverting Vout + Vf − Vin (min) Vcc (min) − Vsat 1 f min Vout + Vf Vcc − Vsat − Vout 1 f min | Vout | +Vf Vcc − Vsat 1 f min 4.0 x 10 –5 ton 4.0 x 10 –5 ton 4.0 x 10 –5 ton ⎞ ⎛ ton + 1⎟⎟ ⎠ ⎝ toff 2Iout(max) 2Iout(max) ⎜ ⎜ ⎞ ⎛ ton + 1⎟⎟ ⎠ ⎝ toff 2Iout(max) ⎜ ⎜ ⎞ ⎛ 0.3 ⎟⎟ ⎜⎜ ⎝ Ipk ( switch) ⎠ ⎞ ⎛ 0.3 ⎟⎟ ⎜⎜ ⎝ Ipk ( switch) ⎠ ⎞ ⎛ 0.3 ⎟⎟ ⎜⎜ ⎝ Ipk ( switch) ⎠ ⎛ Vin( min ) − Vsat ⎞ ⎜⎜ ⎟⎟ * ton( max ) ⎝ Ipk(switch) ⎠ ⎛ Vin (min) − Vsat − Vout ⎞ ⎜⎜ ⎟⎟ * ton (max) Ipk ( switch ) ⎝ ⎠ ⎛ Vin(min) − Vsat ⎞ ⎜⎜ ⎟⎟ * ton(max) ⎝ Ipk ( switch) ⎠ ⎛ Iout * ton ⎞ ⎟⎟ ⎜⎜ 9 ⎝ Vripple( pp ) ⎠ ⎛ Ipk ( switch)(ton + toff ) ⎞ ⎟⎟ ⎜⎜ 8Vripple( pp ) ⎠ ⎝ ⎛ Iout * ton ⎞ ⎟⎟ ⎜⎜ 9 ⎝ Vripple( pp ) ⎠ Terms and Definitions z Vsat = Saturation Voltage of the output switch. z Vf = Forward Voltage drop of the rectifier. The following power supply characteristics must be chosen: z Vin= Normal input voltage z Vout: Desied Output voltage, |Vout| =1.25 (1+R2 / R1) z Iout : Desired output current. z fmin : Minimum desired output switching frequency at the selected values for Vin and Io. z Vripple(p-p): Desired peak-to-peak output ripple voltage. in practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation. TS34063 7-8 2003/12 rev. C SOP-8 Mechanical Drawing A DIM 9 16 B 1 P 8 G R C M F D A B C D F G K M P R SOP-8 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 4.80 5.00 0.189 0.196 3.80 4.00 0.150 0.157 1.35 1.75 0.054 0.068 0.35 0.49 0.014 0.019 0.40 1.25 0.016 0.049 1.27 (typ) 0.05 (typ) 0.10 0.25 0.004 0.009 0o 7o 0o 7o 5.80 6.20 0.229 0.244 0.25 0.50 0.010 0.019 K DIP-8 Mechanical Drawing A 8 DIM 5 B 4 1 L C J A B C D G J K L M DIP-8 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 9.07 9.32 0.357 0.367 6.22 6.48 0.245 0.255 3.18 4.45 0.125 0.135 0.35 0.55 0.019 0.020 2.54 (typ) 0.10 (typ) 0.29 0.31 0.011 0.012 3.25 3.35 0.128 0.132 7.75 8.00 0.305 0.315 10o 10o K G TS34063 D M 8-8 2003/12 rev. C