UTC LAG665F LINEAR INTEGRATED CIRCUIT RADIO AND CASSETTE RECORDER CIRCUIT DESCRIPTION The UTC LAG665F is a monolithic integrated circuit, designed for portable radio cassette. FEATURES *1-Chip stereo tape recorder with motor speed controller. *Operating supply voltage range: Vcc=2~5V *Good volume control SOP-28 BLOCK DIAGRAM 27 26 25 24 23 22 21 19 20 18 14 17 16 15 13 Power Amp Pre Amp Attenuator Motor Control 1/2 Vcc Bias Control 1/2 Vcc V/I Power Amp Pre Amp 1 2 UTC 3 28 Attenuator 4 5 6 Power Amp 7 8 9 11 10 12 UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R110-013,A UTC LAG665F LINEAR INTEGRATED CIRCUIT PIN CONFIGURATION VBPRE 1 28 GND PRE 1IN+ 2 27 2IN+ 1IN- 3 26 2IN- INF PRF 4 25 2NF PRE IOUT PRE 5 24 2OUT PRE ATT1 6 23 ATT2 CONVOL 7 22 PREOFF VREF 8 21 VCCPRE 1OUT P 9 20 VCC GND P 10 19 2OUT P VBP 11 18 MOOFF GNDMD 12 17 VCCMO VCON 13 16 CON T MOON 14 15 CONS PIN NO. SYMBOL DESCRIPTION PIN NO. SYMBOL DESCRIPTION 1 VBPRE Pre Amp Bias Voltage 15 CONS Speed Control 2 1 IN+ Channel 1 “ +” Input 16 CONT Torqul Control 3 1 IN - Channel 1 “ -” Input 17 VCCMO Motor Power Control 4 1 NFPRE Feedback 5 1 OUTPRE Pre Amp Output 6 ATT 1 Attenuator 7 CONVOL Volume Control 8 VREF Reference Voltage 9 1 OUTP 10 GNDP 11 VBP 12 GNDMD Motor GND 26 2 IN- Channel 2 “ -” Input 13 VCON Motor Control Voltage 27 2 IN+ Channel 2 “ +” Input 14 MOON Motor Forced Start 28 GNDPRE Pre GND UTC 1 18 MOOFF 19 2 OUTP 20 VCC Supply Voltage 21 VCCPRE Supply Voltage 22 PREOFF 23 ATT 2 Attenuator Power GND 24 2 OUTPRE Pre Amp Output Power Amp Bias Voltage 25 2 NFPRE Feedback 1 1 Power Amp Output 1 Motor Forced Stop Power Amp Output 2 Pre Amp Off UNISONIC TECHNOLOGIES CO., LTD. 2 2 2 2 QW-R110-013,A UTC LAG665F LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS(Ta=25°C) PARAMETER Supply Voltage Power Dissipation Operating Voltage Operating Temperature Storage Temperature SYMBOL VALUE UNIT Vcc Pd Vop Topr Tstg -0.3~+7.5 450 2~5 -20~+65 -40~+125 V mW V °C °C ELECTRICAL CHARACTERISTICS(Ta=25°C,Vcc=3V, f=1kHz, RL=16Ω, unless otherwise specified) PARAMETER Supply Current PRE-AMPLIFIER Open Loop Gain Close Loop Gain Maximum Output Voltage Total Harmonic Distortion Output Noise Voltage Input Impedance Cross Talk between CH Pre Amp Output Voltage when Pre-Off Output Impedance when Pre-Off Input Impedance when Pre-Off Attenuator Maximum Input Voltage Maximum Attenuation Attenuation Error Input Impedance Control Ternimal Input Impedance Power Amplifier Voltage Gain Channel Voltage Difference Maximum Output Power I Maximum Output Power II Total Harmonic Distortion Cross Talk between CH Output Noise Voltage Ripple Rejection Pre + Pulse Boost + Power Noise Motor *Vcc=3V, Im=100mA Current Consumption Starting Current Reference Voltage UTC SYMBOL TEST CONDITIONS Icc Vin=0V, IM=0mA Gvo Gvc Vom THD Von Vo=-10dBm, RL=∞ Vo=-10dBm THD=10% Vout=100mVrms Vin=0, Rg=2.2k, BPF(30~20k) Vout=-10dBm Rg=2.2k, Vout=-10dBm Zin CT Vooff Rooff Rioff Vimax Vamax Vaerr Zia Zicot GV ∆GV Pom 1 Pom 2 THD CT Von RR Vnto IMC IMS Vref MIN 40 0.45 18 30 TYP MAX UNIT 18 25 mA 72 42 0.6 0.05 150 44 0.5 300 22 Vin=100mVrms kΩ dB -50 10 10 Vcont=Min Vcont=Max 0.2 66 15 100 Pout=5mW Vcont=Max THD=10%, RL=32Ω THD=10%, RL=16Ω Pout=5mW Pout=5mW Rg=2.2k, Vcont=Min Vcc=3V, 100Hz, 100mVp-p Vin=0V, Rg=2.2k, Vcont=Max* Pin 15~Pin 16 26 20 30 20 34 500 0.72 dB dB Vrms % µVrms dB kΩ KΩ Vrms dB dB kΩ kΩ 0 20 28 0 28 30 3 0.2 30 0.25 40 6 2 3 5 0.8 0.87 1 9 UNISONIC TECHNOLOGIES CO., LTD. dB dB mW mW % dB mVrms dB mVrms mA mA V 3 QW-R110-013,A UTC LAG665F LINEAR INTEGRATED CIRCUIT PARAMETER SYMBOL TEST CONDITIONS Reference Voltage Change I Reference Voltage Change II Reference Voltage Change III Current Factor Current Factor Change I Current Factor Change II Current Factor Change III Saturation Voltage at Forced ON Input Impedance at Forced ON Pin Leakage Current at Forced OFF Input Impedance at Forced OFF Pin Vref 1 Vref 2 Vref 3 K K1 K2 K3 VCEsa Rion Vcc=2.1~5V Im=25~250mA Ta=-10~50°C IML Ricon Vcc=2.1~5V Im=25~250mA Ta=-10~50°C IM=200mA, Pin 14=Vcc MIN TYP 32 0.05 0.01 0.01 38 0.5 0.05 0.02 MAX UNIT %/V %/mA %/°C 43 0.6 5.6 200 33 %/V %/mA %/°C V KΩ µA KΩ TEST CIRCUIT NOTE1 : SW12,SW12 R1,R’ =33kΩ R2,R2’ =5.1kΩ R3,R3’ =200kΩ R2,R2,=5.1kΩ C1,C’ =0.1µF NOTE2 : UTC See figure 1 for SW UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R110-013,A UTC LAG665F LINEAR INTEGRATED CIRCUIT FIGURE 1 Item Symbol SW No. TEST CONDITION 1 2 3,3’ 4 5 6 7 8 9 10 11 Vcc=3V,f=1kHz,RL=16Ω c c a b b a b b b a a b b b b b a b b b a a Im=0mA b b b b b a b b b a a Vo=244mV b b b b b a b b b a a Vo=400mV c c b b b a b b b a a B.P.F.(30-20kHz) b/ c/ b b b a b b b a a Vo=244mV c b b b b a b a b b b a a Vin=100mV a a a a b a b b b a a Vr=Min, THD=10%, a a a a b a b b b a a a a a a b a b b b a a Pout=5mV a a a a b a b b b a a VR=MAX a a a a b b a b b a a RL=32Ω,THD=10% a a a a b a b b b a a RL=16Ω,THD=10% AMP Supply Current Icc Close Loop Gain Gvc Maximum Output Voltage Vom Total Harmonic Distortion THD Output Noise Voltage Von Cross Talk between CH CT Output Voltage when Pre- Vooff Off Attenuator Maximum Input Voltage Vimax Maximum Attenuation Vamax Power AMP GV Voltage Gain Channel Voltage Difference ∆GV Maximum Output Power I Pom 1 Maximum Output Power II Pom 2 UTC UNISONIC TECHNOLOGIES CO., LTD. 5 QW-R110-013,A