FAIRCHILD FQB11P06_04

®
FQB11P06 / FQI11P06
60V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as automotive,
DC/DC converters, and high efficiency switching for power
management in portable and battery operated products.
•
•
•
•
•
•
•
-11.4A, -60V, RDS(on) = 0.175Ω @VGS = -10 V
Low gate charge ( typical 13 nC)
Low Crss ( typical 45 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
175°C maximum junction temperature rating
S
!
D
●
●
G!
▶ ▲
G
S
FQB Series
●
I2-PAK
D2-PAK
G D S
FQI Series
!
D
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQB11P06 / FQI11P06
-60
Units
V
-11.4
A
-8.05
A
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
dv/dt
PD
TJ, TSTG
TL
- Pulsed
-45.6
A
± 25
V
(Note 2)
160
mJ
(Note 1)
-11.4
A
(Note 1)
5.3
-7.0
3.13
mJ
V/ns
W
53
0.35
-55 to +175
W
W/°C
°C
300
°C
(Note 1)
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
2.85
Units
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient *
--
40
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
62.5
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2004 Fairchild Semiconductor Corporation
Rev. B5, March 2004
FQB11P06 / FQI11P06
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
-60
--
--
V
--
-0.07
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
VDS = -60 V, VGS = 0 V
--
--
-1
µA
VDS = -48 V, TC = 150°C
--
--
-10
µA
Gate-Body Leakage Current, Forward
VGS = -25 V, VDS = 0 V
--
--
-100
nA
Gate-Body Leakage Current, Reverse
VGS = 25 V, VDS = 0 V
--
--
100
nA
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
-2.0
--
-4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = -10 V, ID = -5.7 A
--
0.14
0.175
Ω
gFS
Forward Transconductance
VDS = -30 V, ID = -5.7 A
--
5.1
--
S
--
420
550
pF
--
195
250
pF
--
45
60
pF
--
6.5
25
ns
--
40
90
ns
--
15
40
ns
--
45
100
ns
--
13
17
nC
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -30 V, ID = -5.7 A,
RG = 25 Ω
(Note 4, 5)
VDS = -48 V, ID = -11.4 A,
VGS = -10 V
(Note 4, 5)
--
2.0
--
nC
--
6.3
--
nC
A
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
-11.4
ISM
--
--
-45.6
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = -11.4 A
Drain-Source Diode Forward Voltage
--
--
-4.0
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -11.4 A,
dIF / dt = 100 A/µs
(Note 4)
--
83
--
ns
--
0.26
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.44mH, IAS = -11.4A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ -11.4A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2004 Fairchild Semiconductor Corporation
Rev. B5, March 2004
FQB11P06 / FQI11P06
Elerical Characteristics
FQB11P06 / FQI11P06
Typical Characteristics
VGS
- 15.0 V
- 10.0 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom : - 4.5 V
Top :
-ID, Drain Current [A]
1
0
10
※ Notes :
1. 250µ s Pulse Test
2. TC = 25℃
-1
10
10
-ID , Drain Current [A]
1
10
175℃
25℃
0
10
-55℃
※ Notes :
1. VDS = -30V
2. 250µ s Pulse Test
-1
-1
0
10
10
1
10
2
10
4
6
8
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
-IDR , Reverse Drain Current [A]
0.6
VGS = - 10V
0.4
VGS = - 20V
0.2
※ Note : TJ = 25℃
0.0
10
0
10
※ Notes :
1. VGS = 0V
2. 250µ s Pulse Test
25℃
175℃
20
30
40
10
50
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1200
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1000
Capacitance [pF]
1
10
-1
0
800
Coss
Ciss
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
600
400
Crss
200
0
-1
10
0
10
1
10
-VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2004 Fairchild Semiconductor Corporation
-VGS, Gate-Source Voltage [V]
RDS(on) [Ω],
Drain-Source On-Resistance
0.8
10
VDS = -30V
8
VDS = -48V
6
4
2
※ Note : ID = -11.4 A
0
0
2
4
6
8
10
12
14
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. B5, March 2004
(Continued)
2.5
RDS(ON), (Normalized)
Drain-Source On-Resistance
1.2
-BVDSS, (Normalized)
Drain-Source Breakdown Voltage
FQB11P06 / FQI11P06
Typical Characteristics
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = -250 µA
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = -10 V
2. ID = -5.7 A
0.5
0.0
-100
200
-50
o
0
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
12
Operation in This Area
is Limited by R DS(on)
2
10
100 µs
-ID, Drain Current [A]
-ID, Drain Current [A]
10
1 ms
1
10
10 ms
DC
0
10
※ Notes :
o
1. TC = 25 C
8
6
4
2
o
2. TJ = 175 C
3. Single Pulse
-1
10
0
1
10
0
25
2
10
10
50
Figure 9. Maximum Safe Operating Area
Zθ JC(t), Thermal Response
75
100
125
150
175
TC, Case Temperature [℃]
-VDS, Drain-Source Voltage [V]
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
10
0
※ N o te s :
1 . Z θ J C ( t) = 2 .8 5 ℃ / W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .2
0 .1
0 .0 5
10
0 .0 2
-1
PDM
0 .0 1
t1
s in g le p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2004 Fairchild Semiconductor Corporation
Rev.B5, March 2004
FQB11P06 / FQI11P06
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
200nF
12V
Qg
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
t on
VDD
VGS
td(on)
VGS
t off
tr
td(off)
tf
10%
DUT
-10V
VDS
90%
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
tp
ID
RG
VDD
DUT
-10V
tp
©2004 Fairchild Semiconductor Corporation
VDD
Time
VDS (t)
ID (t)
IAS
BVDSS
Rev. B5, March 2004
FQB11P06 / FQI11P06
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Compliment of DUT
(N-Channel)
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IRM
di/dt
IFM , Body Diode Forward Current
VDS
( DUT )
VSD
Body Diode
Forward Voltage Drop
VDD
Body Diode Recovery dv/dt
©2004 Fairchild Semiconductor Corporation
Rev.B5, March 2004
FQB11P06 / FQI11P06
Package Dimensions
4.50 ±0.20
9.90 ±0.20
+0.10
2.00 ±0.10
2.54 TYP
(0.75)
°
~3
0°
0.80 ±0.10
1.27 ±0.10
2.54 ±0.30
15.30 ±0.30
0.10 ±0.15
2.40 ±0.20
4.90 ±0.20
1.40 ±0.20
9.20 ±0.20
1.30 –0.05
1.20 ±0.20
(0.40)
D2-PAK
+0.10
0.50 –0.05
2.54 TYP
9.20 ±0.20
(2XR0.45)
4.90 ±0.20
15.30 ±0.30
10.00 ±0.20
(7.20)
(1.75)
10.00 ±0.20
(8.00)
(4.40)
0.80 ±0.10
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. B5, March 2004
(Continued)
I2-PAK
4.50 ±0.20
(0.40)
9.90 ±0.20
+0.10
MAX13.40
9.20 ±0.20
(1.46)
1.20 ±0.20
1.30 –0.05
0.80 ±0.10
2.54 TYP
2.54 TYP
10.08 ±0.20
1.47 ±0.10
MAX 3.00
(0.94)
13.08 ±0.20
)
5°
(4
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
10.00 ±0.20
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev.B5, March 2004
FQB11P06 / FQI11P06
Package Dimensions
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I9