MICREL SM802108UMG

SM802108
ClockWorks™ 10GbE & GbE (156.25MHz,
125MHz) Ultra-Low Jitter, LVPECL
Frequency Synthesizer
General Description
Features
The SM802108 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for GbE and 10GbE Ethernet clock signals.
It is based upon a unique patented RotaryWave®
architecture that provides very low phase noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes two LVPECL output clocks at 156.25MHz
and another two at 125MHz. The SM802108 accepts a 25
MHz crystal or LVCMOS reference clock.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
• Generates two LVPECL clock outputs at 156.25MHz
and two LVPECL clock outputs at 125MHz
• 2.5V or 3.3V operating range
• Typical phase jitter @ 156.25MHz
(1.875MHz to 20MHz): 110fs (typical) at 3.3V
• Industrial temperature range
• Green, RoHS, and PFOS compliant
• Available in 24-pin 4mm × 4mm QFN package
Applications
• 10Gigabit Ethernet
• Gigabit Ethernet
___________________________________________________________________________________________________________
Block Diagram
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
January 2011
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SM802108
Ordering Information
Marking
Shipping
Junction Temperature Range
Package
SM802108UMG
Part Number
802108
Tube
–40°C to +85°C
24-Pin QFN
SM802108UMGR
802108
Tape and Reel
–40°C to +85°C
24-Pin QFN
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
Pin Type
Pin Level
O, (DIF)
LVPECL
O, (DIF)
LVPECL
Pin Function
16, 17
/Q0, Q0
20, 21
/Q1, Q1
23, 24
/Q2, Q2
3, 4
/Q3, Q3
1
VDDO2
PWR
Power Supply for Output Bank 2
2
VSSO2
PWR
Power Supply Ground for Output Bank 2
Differential Clock Outputs from Bank 1
156.25MHz
Differential Clock Outputs from Bank 2
125MHz
PLL Bypass, Selects Output Source
5
PLL_BYPASS
I, (SE)
0 = Normal PLL Operation
LVCMOS
1 = Output from Input Reference Clock or Crystal
45KΩ pull-down
6
January 2011
XTAL_SEL
I, (SE)
Selects PLL Input Reference Source
LVCMOS
0 = REF_IN, 1 = XTAL, 45KΩ pull-up
2
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SM802108
Pin Description (Continued)
Pin Number
Pin Name
7, 12, 15, 19
TEST
Pin Type
Pin Level
Pin Function
8
VDD
PWR
9
REF_IN
I, (SE)
LVCMOS
10
XIN
I, (SE)
12pF crystal
11
XOUT
O, (SE)
12pF crystal
13, 14
VSS
PWR
18
VDDO1
PWR
Power Supply for Output Bank 1
22
VSSO1
PWR
Power Supply Ground for Output Bank 1
Factory Test Pins, Do not connect anything to these pins.
Core Power Supply
Reference Clock Input
See Fig. 5.
Crystal Reference Output, no load caps needed.
See Fig. 5.
Core Power Supply Ground
Application Information
Truth Table
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
Crystal Layout
Keep the layers under the crystal as open as possible.
Do not place switching signals or noisy supplies under
the crystal.
January 2011
Crystal Reference Input, no load caps needed.
3
PLL_BYPASS
XTAL_SEL
INPUT
OUTPUT
0
−
−
PLL
1
−
−
XTAL/REF_IN
−
0
REF_IN
−
−
1
XTAL
−
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SM802108
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDOx) ........................................+4.6V
Input Voltage (VIN). ............................. –0.50V to VDD + 0.5V
Lead Temperature (soldering, 20sec.)....................... 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) .........................–65°C to +150°C
Supply Voltage (VDD, VDDOx) ................. +2.375V to +3.465V
Ambient Temperature (TA) .......................... –40°C to +85°C
Junction Thermal Resistance(3)
QFN (θJA)
Still-Air.........................................................50°C/W
QFN (ψJB)
Junction-to-Board .......................................30°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C.
Symbol
Parameter
VDD, VDDOx
2.5V Operating Voltage
VDD, VDDOx
3.3V Operating Voltage
Condition
IDD
Supply current VDD + VDDO
Outputs open; REF_IN source,
XTAL_SEL = 0
IDD
Supply current VDD + VDDO
Outputs open; CRYSTAL source,
XTAL_SEL = 1
Min.
Typ.
Max.
Units
2.375
2.5
2.625
V
3.135
3.3
3.465
V
130
165
mA
145
185
mA
LVPECL DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50Ω to VDDO − 2V
Symbol
Parameter
Min.
Typ.
Max.
Units
VOH
Output High Voltage
Condition
VDDO – 1.145
VDDO – 0.97
VDDO – 0.845
V
VOL
Output Low Voltage
VDDO – 1.945
VDDO – 1.77
VDDO – 1.645
V
VSWING
Output Voltage Swing
0.6
0.8
1.0
V
Note:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4.
The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
January 2011
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SM802108
LVCMOS (PLL_BYPASS, XTAL_SEL) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
Condition
VIH
Input High Voltage
VIN
Input Low Voltage
IIH
Input High Current
VDD = VIN = 3.465V
IIL
Input Low Current
VDD = 3.465V, VIN = 0V
Min.
Typ.
Max.
Units
2
VDD + 0.3
V
−0.3
0.8
V
150
μA
−5
μA
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
Condition
VIH
Input High Voltage
VIL
Input Low Voltage
IIN
Input Current
XTAL_SEL = VIL, VIN = 0V to VDD
IIN
Input Current
XTAL_SEL = VIH, VIN = VDD
Min.
Typ.
Max.
Units
1.1
VDD + 0.3
V
−0.3
0.6
V
−5
5
μA
20
µA
Crystal Characteristics
NDK NX2520SA
Parameter
Condition
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
12pF Load
January 2011
Min.
Typ.
Max.
Fundamental, Parallel Resonant
25
50
3
7
100
300
5
Units
MHz
Ω
pF
uW
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SM802108
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50Ω to VDDO − 2V
Symbol
Parameter
Condition
Min.
Typ.
FOUT1
Output Frequency 1
156.25
FOUT2
Output Frequency 2
125
Ppm
Output ppm Variation
FREF
Reference Input Frequency
TR/TF
LVPECL Output Rise/Fall Time
ODC
Output Duty Cycle
TSKEW
Output-to-Output Skew
TLOCK
PLL Lock Time
Crystal reference. Note 6
RMS Phase Jitter
Units
MHz
50
25
20% – 80%
175
350
48
50
52
%
45
ps
20
ms
Spurious Noise Components
6.25MHz
25MHz
ps
110
250
(8)
125MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
ppm
MHz
80
Within bank. Note 7
156.25MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
Tjit(∅)
−50
Max.
fs
110
250
-73
-58
dBc
Notes:
5.
All phase noise measurements were taken with an Agilent 5052B phase noise system.
6.
Crystal tolerance at room less than +/- 15ppm, over temp less than +/- 20ppm.
7.
Defined as skew between outputs at the same supply voltage and with equal load conditions and same frequency; Measured at the output
differential crossing points.
8.
Measured using 25MHz crystal as the input reference source.
January 2011
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SM802108
Phase Noise Plots
Phase Noise Plot: 156.25MHz, 1.875MHz − 20MHz 108fS
Phase Noise Plot: 156.25MHz, 12kHz − 20MHz 253fS
January 2011
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SM802108
Phase Noise Plots (Continued)
Phase Noise Plot: 125MHz, 1.875MHz − 20MHz 111fS
Phase Noise Plot: 125MHz, 12kHz − 20MHz 257fS
January 2011
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SM802108
Figure 1. Duty Cycle TIming
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise/Jitter
January 2011
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SM802108
Figure 4. LVPECL Output Load and Test Circuit
Figure 5. Crystal Input Interface
January 2011
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SM802108
Package Information
24-Pin QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2011 Micrel, Incorporated.
January 2011
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