3.3V 3.2Gbps CML Low Power Limiting Post Amplifier with TTL LOS SY88973BL General Description Features The SY88973BL low-power, limiting post amplifier is designed for use in fiber optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88973BL quantizes these signals and outputs typically 800mVPP voltage-limited waveforms. The SY88973BL operates from a single +3.3V ±10% power supply, over an industrial temperature range of –40°C to +85°C. With its wide bandwidth and high gain, signals with data rates up to 3.2Gbps and as small as 10mVPP can be amplified to drive devices with CML inputs or AC-coupled PECL inputs. The SY88973BL incorporates a loss-of-signal (LOS), opencollector TTL output with external 4.75kΩ to 10kΩ pull-up resistor to fully comply with SFP MSA. A programmable, lossof-signal level-set pin (LOSLVL) sets the sensitivity of the input amplitude detection. LOS asserts high if the input amplitude falls below the threshold sets by LOSLVL and deasserts low otherwise. LOS can be fed back to the enable (/EN) input to maintain output stability under a loss-of-signal condition. /EN de-asserts the true output signal without removing the input signal. Typically, 4.6dB LOS hysteresis is provided to prevent chattering. Please see Micrel’s website at www.micrel.com for a complete selection of optical module ICs. All support documentation can be found on Micrel’s web site at: www.micrel.com. • • • • • Typical Performance Multi-rate up to 3.2Gbps operation Wide gain-bandwidth product 38dB differential gain 2GHz 3dB bandwidth Low noise 50Ω CML data outputs – 800mVPP output swing – 60ps edge rates – 5psRMS typ. random jitter – 15psPP typ. deterministic jitter • Chatter-free, Loss-of-Signal (LOS) output – No internal pull-up resistor− fully compliant with SFP MSA – 4.6dB electrical hysteresis – OC-TTL output • Programmable LOS sensitivity using single external resistor • Internal 50Ω data input termination • TTL /EN input allows feedback from LOS • Wide operating range: – Single 3.3V ±10% – –40°C to +85°C industrial temperature range • Available in a tiny 3mm x 3mm 16-pin MLF® package Applications • 1.25Gbps and 2.5Gbps Gigabit Ethernet • 1.062Mbps and 2.125Gbps Fibre Channel • 155Mbps, 622Gbps, 1.25Gbps, and 2.5Gbps SONET/SDH • Gigabit interface converter (GBIC) • Small form factor (SFF) and small form factor pluggable (SFP) transceivers • Parallel 10G Ethernet • High-gain line driver and line receiver Markets • Telecom/datacom • Optical transceiver MLF and MicroLeadFrame are registered trademark of Amkor Technology Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com February 2007 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Typical Application Circuit Ordering Information(1) Package Type Operating Range Package Marking Lead Finish SY88973BLMG(3) MLF-16 Industrial 973B with Pb-Free bar-line indicator Pb-Free Matte-Sn SY88973BLMGTR(2, 3) MLF-16 Industrial 973B with Pb-Free bar-line indicator Pb-Free Matte-Sn Part Number Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. February 2007 2 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Pin Configuration 16-pin MLF ® (MLF -16) Pin Description Pin Number ® (MLF ) Pin Name Type 15 /EN TTL Input: Default is high. 1, 4 DIN, /DIN Differential Data Input 6 REF 14 LOSLVL Input: Default is maximum sensitivity 2, 3, 10, 11 Exposed Pad GND Ground 7 LOS Open Collector TTL Output 9, 12 DOUT, /DOUT Differential CML Output 5, 8, 13, 16 VCC Power Supply February 2007 Pin Function Enable: De-asserts true data output when high. Incorporates 25kΩ pull-up to VCC. Differential data input. Each pin internally terminates to REF through 50Ω. Reference Voltage: Bypass with 0.01µF low ESR capacitor from REF to VCC to stabilize LOSLVL and REF. Loss-of-Signal Level Set: A resistor from this pin to VCC sets the threshold for the data input amplitude at which the LOS output will be asserted. Device ground. Exposed pad must be soldered (or equivalent) to the same potential as the ground pins. Loss-of-Signal: asserts high when the data input amplitude falls below the threshold set by LOSLVL. For proper operation, connect an external 4.75kΩ to 10kΩ pull-up resistor between this pin and Vcc. Differential data output. Positive power supply. Bypass with 0.1µF|| 0.01µF low ESR capacitors. 0.01µF capacitors should be as close as possible to VCC pins. 3 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Functional Block Diagram February 2007 4 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC)........................................... 0V to 4.0V /EN, LOSLVL Voltage ........................................... 0V to VCC REF Current ................................................................±1mA LOS Current ................................................................±5mA DOUT, /DOUT Current..............................................±25mA DIN, /DIN Current......................................................±10mA Lead Temperature (soldering, 20sec.)....................... 260°C Storage Temperature (Ts) .........................–65°C to +150°C Supply Voltage (VCC)................................. +3.0V to +3.6V Ambient Temperature (TA).......................–40°C to +85°C Junction Temperature (TJ) .....................–40°C to +120°C Package Thermal Resistance MLF® θJA (Still-Air) .................................................61°C/W ψJB ..............................................................38°C/W DC Electrical Characteristics VCC = 3.0V to 3.6V; TA = –40°C to +85°C, typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter Condition ICC Power Supply Current Note 4 Note 5 VREF REF Voltage VLOSLVL LOSLVL Voltage Range VOH Output HIGH Voltage Min Typ Max Units 28 45 42 62 mA mA VCC V V VCC–1.3 VREF V Note 6 VCC–0.020 VCC–0.005 VCC VCC–0.475 VCC–0.400 VCC–0.350 V ±80 mV VOL Output LOW Voltage Note 6 VOFFSET Differential Output Offset Note 6 ZO Single-Ended Output Impedance 40 50 60 Ω ZI Single-Ended Input Impedance 40 50 60 Ω Min Typ Max Units TTL DC Electrical Characteristics VCC = 3.0V to 3.6V; TA = –40°C to +85°C. Symbol Parameter Condition IOH LOS Output Leakage VOH = 3.6V 100 uA VOL LOS Output LOW Level Sinking 2mA 0.5 V VIH /EN Input HIGH Voltage VIL /EN Input LOW Voltage IIH /EN Input HIGH Current IIL /EN Input LOW Current 2.0 V 0.8 V VIN = 2.7V 20 µA VIN = VCC 100 µA VIN = 0.5V –300 uA Notes: 1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Thermal performance assumes the use of 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device's most negative potential on the PCB. 4. Excludes current of CML output stage. See “Detailed Description.” 5. Total device current with no output load. 6. Output levels are based on a 50Ω to VCC load impedance. If the load impedance is different, the output level will be changed. Amplifier is in limiting mode. February 2007 5 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL AC Electrical Characteristics(4) VCC = 3.0V to 3.6V; TA = –40°C to +85°C, RLOAD = 50Ω to VCC; typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter Condition Min Typ PSRR Power Supply Rejection Ratio tr, tf Output Rise/Fall Times (20% to 80%) Note 7 60 tJITTER Deterministic Random Note 8 15 5 VID Differential Input Voltage Swing Max Units 35 10 dB 120 ps psPP psRMS 1800 mVPP VOD Differential Output Voltage Swing Note 7 700 800 950 mVPP HYS LOS Hysteresis Note 9 2 4.6 8 dB tOFF LOS Release Time 0.1 0.5 µs 0.2 0.5 µs 35 mVPP tON LOS Assert Time VSR LOS Sensitivity Range B–3dB –3dB Bandwidth AV(Diff) Differential Voltage Gain S21 Single-Ended Small-Signal Gain Note 10 10 2.0 GHz 32 38 dB 26 32 dB Notes: 7. Amplifier in limiting mode. Input is a 200MHz square wave, tr < 300ps. 8. Deterministic jitter measured using 2.488Gbps K28.5 pattern, VID = 10mVPP. Random jitter measured using 2.488Gbps K28.7 pattern, VID = 10mVPP. 9. Electrical signal. 10. This is the detectable range of input amplitudes that can assert LOS. The input amplitude to de-assert LOS is 2–8dB higher than the assert amplitude. See “Typical Operating Characteristics” for graphs showing how to choose a particular VLOSLVL or RLOSLVL for a particular LOS assert, and its associated de-assert amplitude. If increased LOS sensitivity and hysteresis are required, an application note entitled: “Notes on Sensitivity and Hysteresis in Micrel Post Amplifiers” is available at http://www.micrel.com/_PDF/HBW/App-Notes/an-45.pdf. February 2007 6 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Typical Operating Characteristics VCC = 3.3V, TA = 25ºC, RLOAD = 50Ω to VCC, unless otherwise noted. February 2007 7 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. Description The SY88973BL low-power, limiting post amplifier operates from a single +3.3V ±10% power supply, over an industrial temperature range of –40°C to +85°C. Signals with data rates up to 3.2Gbps and as small as 10mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88973BL generates a LOS output, providing feedback to /EN for output stability. LOSLVL sets the sensitivity of the input amplitude detection. Input Amplifier/Buffer The SY88973BL’s inputs are internally terminated with 50Ω-to-REF. Unless unaffected by this internal termination scheme, upstream devices need to be AC-coupled to the SY88973BL’s inputs. Figure 2 shows a simplified schematic of the input structure. The high sensitivity of the input amplifier detects and amplifies signals as small as 10mVPP. The input amplifier allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typical 38dB differential voltage gain. Since it is a limiting amplifier, the SY88973BL outputs, typically 800mVPP, voltage-limited waveforms for input signals that are greater than 10mVPP. Applications requiring the SY88973BL to operate with high gain should have the upstream TIA placed as close as possible to the SY88973BL’s input pins to ensure the device’s best performance. Output Buffer The SY88973BL’s CML output buffer is designed to drive 50Ω lines. The output buffer requires appropriate termination for proper operation. An external 50Ω resistorto-VCC or equivalent for each output pin provides this. Figure 3 shows a simplified schematic of the output structure and includes an appropriate termination method. Of course, driving a downstream device with a CML input that is internally terminated with 50Ω-to-VCC eliminates the need for external termination. As noted in the previous section, the amplifier outputs, typically, 800mVPP, waveforms across 25Ω total loads. The output buffer, thus, switches typically 16mA tail-current. Figure 4 shows the power supply current measurement which excludes the 16mA tail-current. Loss-of-Signal (LOS) The SY88973BL incorporates a chatter-free, LOS opencollector TTL output. For proper operation, an external 4.75kΩ to 10kΩ pull-up resistor between LOS and Vcc is required. LOS is used to determine that the input amplitude is too small to be considered a valid input. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. LOS can be fed back to the enable (/EN) input to maintain output February 2007 SY88973BL stability under a loss of signal condition. /EN de-assert low the true output signal without removing the input signals. Typically, 4.6dB LOS hysteresis is provided to prevent chattering. Loss-of-Signal Level Set A programmable, loss-of-signal level set pin sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and LOSLVL sets the voltage at LOSLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and REF as shown in Figure 6. If desired, an appropriate external voltage may be applied rather than using a resistor. The relationship between VLOSLVL and RLOSLVL is given by: V LOSLVL = VCC − 1.3 R LOSLVL R LOSLVL + 2.8 where voltages are in volts and resistances are in kΩ. The smaller the external resistor, which implies a smaller voltage difference from LOSLVL to VCC, the lower the LOS sensitivity. Hence, larger input amplitude is required to deassert LOS. The “Typical Operating Characteristics” section contains graphs showing the relationship between the input amplitude detection sensitivity and VLOSLVL or RLOSLVL. Hysteresis The SY88973BL provides typically 4.6dB LOS electrical hysteresis. By definition, a power ratio measured in dB is 10log (power ratio). Power is calculated as V2IN/R for an electrical signal. Hence, the same ratio can be stated as 20log (voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and the ratios change linearly as well. Therefore, the optical hysteresis in dB is half the electrical hysteresis in dB given in the datasheet. The SY88973BL provides typically 2.3dB LOS optical hysteresis. As the SY88973BL is an electrical device, this datasheet refers to hysteresis in electrical terms. With 4.6dB LOS hysteresis, a voltage factor of 1.7 is required to de-assert LOS. Hysteresis and Sensitivity Improvement If increased LOS sensitivity and hysteresis are required, an application note entitled “Notes on Sensitivity and Hysteresis in Micrel Post Amplifiers” is available at: http://www.micrel.com/_PDF/HBW/App-Notes/an-45.pdf. 8 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Figure 1. VIS and VID Definition Figure 3. Output Structure Figure 2. Input Structure Figure 5. LOS Output Structure Figure 4. Power Supply Current Measurement Figure 6. LOSLVL Setting Circuit February 2007 9 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL Package Information 16-Pin MicroLeadFrame® (MLF-16) February 2007 10 M9999-020207-A [email protected] or (408) 955-1690 Micrel, Inc. SY88973BL PCB Thermal Consideration for 16-Pin MLF® Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pad must be soldered to a ground for proper thermal management; solder void has to be less than 50% of the epad area. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2007 Micrel, Incorporated. February 2007 11 M9999-020207-A [email protected] or (408) 955-1690