Ordering number : EN7817A Monolithic Linear IC LA6565 For CD and DVD players 5-channel Driver (BTL:4ch,H-bridge:1ch) Overview The LA6565 is a 4-channel BTL plus 1-channel H-bridge actuator driver developed for use in CD and DVD drives. The BTL driver channels 1 and 2 include built-in operational amplifiers allowing the LA6565 to support a wide range of applications. Functions • Five power amplifier channels on a single chip (Bridge connection (BTL): 4-channels, H-bridge: 1-channel) • IO max: 1A • Built-in level shifters (except for the H bridge channel) • Muting circuits (output on/off, two systems) (The muting circuits operate for the BTL amplifiers. They do not apply to the H-bridge or regulator circuits.) • Built-in regulator (Uses an external PNP-transistor and is set with an external resistor.) • Output voltage setting function (loading driver) • Built-in independent operational amplifiers • Thermal shutdown circuit Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC max Maximum output current IO max Maximum input voltage VINB 13 V MUTE pin voltage VMUTE 13 V Allowable power dissipation Pd max 0.8 W 2 W Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C Independent IC Mounted on a specified board * 14 V 1 A * Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 21809 MS 20090209-S00003 / 52404TN (OT) No.7817-1/8 LA6565 Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol Conditions Ratings VCC Unit 5.6 to 13 V Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8V, VREF = 2.5V Parameter Symbol Ratings Conditions min typ Unit max Overall Quiescent current when o ICC-ON BTL amplifier output on, loading block off *1 Quiescent current when off ICC-OFF All outputs off *1 Thermal shutdown circuit TSD *7 30 50 mA 10 15 mA 175 200 °C -10 +10 mV 1 VCC-1.5 150 operating temperature VREF Amplifier VREF amplifier offset voltage VREF-OFFSET VREF input voltage range VREF-IN VREF-OUT output current I-VREF-OUT V 1 mA Operational Amplifier (Independent) Input voltage range VIN(OP) 0 Output current (sink) SINK(OP) 2 Output current (source) SOURCE(OP) 300 Output offset voltage VOFF(OP) -10 Residual current (sink) VCE-SINK(OP) VCC-1.5 V mA µA 500 IO(sink side) = 1mA +10 mV 0.6 V +50 mV BTL Amplifier Block (Channels 1 to 4) Output offset voltage VOFF The voltage difference between each channel -50 outputs *2, *3 Input voltage range VIN Input voltage range of the input operational amplifiers 0 Output voltage VO IO = 0.5A, the voltage between VO+ and VO- in each 5.7 6.2 VCC-1.5 Closed circuit voltage gain VG The gain from the input to the output with the input 7.2 8 V V channel 9 times amplifier set to 0dB*2, *3 Slew rate SR SR For the independent amplifier. Times 2 when 0.5 V/µs between outputs.*7 Muting on voltage VMUTE-ON The output on voltage, for each mute function *4 Muting off voltage VMUTE-OFF The output off voltage, for each mute function *4 2.5 V 0.5 V Input Amplifier Block (Channels 1 and 2) Input voltage range VIN-OP 0 Output current (sink) SINK-OP 2 Output current (source) SOURCE-OP Output offset voltage VOFF-OP *5 300 VCC-1.5 V mA µA 500 -10 +10 mV Loading Block (Channel 5, H bridge circuit) Output voltage VO-LOAD For forward/reverse operation, IO = 0.5A, VCONT = VCC* Braking output saturation VCE-BREAK The output voltage during braking *6 5.7 6.5 V 0.3 V 1 V voltage Low-level input voltage VIN-L High-level input voltage VIN-H 2 V Power Supply Block (Uses an external 2SB632K PNP-transistor) Power supply output VOUT IO = 200mA REG-IN sink current REG-IN-SINK External PNP-transistor base current 1.260 1.285 5 10 1.310 V Line regulation ∆VOLN 6V ≤ VCC ≤ 12V, IO = 200mA 10 100 mV Load regulation ∆VOLD 5mA ≤ IO ≤ 200mA 10 100 mV mA *1: The total current dissipation for VCCP1, VCCP2, and VCCS with no load. *2: The input amplifier is a buffer amplifier. *3: The voltage difference between the two sides of the load (12Ω). *4: When the MUTE pin is high, the output will be on, and when low, the output will be off (high-impedance state). *5: The input operational amplifier source is constant current. Since the 11kΩ resistor between this and the next stage functions as the load, the input operational amplifier gain must be set carefully. *6: The braking operation is a short (to ground) braking operation. The sink side output is on at this time. *7: Design guarantee. No.7817-2/8 LA6565 Package Dimensions unit : mm (typ) 3251 Pd max -- Ta Allowable power dissipation, Pd max -- W 2.5 17.8 (6.2) 19 1 0.8 2.0 18 0.3 0.25 2.45max (2.25) (0.5) 0.65 (4.9) 7.9 10.5 36 2.0 1.5 1.0 0.8 1.04 Independent IC 0.5 0 -40 0.42 -20 0 20 40 60 80 100 Ambient temperature, Ta -- °C 0.1 2.7 Specified board: 114.3×76.1×1.6mm3 glass epoxy boaard. With specified board SANYO : HSOP36R(375mil) Pin Assignment FWD 1 36 S_GND REV 2 35 VCONT VCC2 3 34 MUTE1 VLO− 4 33 MUTE234 VLO+ 5 32 VIN4− VO4+ 6 31 VIN4 VO4− 7 30 VREF_IN VO3+ 8 29 VREF_OUT VO3− 9 28 REG_OUT FR FR VO2+ 10 27 REG_IN VO2− 11 26 VIN+OP VO1− 12 25 VIN−OP VO1+ 13 24 VO_OP VCCP1 14 23 VIN3 VCCS 15 22 VIN3− VIN1+ 16 21 VIN2 VIN1− 17 20 VIN2− VIN1 18 19 VIN2+ Top View No.7817-3/8 LA6565 Block Diagram Thermal shutdown circuit Input FWD 1 Signal system ground (LOAD output voltage setting) FWD 2 Output control VCCP2 3 VLO− 4 VLO+ 5 VO4− 7 VO3− 9 to VREF_OUT 33 MUTE234 31 VIN4 30 VREF_IN 29 VREF_OUT 28 REG_OUT (VCC) VCC FR 34 MUTE1 32 VIN4− 11kΩ Level shift VO3+ 8 35 VCONT 44kΩ Level shift VO4+ 6 MUTE CH1 Turms the corresponding channel ON/OFF High: output ON CH2,3,4 Low: output OFF 36 S_GND Power system ground REG_IN Power system ground FR VO2− 11 VO1− 12 VO1+ 13 Level shift VO2+ 10 27 REG-IN Level shift REG_OUT 25 VIN−OP 26 VIN+OP 24 VO_OP 23 VIN3 VCCP1 14 44kΩ VIN1 15 VIN1+ 16 VIN1− 17 VIN1 18 Signal system power supply 22 VIN3− 11kΩ to VREF_OUT 44kΩ 11kΩ 44kΩ 11kΩ 21 VIN2 20 VIN2− 19 VIN2+ No.7817-4/8 LA6565 Pin Function Pin No. 1 Pin name FWD Pin function Loading output direction switching (FWD). Loading system logic input. 2 REV Loading output direction switching (REV). Loading system logic input. 3 Channels 3, 4, and loading power stage power supply. 13 VCC2 VLO− VLO+ VO4+ VO4− VO3+ VO3− VO2+ VO2− VO1− VO1+ 14 VCCP1 Channels 1 and 2 power stage power supply. 15 VCCS VIN1+ VIN1− Channel 1 input. Input operational amplifier + input. VIN1 VIN2+ VIN2− Channel 2 input. Input operational amplifier + input. 4 5 6 7 8 9 10 11 12 16 17 18 19 20 21 Loading output (−) Loading output (+) Channel 4 output (+) Channel 4 output (−) Channel 3 output (+) Channel 3 output (−) Channel 2 output (+) Channel 2 output (−) Channel 1 output (−) Channel 1 output (+) Signal system power supply. Channel 1 input. Input operational amplifier − input. Channel 1 input. Input operational amplifier output. Channel 2 input. Input operational amplifier − input. 22 VIN2 VIN3− Channel 3 input. Input operational amplifier − input. 23 VIN3 Channel 3 input. Input operational amplifier output. 24 Operational amplifier output. 26 VO_OP VIN−OP VIN+OP Operational amplifier + input 27 REG_IN Regulator error amplifier output. Connect this pin to the base of the external PNP-transistor. 25 Channel 2 input. Input operational amplifier output. Operational amplifier − input 28 REG_OUT Regulator error amplifier input (+). 29 VREF_OUT VREF amplifier (voltage follower) output. 30 VREF_IN VREF input. Apply the external reference voltage to this pin. 31 32 VIN4 VIN4− Channel 4 input. Input operational amplifier − input. 33 MUTE234 Controls the on/off state of channels 2, 3, and 4. 34 MUTE1 Channel 1 output on/off control 35 VCONT Loading block output high-level voltage setting. 36 S_GND Signal system ground. Channel 4 input. Input operational amplifier output. * center frame (FR) becomes GND for the power system, Set this to the minimum potential together with S_GND (signal system ground). No.7817-5/8 LA6565 Pin Description Pin No. 16 17 Pin name VIN1+ VIN1− Function Input (CH1 to 4) 25 24 VO_OP 1 FWD Input 2 REV (H-bridge) 19 20 21 22 23 32 31 26 Equivalent circuit VIN* independent operational amplifier) VIN1 VIN2+ VIN2− VIN2 VIN3− VIN3 VIN4− VIN4 VIN+OP VIN−OP 18 Description Inputs (channels 1 to 4 and the VCCS 300Ω VIN*+ 300Ω 300Ω VIN*− S-GND Logic inputs. The IC is set to one of four modes, forward, reverse, brake, and free running by the combination of FWD REV 50kΩ 50kΩ these pins. 50kΩ 50kΩ high and low values applied to S-GND 10 11 8 9 6 7 VO1+ VO1− VO2+ VO2− VO3+ VO3− VO4+ VO4− Output Channel 1 to 4 outputs. VCCP (BTL-AMP) 1kΩ 13 VO* 1kΩ 12 FR 4 5 VLO− VLO+ Output H-bridge (loading) output. (H-bridge) VCCP2 VLO+ VLO− 1kΩ 1kΩ S_GND 33 MUTE234 34 MUTE1 Input MUTE Loading output setting. BTL amplifier output ON/OFF state setting. High: output ON Low: output OFF VCCS MUTE* S-GND 40kΩ VCONT 20kΩ 10kΩ 20kΩ 35 VCONT 20kΩ No.7817-6/8 LA6565 Truth Table (Loading (H bridge) block) FWD L H REV VLO+ VLO− Loading output L OFF OFF OFF *1 H H L Forward L L H Reverse H L L Short-circuit braking *2 *1. The output goes to the high-impedance state. *2. In braking mode, the sink side transistor is turned on (for short-circuit braking). The VLO+ and VLO− pins go to a level that is essentially the ground level. Relationship between the MUTE pins and the power supply systems (VCCP*) MUTE1 CH1 (BTL) VCCP1 CH2 (BTL) CH3 (BTL) MUTE2 CH4 (BTL) VCCP2 CH5 (H-bridge) Application Circuit Example MUTE234 MUTE1 LOADING 0.1µF LOADING MOTER 1 FWD S_GND 36 2 REV VCONT 35 3 VCCP2 MUTE1 34 4 VLO− MUTE234 33 5 VLO+ VIN4− 32 6 VO4+ VIN4 31 7 VO4− VREF_IN 30 8 VO3+ VREF_OUT 29 9 VO3− REG_OUT 28 M 2.2Ω 0.1µF TRACKING COIL 2.2Ω 0.1µF FOCUS COIL 2.2Ω FR LB6565 FR REG 0.1µF SLED MOTOR 2.2Ω 0.1µF SPINDLE MOTOR REG_IN 27 11 VO2− VIN+OP 26 12 VO1+ VIN−OP 25 13 VO1− VO_OP 24 VCC M 2.2Ω VCC 10 VO2+ M 14 VCCP1 VIN3 23 15 VCCS VIN3− 22 16 VIN1+ VIN2 21 17 VIN1− VIN2− 20 18 VIN1 VIN2+ 19 TRACKING FOCUS SLED SPINDLE VREF No.7817-7/8 LA6565 SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of February, 2009. Specifications and information herein are subject to change without notice. PS No.7817-8/8