Ordering number : ENA0600 Monolithic Linear IC LA6579H For CD-R Four-Channel Bridge (BTL) Driver Overview The LA6579H is a 4-channel bridge (BTL) driver for CD-R. Functions • Bridge-connected (BTL) power amplifier incorporating four channels • IO max 1A • Level shift circuit incorporated • MUTE circuit (all circuits ON/OFF) • High output voltage (dynamic range) (6.5V : TYP, CH1 only) • Input OP-AMP incorporated (CH1 only) • Input OP-AMP (CH1) selector function incorporated Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Allowable power dissipation Maximum input voltage Symbol Conditions Ratings Unit VCC max *1 14 VCC_P* VCCP1, VCCP2 *1 14 V Pd max Independent IC 0.8 W Specified board 1.8 W 13 V VINB Maximum output current IO max MUTE pin voltage VMUTE Each output V 1 A 13 V Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +150 °C * Specified board size : 114.3×76.1×1.6mm3, glass epoxy. *1 Note : Connect power pins of VCC_S, VCC_P1 and VCC_P2 externally. Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings Unit 5 to 13 V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. D1306 MS PC B8-6145 No.A0600-1/8 LA6579H Electrical Characteristics at Ta = 25°C, VCC_S = VCC_P1 = VCC_P2 = 8V, VREF = 1.65V, MUTE = 3.3V unless especially specified. Parameter Symbol Ratings Conditions min typ Unit max ALL Blocks No-load current drain ON 1 No-load current drain ON 2 ICC-ON All outputs ON, MUTE:HI ICC-OFF All channels ON, MUTE:LOW MUTE ON voltage VMUTE-ON MUTE *1 MUTE OFF voltage VMUTE-OFF MUTE *1 30 45 mA 5 10 mA 0.5 V 50 mV 2 V Output AMP Block (BTL-AMP) (CH1) Input AMP offset voltage CH1, input OP-AMP_A and B -50 Output voltage VOFF_OP-AMP VO1 RL=8Ω *2 6.2 Input and output gain VG1 *3 5.4 Slew rate SR1 AMP Independent 6.5 V 6 6.6 Times 0.5 V/μs Multiply 2 between outputs. *3 Input OP_AMP Output offset voltage VOFF1 OP-AMP_SINK Input OP-AMP_A and B OP_SINK OP-AMP_SOURCE -10 Input OP-AMP, SINK current OP_SOURCE 10 mV 2 Input OP-AMP, SOUECE current mA 300 μA 500 [Input OP_AMP changeover] Input AMP changeover voltage 1 VIN1-SW Select CH1, input OP-AMP_B *5 1 Input AMP changeover voltage 2 VIN1-SW Select CH1, input OP-AMP_B *5 2 0.5 V V Output AMP (CH2 to 4) Output offset voltage VOFF2 Between + and – outputs of each CH Output voltage VO2 Between each plus and minus outputs *2 Input and output gain VG2 *3 Slew rate SR2 AMP Independent -50 50 5 mV 5.4 5.4 V 6 6.6 Times 0.5 V/μs Multiply 2 between outputs. *3 3.3V power supply 3.3 VREG output voltage 3.3VREG REG-IN SINK current IO = 200mA REG-IN-SINK Base current of external PNP transistor 3.18 3.3 5 10 3.42 V mA Line regulation ΔVOLN 6V ≤ VCC ≤ 12V, IO = 200mA 20 150 mV Load regulation ΔVOLD 5mA ≤ IO ≤ 200mA 50 200 mV Note *1 : MUTE output ON with HI and OFF with LOW (AMP output OFF with HI impedance). Operative for all channels. *2 : Voltage at both ends of an 8Ω load inserted between outputs. H or L for input. Output in the saturation condition. *3 : CH1 input OP_AMP at 0dB (BUFFER) *4 : Design guarantee value *5 : OP-AMP_A is operated when VIN_SW is H. OP-AMP_B is operated when it is L. Package Dimensions unit : mm (typ) 3234B Pd max -- Ta 15.2 (6.2) 0.65 7.9 10.5 15 (4.9) 28 14 1 0.8 2.0 0.25 0.3 2.7 0.1 (2.25) 2.45 max (0.8) Allowable power dissipation, Pd max – W HEAT SPREADER 2.5 Specified board : 114.3×76.1×1.6mm3 glass epoxy 2 1.80 When mounted on a board 1.5 1 0.5 0 --30 --20 SANYO : HSOP28HC(375mil) 0.94 Independent IC 0.80 0.42 0 20 40 60 80 100 Ambient temperature, Ta – °C No.A0600-2/8 LA6579H Block Diagram [H] VIN1-A 1 VIN1_SW [H] : OP-AMP_A [L] : OP-AMP_B 28 VIN1 [L] VIN1+A 2 27 VIN1-B VCCP1 3 26 VIN1+B VO1+ 4 25 S-GND 24 VIN1-SW 23 MUTE 22 VREFIN FR FR 21 VCCS 20 3.3VREG 19 REGIN 18 VIN2G 17 VIN2 16 VIN3G 15 VIN3 33kΩ Level shift VO1- 5 11kΩ Signal system power supply All output ON/OFF 6 VO2- 7 FR FR Power system GND 8 9 VO4+ 10 VO4- 11 MUTE Signal system power supply 3.3VREG (External PNP Tr) Level shift VO3- H : ON L : OFF Power system GND Level shift VO3+ Level shift VO2+ 33kΩ 11kΩ VCCP2 12 33kΩ 11kΩ VIN4 13 33kΩ 11kΩ VIN4G 14 No.A0600-3/8 LA6579H Pin Functions Pin No. Symbol 1 VIN1-A CH1 input AMP_A inverted input Pin descriptions 2 VIN1+A CH1 input AMP_A non-inverted input 3 VCCP1 CH1 and CH2 power stage power supply 4 VO1+ Output pin (+) for channel 1 5 VO1- CH1 Output pin (-) for channel 1 6 VO2+ Output pin (+) for channel 2 7 VO2- Output pin (-) for channel 2 8 VO3+ Output pin (+) for channel 3 Output pin (-) for channel 3 9 VO3- 10 VO4+ Output pin (+) for channel 4 11 VO4- Output pin (-) for channel 4 12 VCCP2 13 VIN4 14 VIN4G 15 VIN3 16 VIN3G 17 VIN2 18 VIN2G 19 REGIN 20 3.3VREG 21 VCCS 22 VREFIN 23 MUTE 24 VIN1_SW CH3 and CH4 power stage power supply Input pin for channel 4 Input pin for channel 4 (for gain adjustment) Input pin for channel 3 Input pin for channel 3 (for gain adjustment) Input pin for channel 2 Input pin for channel 2 (for gain adjustment) External PNP transistor, base connection 3.3VREG output pin, external PNP transistor, collector connection Signal system GND Reference voltage application pin Output ON/OFF pin CH1 input OP_AMP changeover pin 25 S_GND Signal system GND 26 VIN1+B CH1 AMP_B non-inverted input pin 27 VIN1-B CH1 AMP_B inverted input pin 28 VIN1 CH1 input pin, input OP_AMP output pin Note : The center frame (FR) becomes GND (P-GND) for the power system. Keep this at the minimum potential together with the signal GND (S-GND). Short-circuit VCC_S (signal system power supply), VCCP1, and VCCP2 (output stage power supply) externally. No.A0600-4/8 LA6579H MUTE, VREF-SW Relation of MUTE and VREF-SW Output MUTE CH1 *1 *2 CH2 CH3 H ON L OFF CH4 Output to be HI impedance with output OFF. MUTE operative for all channels. VIN1_SW and CH1 input OP_AMP VIN1_SW CH1 input OP_AMP H AMP_A L AMP_B Internal reference voltage (2.5V (TYP)) External reference voltage VIN1-B VIN1-A VIN1-SW 0.5V 2V On MUTE MUTE Output AMP L OFF H ON Outline of inputs and outputs 66kΩ 11kΩ 11kΩ VIN+ Level shift VIN* VIN- 22kΩ VO1+ 66kΩ 22kΩ VO1- VREF-IN Input OP_AMP to be applied to CH1 only No.A0600-5/8 LA6579H Pin Description Pin No. 28 27 26 18 17 16 Symbol VIN1 VIN1-B Input Description 13 VIN4 VIN*- VCC VIN* the gain of this input AMP. VIN2 VIN3G 14 Equivalent circuit Input pin Set the total gain with VIN1+B VIN2G VIN3 VIN4G 15 Pin function VIN*+ S-GND 4 5 6 7 8 9 VO1+ VO1- Output VO2+ VO2- Output CH2 to 4 output pins (CH2 to 4) VO3+ VO3- 11 VO4+ VO4- 23 MUTE 10 Output pin for channel 1 (CH1) MUTE ON/OFF of corresponding CH VCC1 output MUTE : H output ON MUTE : L output OFF * Output OFF when the MUTE pin is open MUTE 100kΩ (similarly to MUTE : L) 100kΩ S-GND 24 VIN1_SW CH1 CH1 input OP-AMP Input AMP changeover function. changeover AMP_A or AMP_B is selected according to the voltage applied to VIN1_SW. H : VIN_A VIN1_SW L : VIN_B No.A0600-6/8 LA6579H Sample Application Circuit 1 VIN1-A VIN1 28 2 VIN1+A VIN1-B 27 3 VCCP1 VIN1+B 26 4 VO1+ S-GND 25 5 VO1- VIN1-SW 24 6 VO2+ MUTE 23 7 VO2- VREFIN 22 SLED input VCC LOADING/SLED LOADING input M SPINDLE H : SLED L : LOADING M FR FR FR FR 8 VO3+ VCCS 21 9 VO3- 3.3VREG 20 10 VO4+ REGIN 19 11 VO4- VIN2G 18 12 VCCP2 VIN2 17 FOCUS TRACKING SPINDLE input TRACKING input 13 VIN4 14 VIN4G VIN3G 16 VIN3 15 FOCUS input No.A0600-7/8 LA6579H Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. 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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 2006. Specifications and information herein are subject to change without notice. PS No.A0600-8/8