SANYO LA74320FN

Ordering number : EN*A0905 A
Monolithic Linear IC
LA74320FN
Audio I/O Interface
for Cell Phone
Overview
The LA74320FN is an audio I/O interface IC for cell phones that integrates, on a single chip, amplifiers for a stereo speaker,
EVR stereo headphone, internal and external microphones, and a receiver speaker.
Features
• INT & EXT MIC amplifiers selectable (MIC power supply built-in)
• ALC amplifier (ALC level: 3 levels selectable)
• Base band/audio source input selector switch
• ALC (through switch, ALC level: 4 levels selectable)
• EVR stereo headphone amplifier
• Stereo speaker amplifier
• Receiver speaker amplifier (mono) standby control
• I2C bus supported (first mode)
Specifications
Maximum Ratings at Ta=25°C
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage
VCC max
5.5
Allowable power dissipation
Pd max
Operating temperature
Topr
-20 to +70
°C
Storage temperature
Tstg
-55 to +150
°C
Ta≤70°C, Mounted on a specified board *1
TBD
V
mW
*1: Mounted on a specified board: TBD
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
71608 TI / O1007 TI IM No.A0905-1/14
LA74320FN
Operating Conditions at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Recommended supply voltage (VCCA)
VCCA
3.0
V
Recommended supply voltage (VCCHP)
VCCHP
3.0
V
Recommended supply voltage (VCCSP)
VCCSP
3.6
V
Allowable operating voltage range (VCCA)
VCCAop
2.7 to 3.6
V
Allowable operating voltage range (VCCHP)
VCCHPop
2.7 to 3.6
V
VCCSPop
2.7 to 5.0
V
Allowable operating voltage range (VCCSP)
*2
*2: Take care not to exceed Pd max.
Electrical Characteristics at Ta=25°C, VCCA=VCCHP=3.0V, VCCSP=5.0V, f=1kHz, ALC1 LEVEL=-17dBV
MODE, ALC2 LEVEL=-11dBV MODE
No.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Circuit current
1
VCCA current dissipation
ICCA
VCCA=3.0V, MIC1 ON,
audio source system (stereo) OFF, receiver
9.5
mA
0
μA
system ON
2
VCCA STANDBY
current dissipation
ICCAS
VCCA=3.0V, 0V applied to STANBDY pin
3
VCCHP current dissipation 1
ICCHP1
VCCHP=3.0V:
Receiver SPK AMP POWER SAVE MODE
8.5
mA
4
VCCHP current dissipation 2
ICCHP2
VCCHP=3.0V:
H/P AMP POWER SAVE MODE
2.7
mA
5
VCCHP STANDBY
current dissipation
ICCHPS
VCCHP=3.0V,
0V applied to STANBDY pin
0
μA
6
VCCSP current dissipation 1
ICCSP1
VCCSP=5.0V: SPK POWER ON MODE
7
VCCSP current dissipation 2
ICCSP2
VCCSP=5.0V: SPK POWER SAVE MODE
8
VCCSP STANDBY
current dissipation
ICCSPS
VCCSP=5.0V, 0V applied to STANBDY pin
12.1
mA
0.3
mA
0
μA
10
dB
0.03
%
-100
dBV
MIC output system
9
INT MIC voltage gain
VGIMIC
INT MIC input, VIN=-29dBV
10
INT MIC output distortion
HDIMIC
INT MIC input, VIN=-29dBV,
THD: from 2nd to 5th harmonic
11
INT MIC output noise voltage
VNIMIC
INT MIC no input, JIS-A Filter
12
INT MIC maximum input level
VMIMIC
INT MIC input, INT MIC input level at which up to
-20
5th order distortions of MIC output are reduced to
dBV
3% or less
13
INT MIC supply voltage
VVIMIC
At 6.2kΩ load
1.7
V
14
EXT MIC voltage gain
VGEMIC
EXT MIC input, VIN=-29dBV
10
dB
15
EXT MIC output distortion
HDEMIC
EXT MIC input, VIN=-29dBV,
0.03
%
-100
dBV
THD: from 2nd to 5th harmonic
16
EXT MIC output noise voltage
VNEMIC
EXT MIC no input, JIS-A Filter
17
EXT MIC maximum input level
VMEMIC
EXT MIC input, EXT MIC input level at which up
-20
to 5th order distortions of MIC output are reduced
dBV
to 3% or less
18
EXT MIC supply voltage
VVEMIC
At 6.2kΩ load
1.7
V
REC output system: ALC1 level=-17dBV mode
19
REC reference output level
VOREC
ALC1 input, VIN=-40dBV
20
REC reference output distortion
HDREC
ALC1 input, VIN=-40dBV, THD: from 2nd to 5th
harmonic
21
ALC1 level characteristics
VOALC1
ALC1 input, VIN=-14dBV (reference+26dB)
22
ALC1 distortion characteristics
VDALC1
ALC1 input, VIN=-14dBV (reference+26dB),
THD: from 2nd to 5th harmonic
23
REC output noise voltage
VNOR
24
ALC1 maximum input level
VMXALC
ALC1 no input, JIS-A Filter
-16.5
dBV
0.03
%
-10
dBV
0.3
%
-83
dBV
ALC1 input, ALC1 input level at which up to 5th
order distortions of REC output are reduced to
-10
dBV
3% or less
Continued on next page.
No.A0905-2/14
LA74320FN
Continued from preceding page.
No.
Parameter
Symbol
Ratings
Conditions
min
typ
unit
max
EVR output system: ALC2 level=-11dBV mode
25
EVR reference output level 1
26
(VOl=Max)
EVR reference output distortion
VOEVR1
HDEVR
27
EVR reference output level 2
VOEVR2
28
(VOl=Typ)
EVR reference output level 3
29
(VOl=Min)
EVR maximum input level
Audio source pin input, VIN=-25dBV,
EVR=Max
Audio source pin input, VIN=-25dBV,
EVR=Max, THD: from 2nd to 5th harmonic
Audio source pin input, VIN=-25dBV,
EVR=Typ (5Bit: 11011)
VOEVR3
Audio source pin input, VIN=-25dBV,
EVR=Min, JIS-A Filter
VMXEVR
-17.3
dBV
0.003
%
-22.5
dBV
-96
dBV
ALC2=Through MODE, audio source input level
at which up to 5th order distortions of EVR output
-3
dBV
are reduced to 3% or less l
H/P output system: Measured at HP load = 16Ω, ALC2=Through mode
30
H/P reference output level
VOHP
Base band input, VIN=-11dBV, EVR=Max
31
H/P reference output distortion
HDHP
Base band input, VIN=-11dBV,
THD: from 2nd to 5th harmonic
32
H/P output noise voltage
VNHP
No base band input, EVR=Max,
H/P maximum input level
VMXHP
dBV
0.1
%
-100
JIS-A Filter
33
-19
dBV
Base band input, base band input level at which
up to 5th order distortions of H/P output are
-10
dBV
reduced to 3% or less
SPK output system: Measured at SPK load = 8Ω, ALC2 level=-11dBV mode
34
SPK reference output level
VOSPK
Audio source pin input, VIN=-30dBV, VOl=Max
35
SPK reference output distortion
VDSPK
Audio source pin input, VIN=-30dBV,
VNSPK
VOl=Max, THD: from 2nd to 5th harmonic
No input at audio source pin, EVR=Max,
36
SPK output noise voltage
JIS-A Filter
37
SPK maximum output power
VMXSPK
-4
dBV
0.9
%
-70
dBV
1000
mW
4.5
dBV
5.5
dBV
6.4
dBV
7
dBV
-4
dBV
0.9
%
-10
dBV
-80
dBV
-80
dBV
110
mW
Audio source pin input, SPK output power at
which up to 5th order distortions of SPK output
are reduced to 3% or less, ALC2=Through
MODE
38
SPK ALC level 1
VOSPK1
Audio source pin input, VIN=-10dBV, VOl=Max,
LC2=-13dBV MODE
39
SPK ALC level 2
VOSPK2
Audio source pin input, VIN=-10dBV, VOl=Max,
ALC2=-12dBV MODE
40
SPK ALC level 3
VOSPK3
Audio source pin input, VIN=-10dBV, VOl=Max,
ALC2=-11dBV MODE
41
SPK ALC level 4
VOSPK4
Audio source pin input, VIN=-10dBV, VOl=Max,
ALC2=-10.5dBV MODE
Receiver SPK output system: Measured at SPK load = 32Ω
42
Receiver SPK reference output
VORSP1
Base band input, VIN=-22dBV, VOl=Max
VDRSP
Base band input, VIN=-22dBV, VOl=Max,
THD: from 2nd to 5th harmonic
VORSP2
Base band input, VIN=-22dBV,
VOl=Typ (5Bit: 11011)
Base band input, VIN=-22dBV, EVR=Min,
level 1 (VOl=Max)
43
Receiver SPK reference output
distortion
44
Receiver SPK reference output
level 2 (VOl=Typ)
45
EVR reference output level 3
46
(VOl=Min)
Receiver SPK
VORSP3
JIS-A Filter
VNRSP
output noise voltage
47
Receiver SPK
Base band no input, EVR=Max,
JIS-A Filter
VMXRSP
maximum output power
Base band input, SPK output power at which up
to 5th order distortions of SPK output are
reduced to 3% or less
Control system
FCLK
I2C bus first mode
48
Serial CLOCK frequency
49
Serial input LOW level
SERLO
0
0.6
V
50
Serial input HIGH level
SERHI
2.4
3.5
V
400
kHz
No.A0905-3/14
LA74320FN
Electrical Characteristic: Serial Communication Condition Table
Address(0 1)
No.
Address(0 2)
Address(0 3)
Address(0 4)
Symbol
D8
D7
D6
D5
D4
D3
D2
D1
D8
D7
D6
D5
D4
D3
D2
D1
D8
D7
D6
D5
D4
D3
D2
D1
D8
D7
D6
D5
D4
D3
D2
D1
ICCA
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
2
ICCAS
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
3
ICCHP1
1
1
1
1
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
4
ICCHP2
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
5
ICCHPS
1
1
1
1
0
0
0
0
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
6
ICCSP1
1
1
1
1
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
7
ICCSP2
1
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
8
ICCSPS
1
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
9
VGIMIC
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
10
HDIMIC
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
11
VNIMIC
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
12
VMIMIC
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
13
VVIMIC
0
0
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
14
VGEMIC
0
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
15
HDEMIC
0
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
16
VNEMIC
0
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
17
VMEMIC
0
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
18
VVEMIC
0
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
19
VOREC
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
20
HDREC
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
21
VOALC1
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
22
VDALC1
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
23
VNOR
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
24
VMXALC
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
25
VOEVR1
1
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
26
HDEVR
1
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
27
VOEVR2
1
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
1
1
0
1
1
1
1
1
0
0
0
0
0
28
VOEVR3
1
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
29
VMXEVR
1
1
1
1
0
0
1
1
0
0
1
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
30
VOHP
1
1
1
1
0
0
0
0
1
1
1
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
31
HDHP
1
1
1
1
0
0
0
0
1
1
1
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
32
VNHP
1
1
1
1
0
0
0
0
1
1
1
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
33
VMXHP
1
1
1
1
0
0
0
0
1
1
1
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
34
VOSPK
1
1
1
1
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
35
VDSPK
1
1
1
1
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
36
VNSPK
1
1
1
1
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
37
VMXSPK
1
1
1
1
0
0
1
1
0
0
1
0
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
38
VOSPK1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
39
VOSPK2
1
1
1
1
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
40
VOSPK3
1
1
1
1
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
41
VOSPK4
1
1
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
42
VORSP1
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
43
VDRSP
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
44
VORSP2
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
1
1
0
1
1
45
VORSP3
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
46
VNRSP
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
47
VMXRSP
1
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
No.A0905-4/14
(0 4)
00000100
(0 3)
00000011
(0 2)
00000010
(0 1)
00000001
Address
OFF
MIC2
ON
OFF
0,1
D7
OFF
VREF
charge SW
0
ON
D8
Receiver
Speaker
Receiver Speaker
Power Save CTL
0
D8
OFF
1
OFF
OFF
D7
0
ON
D7
Input
Select SW
Receiver
Input Select SW
ON
0
Lch EVR
Power Save CTL
ON
OFF
1,0
OFF
OFF
1,0
OFF
ON
0,1
Lch EVR
Power
OFF
B.B. input SW
ON
ON
Rch Input SW
1
ON
Lch Input SW
VREF
Charge CTL
0,0
D8,D7
Sound source & Base Band (B.B.)
Input Select
ON
0,0
MIC1 & 2 Power Save CTL
MIC1 or 2 Input Select
MIC1
D8,D7
MSB
D8
OFF
1
OFF
1
ON
OFF
OFF
1,1
OFF
OFF
1,1
-
OFF
ON
Receiver
EVR
D6
ON
0
Receiver EVR
Power Save CTL
Rch EVR
Power
0
OFF
1
OFF
-
-
D5
-
-
D5
EVR D16
Gain
ATT
0
D16(10000)
ATT
0
D16(10000)
ON
-
-
-
ON
-
0,1
1,0
ON
-
-
1,0
-
ON
EVR D16
Gain
-
-10.5dBV
1
-
-
ON
0,0
-11dBV
-12dBV
-13dBV
D6,D5
-
-
0,1
ALC2 LEVEL
=-13/-12/-11/-10.5dBV CTL
-
-17dBV
ON
0,0
-19dBV
-21dBV
D6,D5
Rch EVR
Power Save CTL
D6
D5
ALC1 & REC AMP Power Save CTL
ALC1 LEVEL=-21/-19/-17dBV CTL
D6
AMP
1
AMP
1
ON
-
-
-
1,1
ON
-
-
-
1,1
OFF
0
1
ON
ATT
0
ATT
0
D08(01000)
EVR D08
Gain
D4
OFF
ON
0
D08(01000)
EVR D08
Gain
D4
Through
SW
ALC2
D4
OFF
0
ON
1
Through SW
ALC2
D3
OFF
ON
0
ON
OFF
1
Rch ALC2 CTL
Power Save & Through SW
ALC2 DET
discharge
D3
AMP
1
AMP
1
D3
EVR D04
Gain
ATT
0
D04(00100)
EVR Setting (Receiver) 5bit
ATT
0
D04(00100)
EVR D04
Gain
D3
AMP
1
AMP
1
EVR Setting (Sound source & Base Band) 5bit
ON
OFF
1
Lch ALC2 CTL
Power Save & Through SW
ALC1 DET
discharge
D4
ALC2 DET
Discharge CTL
D3
ALC1 DET
D4
Discharge CTL
Data byte (Underline is initial setting)
ON
0
ATT
0
ATT
0
D02(00010)
EVR D2
Gain
D2
ON
0
D02(00010)
EVR D2
Gain
D2
Lch SPK
Power
D2
Lch Speaker
Power Save CTL
Lch H/P
D2
Power Save CTL
Lch H/P
D2
AMP
1
AMP
1
OFF
1
OFF
1
ON
0
ATT
0
ATT
0
D01(00001)
EVR D1
Gain
D1
ON
0
D01(00001)
EVR D1
Gain
D1
Rch SPK
Power
D1
Rch Speaker
Power Save CTL
Rch H/P
D1
Power Save CTL
Rch H/P
LSB
D1
AMP
1
AMP
1
OFF
1
OFF
1
LA74320FN
Serial Data Specification(I2C bus communication)
[Slave Address: 1 1 1 0 1 0 0 0]
No.A0905-5/14
LA74320FN
Package Dimensions
unit : mm (typ)
3293
Top View
Bottom View
Exposed Die-Pad
Do Not Connect
(0.05)
6.0
23
33
34
22
0.45
(3.0)
6.0
(4.0)
12
44
1
11
(1.0)
0.85max
SANYO : VQFN44(6X6)
0
(0.8)
0.4
0.16
NC
SPK(L)-OUT
SPK(L) GND
SPK(L)+OUT
VCCSP(L)
NC
VCCSP(R)
SPK(R)+OUT
SPK(R)GND
SPK(R)-OUT
NC
Pin Assignment
33
32
31
30
29
28
27
26
25
24
23
SPK(L)IN
34
22
SPK(R)IN
EVR(L)OUT
35
21
EVR(R)OUT
HP(L)IN
36
20
HP(R)IN
VREFSP
37
19
Rch(Audio source)IN
STANDBY L
38
18
Base Band IN
H/P(L)OUT
39
17
Lch(Audio source)IN
H/P GND
40
16
ALC2 DET
H/P(R)OUT
41
15
Base Band OUT
Receiver & HP VCC
42
14
ALC1 DET
Receiver(+)OUT
43
13
ALC1 IN
NC
44
12
MIC2 VCC
1
2
3
4
5
6
7
8
9
10
11
Receiver GND
Receiver(-)OUT
AVCC
CLOCK
DATA
AGND
MIC1 IN
MIC2 IN
MIC OUT
MIC1 VCC
VREF
LA74320FN
Top view
No.A0905-6/14
LA74320FN
LA74320FN EVR Characteristic
0
-10
Attenuation [dB]
-20
-30
-40
-50
-60
-70
Mute
-80
0
5
10
15
20
25
30
35
5-bit data (decimal notation)
Table of Input/Output Forms
PIN
Pin Name
DC voltage
1
Receiver GND
0V
2
Receiver (-)
1.65V
output
AC voltage
Description of functions
Equivalent circuit diagram in pin
Receiver GND
Reference output level
Receiver reverse phase output
=-10dBV
pin
VCCHP
(@ EVR=Max. audio source
input =-30dBV)
20.5kΩ
2
5kΩ
3
VCC A
4
CLOCK
3.0V
Power pin for analog signal part
CLOCK input pin
1kΩ
4
5
DATA
DATA input pin
1kΩ
5
ACK
Tr
6
A GND
0V
GND pin for analog signal part
Continued on next page.
No.A0905-7/14
LA74320FN
Continued from preceding page.
PIN
Pin Name
DC voltage
7
MIC1 IN
1.5V
AC voltage
Reference input level
Description of functions
Equivalent circuit diagram in pin
MIC1 input pin
VCCA
=-50dBV
Maximum input level
=-20dBV
500Ω
7
70kΩ
VREF
8
MIC2 IN
1.5V
Reference input level
MIC2 input pin
VCCA
=-50dBV
Maximum input level
=-20dBV
500Ω
8
70kΩ
VREF
9
MIC OUT
1.5V
Reference output level
MIC output pin
VCCA
=-40dBV
Maximum output level
=-10dBV
500Ω
7.5kΩ
9
3.2kΩ
VREF
10
MIC1 VCC
2.3V
MIC1 power pin
VCCA
2.2kΩ
10
23kΩ
11
VREF
2.3V
MIC VCC and VREF ripple
VCCA
rejection pin
400Ω
11
500Ω
200kΩ
Continued on next page.
No.A0905-8/14
LA74320FN
Continued from preceding page.
PIN
Pin Name
DC voltage
12
MIC2 VCC
2.3V
AC voltage
Description of functions
Equivalent circuit diagram in pin
MIC2 power pin
VCCA
2.2kΩ
12
23kΩ
13
ALC1 IN
Reference output level
ALC1 input pin
VCCA
=-40dBV
Maximum output level
=-10dBV
1kΩ
13
50kΩ
VREF
14
ALC1 DET
ALC1 detection pin
VCCA
1kΩ
500Ω
14
15
Base_Band
OUT
1.5V
Reference output level
Base band output pin
VCCA
=-16dBV
Maximum input level
=-3dBV
1kΩ
7.5kΩ
15
6kΩ
VREF
16
ALC2 DET
ALC2 detection pin
VCCA
1kΩ
500Ω
16
Continued on next page.
No.A0905-9/14
LA74320FN
Continued from preceding page.
PIN
Pin Name
DC voltage
17
Lch audio
1.5V
source IN
AC voltage
Reference output level
Description of functions
Equivalent circuit diagram in pin
Lch audio input pin
VCCA
=-15dBV
Maximum input level
=-3dBV
25kΩ
17
25kΩ
VREF
18
Base Band IN
1.5V
Reference output level
Base band input pin
VCCA
=-16dBV
Maximum output level
=-10dBV
500Ω
18
50kΩ
VREF
19
Rch audio
1.5V
source IN
Reference output level
Rch audio source input pin
VCCA
=-15dBV
Maximum input level
=-3dBV
25kΩ
19
25kΩ
VREF
20
Rch HP IN
1.5V
Reference output level
Rch HP input pin
VCCHP
=-16dBV
(@Base band input)
=-21dBV
1kΩ
(@audio source input)
20
Maximum input level
=-10dBV
50kΩ
(@Base band input)
=-9dBV
(@audio source input)
VREF
21
Rch EVR OUT
1.5V
Reference output level
Rch EVR output pin
VCCA
=-16dBV
(@Base band input)
=-21dBV
500Ω
(@audio source input)
Maximum input level
21
=-10dBV
(@Base band input)
=-9dBV
(@audio source input)
Continued on next page.
No.A0905-10/14
LA74320FN
Continued from preceding page.
PIN
Pin Name
DC voltage
22
Rch SPK IN
1.65V
AC voltage
Reference output level
Description of functions
Equivalent circuit diagram in pin
Rch Speaker input pin
VCCSP(R)
=-16dBV
(@Base band input)
=-21dBV
(@audio source input)
Maximum input level
5kΩ
=-10dBV
22
(@Base band input)
=-9dBV
25kΩ
(@audio source input)
24
23
NC
24
Rch SPK(-)OUT
NC pin
1.65V
Reference output level
Rch speaker reverse phase
=-1dBV
output pin
VCCSP(R)
(@audio source input
=-15dBV)
25kΩ
24
5kΩ
22
25
GND SPK(R)
0V
26
Rch
1.65V
SPK(+)OUT
Rch speaker GND pin
Reference output level
Rch speaker normal phase
=-1dBV
output pin
VCCSP(R)
(@audio source input
=-15dBV)
20.5kΩ
26
20kΩ
24
27
VCC SP(R)
28
NC
29
VCC SP(L)
3.6V
30
Lch
1.65V
SPK(+)OUT
3.6V
Rch speaker power pin
NC pin
Lch speaker power pin
Reference output level
Lch speaker normal phase
=-1dBV
output pin
VCCSP(L)
(@audio source input
=-15dBV)
20.5kΩ
30
20kΩ
32
Continued on next page.
No.A0905-11/14
LA74320FN
Continued from preceding page.
PIN
Pin Name
DC voltage
31
GND SPK(L)
0V
32
Lch SPK(-)OUT
1.65V
AC voltage
Description of functions
Equivalent circuit diagram in pin
Lch speaker GND
Reference output level
Lch speaker reverse phase
=-1dBV
output pin
VCCSP(L)
(@audio source input
=-15dBV)
25kΩ
32
5kΩ
34
33
NC
34
Lch SPK IN
NC pin
1.65V
Reference output level
Lch speaker input pin
VCCSP(L)
=-1dBV
(@audio source input
=-15dBV)
5kΩ
34
25kΩ
32
35
Lch EVR OUT
1.5V
Reference output level
Lch EVR output pin
VCCA
=-16dBV
(@Base band input)
=-21dBV
(@audio source input)
500Ω
Maximum input level
35
=-10dBV
(@Base band input)
=-9dBV
(@audio source input)
36
Lch HP IN
1.5V
Reference output level
Lch HP input pin
VCCHP
=-16dBV
(@Base band input)
=-21dBV
(@audio source input)
Maximum input level
=-10dBV
(@Base band input)
=-9dBV
1kΩ
36
50kΩ
(@audio source input)
VREF
Continued on next page.
No.A0905-12/14
LA74320FN
Continued from preceding page.
PIN
Pin Name
DC voltage
37
VREFSP
1.65V
AC voltage
Description of functions
Equivalent circuit diagram in pin
SPK VREF and ripple rejection
VCCSP(L)
pin
400Ω
250kΩ
37
2kΩ
215kΩ
38
STANDBY L
STANDBY control pin
38kΩ
38
23kΩ
39
Lch HP OUT
1.5V
Reference output level
Lch HP output pin
VCCHP
=-23.5dBV
Maximum output level
=-3dBV
74Ω
2.6kΩ
39
1.8kΩ
VREF
40
GND HP
0V
41
Rch HP OUT
1.5V
HP GND pin
Reference output level
Rch HP output pin
=-23.5dBV
VCCHP
Maximum output level
=-3dBV
74Ω
2.6kΩ
41
1.8kΩ
VREF
42
VCCHP
3.0V
43
Receiver (+)
1.5V
OUT
HP & receiver speaker power pin
Reference output level
Receiver speaker normal phase
=-10dBV
output pin
VCCHP
(@ EVR=Max audio source
input =-30dBV)
20.5kΩ
43
20kΩ
2
44
NC
NC pin
No.A0905-13/14
LA74320FN
Internal Equivalent Circuit Diagram
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of July, 2008. Specifications and information herein are subject
to change without notice.
PS No.A0905-14/14