Ordering number : ENA1515 Bi-CMOS IC For VCMs LV8098CS Constant-current Driver IC Overview The LV8098CS is a constant current driver IC for voice coil motors that supports I2C control integrating a digital/analog converter (DAC). It uses an ultraminiature WLP package and includes a current detection resistor for constant current control, which makes the IC ideal for miniaturization of camera modules intended for use in camera-equipped mobile phones. The output transistor has a low on-resistance of 1Ω and the resistance of the built-in current detection resistor is 1Ω, which minimizes the voltage loss and helps withstand voltage drop in VCC. The current consumption when the DAC is set to code 0 is 0 (ICC ≈ 0, IOUT ≈ 0) allowing reduction in current consumption. Functions • Constant current driver for voice coil motors. • Constant current control enabled by DAC (8 bits). 2 • I C bus control supported. • Wide operating voltage range (2.2 to 5.0V). • The current consumption is 0 when the DAC is set to code 0. • 6-pin WLP package used (1.27 × 0.87 × 0.5mm). • Built-in thermal protection circuit. • Built-in voltage drop protection circuit (VCC = 2V output off). • Low output block total-resistance of 2Ω helps withstand voltage drop in VCC. (Current detection resistance + output transistor on-resistance). • Built-in current detection resistor. Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC max 5.5 V Output voltage VOUT max Input voltage VIN max SCL, SDA, ENA VCC + 0.5 5.5 V V Allowable power dissipation Pd max With specified substrate * 350 mW Operating temperature Topr -30 to +85 °C Storage temperature Tstg -40 to +150 °C * Specified substrate : 40mm × 40mm × 1.6mm, Single layer glass epoxy substrate Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 72909 SY PC 20090626-S00003 No.A1515-1/8 LV8098CS Allowable Operating Conditions at Ta = 25°C Parameter Symbol Supply voltage VCC Maximum preset output current IO High-level input voltage VIH Low-level input voltage VIL Conditions Ratings Unit 2.2 to 5.0 100 Applied to SCL, SDA, and ENA pins V mA 1.3 to VCC V -0.3 to 0.5 V Electrical Characteristics at Ta = 25°C, VCC = 2.8V Parameter Symbol Ratings Conditions min typ Unit max ICCOa ENA = L 1 μA ICCOb ENA = H, PD = 1 1 μA ICCOc ENA = H, D0 to D7 = 0 ICC1 ENA = H, D0 to D7 ≠ 0 Input current IIN SCL, SDA, ENA Total resistance value of the output block (built-in resistor + transistor on-resistance) RTTL VCC = 2.8V, IOUT = 80mA Supply current -1 1 μA 0.5 3 mA 0 1 μA 2 3 Ω DAC block Resolution 8 bits Relative accuracy INL ±1 LSB Differential linearity DNL ±1 LSB Full code current Ifull D0 to D7 = 1 Error code current 0 Izero D0 to D7 = 0 100 mA 1 μA 1 μA 1.3 V Spark killer diode Reverse current IS (leak) Forward voltage VSF Package Dimensions unit : mm (typ) 3380 Pd max -- Ta SIDE VIEW BOTTOM VIEW 0.24 TOP VIEW 0.2 B 0.4 A 0.24 0.5 MAX LASER MARKED INDEX 0.4 1 2 1.27 3 0.87 SIDE VIEW Allowable power dissipation, Pd max -- W 0.4 Specified board : 40 × 40 × 1.6mm3 Single layer glass epoxy 0.35 0.3 0.2 0.18 0.1 0 --30 --20 0 20 40 60 80 100 120 0.12 Ambient temperature, Ta -- °C SANYO : WLP6(1.27X0.87) No.A1515-2/8 LV8098CS Pin Assignment Bottom View ( Ball side up ) 2 3 1 0.4 A 0.4 0.87 Pin No. Pin Name A1 SCL Pin Description I2C SCL input pin A2 ENA Enable & reset *1, 2 A3 GND Ground B1 SDA I2C SDA input pin B2 VCC Power supply pin B3 OUT Output pin B *1 : Setting the ENA pin to low powers down and resets the IC. It is necessary to power on the IC by setting the ENA pin to low and hold it high during normal operation. *2 : When the ENA pin is to be used with pull_up, it is necessary to send code 0 in advance after power-on. 1.27 Block Diagram VCC 0.1μF VCM Reference voltage Bias ENA OUT SDA C P U SCL Voltage drop protection & thermal protection I2C IF I 2C DECODE DAC 8 bits current setting + - RF 1Ω GND No.A1515-3/8 LV8098CS Pin Description Pin No. Pin name Description A1 SCL SCL A2 ENA I2C serial clock input pin Equivalent circuit VDD ENABLE When low, standby mode and reset is performed at the same time. This pin is held high for normal use. Input high level : 1.3V to 5.0V A1 A2 Input low level : -0.3V to 0.5V GND A3 GND Ground pin. B3 OUT OUT VCC Output pin This is an NMOS open drain output, and the voice coil motor is connected between this pin and the VCC pin for use. B3 1Ω B2 VCC B1 SDA VCC Power supply input pin SDA VDD I2C serial data input pin Input high level : 1.3V to 5.0V Input low level : -0.3V to 0.5V B1 GND No.A1515-4/8 LV8098CS Serial Bus Communication Specifications I2C serial transfer timing conditions Standard mode twH SCL th1 twL th2 tbuf SDA th1 ts2 ts1 ts3 Resend start condition Start condition ton Stop condition tof Input waveform condition Standard mode Parameter symbol Conditions min typ unit fscl SCL clock frequency Data setup time ts1 Setup time of SCL with respect to the falling edge of SDA 4.7 ts2 Setup time of SDA with respect to the rising edge of SCL 250 ns ts3 Setup time of SCL with respect to the rising edge of SDA 4.0 μs th1 Hold time of SCL with respect to the rising edge of SDA 4.0 μs th2 Hold time of SDA with respect to the falling edge of SCL 0 μs twL SCL low period pulse width 4.7 μs twH SCL high period pulse width 4.0 ton SCL, SDA (input) rising time 1000 ns tof SCL, SDA (input) falling time 300 ns tbuf Interval between stop condition and start condition Data hold time Pulse width Input waveform conditions Bus free time 0 max SCL clock frequency 100 kHz μs μs μs 4.7 High-speed mode Parameter Symbol Conditions min typ unit fscl SCL clock frequency Data setup time ts1 Setup time of SCL with respect to the falling edge of SDA 0.6 ts2 Setup time of SDA with respect to the rising edge of SCL 100 ns ts3 Setup time of SCL with respect to the rising edge of SDA 0.6 μs th1 Hold time of SCL with respect to the rising edge of SDA 0.6 μs th2 Hold time of SDA with respect to the falling edge of SCL 0 μs twL SCL low period pulse width 1.3 μs twH SCL high period pulse width 0.6 ton SCL, SDA (input) rising time 300 ns tof SCL, SDA (input) falling time 300 ns tbuf Interval between stop condition and start condition Data hold time Pulse width Input waveform conditions Bus free time 0 max SCL clock frequency 1.3 400 kHz μs μs μs No.A1515-5/8 LV8098CS 2 I C bus transmission method Start and stop conditions The I2C bus requires that the state of SDA be preserved while SCL is high as shown in the timing diagram below during a data transfer operation. SCL SDA ts2 th2 When data is not being transferred, both SCL and SDA are in the high state. The start condition is generated and access is started when SDA is changed from high to low while SCL and SDA are high. Conversely, the stop condition is generated and access is ended when SDA is changed from low to high while SCL is high. Start condition Stop condition th1 th3 SCL SDA Data transfer and acknowledgement response After the start condition has been generated, the data is transferred one byte (8 bits) at a time. Generally, in an I2C bus, a unique 7-bit slave address is assigned to each device, and the first byte of the transfer data is allocated to the 7-bit slave address and to the command (R/W) indicating the transfer direction of the subsequent data. However, this IC is provided with only a write mode for receiving the data. Every time 8 bits of data for each byte are transferred, the ACK signal is sent from the receiving end to the sending end. Immediately after the clock pulse of SCL bit 8 in the data transferred has fallen to low, SDA at the sending end is released, and SDA is set to low at the receiving end, causing the ACK signal to be sent. When, after the receiving end has sent the ACK signal, the transfer of the next byte remains in the receiving status, the receiving end releases SDA at the falling edge of the ninth SCL clock. Start M S B Slave address L S B W A C K M S B Data L S B A C K M S B Data L S B A C K Stop SCL 1st byte SDA (WRITE) A1 A2 A3 A4 A5 A6 A7 0 2nd byte 3ed byte PD X D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X X : DON'T CARE No.A1515-6/8 LV8098CS The standard data transfer to this device consists of three bytes : the slave address of the first byte and the data of the second and third bytes. Slave address : 0110011(0) PD : Power-down D1-D7 : 8-bit data used to set output constant current ; MIN = 00000000, MAX = 11111111 The table below shows the format of the second and third bytes. 2nd byte 3rd byte Serial data bits SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 Function PD × D7 D6 D5 D4 D3 D2 D1 D0 × × × × × × PD bit setting method PD = 1 → Power_down (standby mode) and reset D0-D7 setting method Output setting Output current (mA) (LSB) (design value) Current setting code D7 D6 D5 D4 D3 D2 D1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0.392 2 0 0 0 0 0 1 0 2 0.784 254 1 1 1 1 1 1 0 254 99.608 255 1 1 1 1 1 1 1 255 100 Relationship between the ENA pin input, I2C input data PD, and current setting 0 (code 0) This IC supports the following three modes of setting up the standby mode : 1) Setting the ENA pin low. 2) Setting the PD bit to 1 (high) with I2C input data. 3) Setting the output current to 0 with I2C input data. Execution of one of the steps 1) to 3) causes the output current to 0 and stops operation of the circuit. When the ENA pin is set low, the I2C data register is reset and the IC is reset to its default state (PD bit set to 0 and output current setting to code 0). Since the IC starts operation in the data reset state at power-on time, it is necessary to start using the IC in the default state by setting the ENA pin low before turning on VCC and then high after VCC is established. No.A1515-7/8 LV8098CS SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of July, 2009. Specifications and information herein are subject to change without notice. PS No.A1515-8/8