SANYO STK681-332-E_11

Ordering number : ENA1591B
STK681-332-E
Thick-Film Hybrid IC
Forward/Reverse Motor Driver
Overview
The STK681-332-E is a hybrid IC for use in current control forward/reverse DC motor driver with brush.
Applications
• Office photocopiers, printers, etc.
Features
• Allows forward, reverse, and brake operations in accordance with the external input signal.
• 12A peak startup output current and 12A peak brake output current.
• On-chip output short-circuit detection function.
• Connecting an external current detection resistor allows overcurrent detection and peak current control in the PWM
operation mode.
• Obviate the need to design for the dead time in order to turn off the upper- and lower drive devices when switching
between the forward and reverse operation mode.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
70611HKPC 018-09-0026/22311HKIM/N1809HKIM No. A1591-1/14
STK681-332-E
Specifications
Absolute maximum ratings at Tc = 25°C
Parameter
Symbol
Conditions
Ratings
unit
Maximum supply voltage 1
VCC max
VDD=0V
52
V
Maximum supply voltage 2
VDD max
No signal
-0.3 to +6.0
V
Input voltage
VIN max
Logic input pins
-0.3 to +6.0
V
Output current1
IO1 max
VDD=5.0V, DC current
8.5
A
Output current2
IO2 max
A
IOB max
VDD=5.0V, Pulse current: 5ms
VDD=5.0V, square wave current, operating time 15ms
12
Brake current
12
A
(single pulse, low side brake)
Allowable power dissipation
PdPK max
No heat sink
Operating substrate temperature
Tc
Metal surface temperature of the package
Junction temperature
Tj max
Storage temperature
Tstg
2.8
W
-20 to +105
°C
150
°C
-40 to +125
°C
Allowable Operating Ranges at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
unit
Operating supply voltage 1
VCC1
With signals applied (Tc=105°C)
10 to 38
V
Operating supply voltage 2
VCC2
With signals applied (Tc=90°C)
10 to 42
V
Operating supply voltage 2
VDD
With signals applied
Input voltage
VIN
Output current 1
IO1
VDD=5.0V, DC current, Tc=80°C
Output current 2
IO2
VDD=5.0V, DC current, Tc=105°C
Brake current
IOB
VDD=5.0V, square wave current, operating time 2ms,
Low side brake, Tc=105°C
5±5%
V
0 to VDD
V
6.1
A
5
A
12
A
Refer to the graph for each conduction-period tolerance range for the output current and brake current.
Electrical Characteristics at Tc = 25°C, VCC = 24V, VDD = 5.0V
Parameter
Symbol
Conditions
min
typ
max
unit
VDD supply current
ICCO
Forward or reverse operation
6
9
FET diode forward voltage
Vdf
If=1A (RL=23Ω)
0.75
1.4
V
Output saturation voltage 1
Vsat1
RL=23Ω, F1, F2
65
100
mV
Output saturation voltage 2
Vsat2
RL=23Ω, F3, F4
50
85
mV
Output leak current
IOL
F1, F2, F3, and F4 OFF operation
50
μA
Input high voltage
VIH
IN1, IN2, ENABLE pins
Input low voltage
VIL
IN1, IN2, ENABLE pins
High-level input current
IILH
IN1, IN2, ENABLE pins, VIH=5V
Low-Level Input current
IILL
IN1, IN2, ENABLE pins, VIL=GND
Overcurrent detection voltage
VOC
Between pins Vref1 and S.P
Internal PWM frequency
fc
Overheat detection temperature
TSD
2.5
Design guarantee
V
50
0.8
V
75
μA
10
μA
62
kHz
0.48
32
mA
46
144
V
°C
Note: A fixed-voltage power supply must be used.
No. A1591-2/14
STK681-332-E
Package Dimensions
unit:mm (typ)
24.2
(18.4)
4.5
14.4
11.0
14.4
(11.0)
(R1.47)
19
(3.5)
1
1.0
0.4
0.5
2.0
18 1.0=18.0
4.0
4.45
Derating Curve of Motor Current, IO, vs. STK681-332-E Operating Board Temperature, Tc
IO - Tc
9
DC
8
Motor current, IO - A
7
PWM(VCC=24V)
PWM(VCC=33V)
6
5
PWM(VCC=42V)
4
3
2
1
0
0
10
20
30
40
50
60
70
80
90
Operating Substrate Temperature, Tc - °C
100
110
ITF02711
(The maximum PWM frequency is 50kHz.)
The PWM frequencies in the above graph indicate the ENABLE signal.
The same PWM IO derating curves as those shown above will be obtained when the internal PWM frequency of the
STK681-332-E is used.
Increasing the VCC supply voltage narrows the IO derating curve range, so IO should be set in reference to the above
graph.
The above operating substrate temperature, Tc, is measured immediately when the motor is started.
Since Tc fluctuates due to the ambient temperature, Ta, the motor current value, and continuous or intermittent
operations of the motor current, always confirm this values using an actual set.
The Tc temperature should be checked in the center of the metal surface of the product package.
No. A1591-3/14
STK681-332-E
STK681-332-E Allowable Brake Current Range (Low side: F3, F4=ON)
IOB - t
13
Brake Current, IOB - A
12
11
Tc=25°C
10
9
70°C
80°C
90°C
8
7
105°C
6
5
1.0
2
3
5 7 10
2
3
5 7 100
2
3
5 7 1000
Conduction Time, t - ms
ITF02712
STK681-332-E Allowable Brake Current Range (High side: F1, F2=ON)
IO - t
13
Single-pulse current, IO - A
12
11
10
Tc=25°C
9
8
90°C
7
80°C
70°C
6
5
1.0
105°C
2
3
5 7 10
2
3
5 7 100
Conduction Time, t - ms
2
3
5 7 1000
ITF02713
The output current specifications are the same as the high side brake current specifications.
No. A1591-4/14
STK681-332-E
Internal Block Diagram
OUT1
Unassigned pins
5
11
IN2
8
10
VCC
9
OUT2
7
4
6
F1
F2
F3
F4
IN1
17
16
ENABLE
18
GND
1
2
3
VDD (5V)
Output short-circuit
detection
15
Overheat
Detection
FAULT
13
Latch
Overcurrent
Detection
Vref
19
PWM
(46kHz typ)
Constantcurrent control
Setting voltage
(0.48V typ)
S.GND
14
No. A1591-5/14
STK681-332-E
Sample Application Circuit
STK681-332-E
9
FAULT
13
VDD (5V)
15
IN1
16
VCC=24V
7
10
OUT1
8
IN2
CCW
17
12
N.C
11
N.C
18
ENABLE
(DC or PWM)
Motor
R1
CW
OUT2
6
5
Vref
19
N.C
4
R2
C1
47μF to /50V
3
C2
10μF/50V
C3
0.1μF
2
GND
1
14
Rs
S.GND
Motor Drive Conditions (H: High-level input; L: Low-Level Input)
Stop
IN1
IN2
ENABLE
H
L
L
L
H
L
Remarks
Turns the power supply OFF.
ENABLE must be set Low when VDD is rising
or falling.
H
H
L
Forward (CW)
H
L
H
Reverse (CCW)
L
H
H
Brake
L
L
L or H
GND side MOSFET ON
H
VCC side MOSFET ON
No input signal is needed that turns off the
upper- and lower-side drive devices when
H
H
switching the rotational direction.
* Output control is enabled by applying an external PWM signal to the ENABLE pin.
The product can run at a minimum external PWM pulse width of 1μs. In the case when the high pulse width is less
than 16μs, however, the IC may fail to detect a short-circuit condition when an output short-circuit occurs.
If VDD is turned off in the condition with the ENABLE pin set to high during motor rotation or PWM operation, the
FAULT signal is output when VDD is falling, indicating error condition. For this reason, ENABLE must be set to low
when VDD is rising or falling.
When both IN1 and IN2 are set low, the MOSFET on the VCC side is driven. To minimize the loss when stopped, set
IN1 = IN2 = High and ENABLE = Low to turn off the gate signal to the VCC side MOSFETs.
Setting the current limit using the Vref pin
Output current peak (Iop) = (Vref ÷ 4.9) ÷ Rs
“4.9” in the above formula indicates the portion of the Vref voltage that is divided using the circuit inside the control
IC.
Vref = (R2 ÷ (R1+R2)) × 3.3V
Rs is the external current detection resistance value of the HIC, and Vref ≤ 2.0V must be satisfied so that overcurrent
detection is not triggered.
No. A1591-6/14
STK681-332-E
Notes
(1) Be sure to set the capacitance of the power supply bypass capacitor, C1, so that the ripple current of the capacitor,
which varies as motor current increases, falls within the allowed range.
(2) Chopping operations based on F3 and F4 are used for current control. The timing given below is used for OUT1 or
OUT2 voltage output and for F3 or F4 drain current.
(3) Do not connect the N.C pins (5, 11, 12 pin) shown in the internal block diagram or sample application circuit to a
circuit pattern on the PCB.
OUT1 or OUT2
Output voltage
VCC+Vdf
GND
IO peak (current setting value)
F3 or F4
Drain current
0A
22μs
IO peak (current setting value)
Motor current
0A
(4) Sample Timing Diagram
IN1
IN2
ENABLE
Stop
Forward
rotation
Brake
Reverse
rotation
Stop
Forward
rotation
Brake
Stop
(5) If the current detection resistor, Rs, connected to pin1, pin2, and pin3 is short-circuited, the overcurrent detection
circuit does not operate. If the output pin is short-circuited directly to VCC or connected directly to GND, an output
short-circuit condition is detected and the output is latched in the off state. To restart the operation, turn on VDD
again.
(6) Smoke Emission Precautions: There is a possibility of smoke emission if the hybrid IC is subjected to physical or
electrical damage as the result of being used without compliance with the specifications.
No. A1591-7/14
STK681-332-E
I/O Functions of Each Pin
Pin Name
Pin No.
IN1
16
IN2
17
Function
Input pin for turning F2 and F4 ON and OFF
At low level F2: ON and F4: OFF; at high level, F2: OFF and F4: ON
Input pin for turning F1 and F3 ON and OFF
At low level F1: ON and F3: OFF; at high level, F1: OFF and F3: ON
Pin for turning F3 and F4 ON; At high level F31 and F42: ON
ENABLE
18
ENABLE must be set Low when VDD is rising and falling.
ENABLE must be set High to drive the motor.
Monitor pin used when either of the output short-circuit detector, overcurrent detector, or overheat detector is
FAULT
13
activated. When the detector is activated, this pin is set low and all of F1, F2, F3 and F4 in the final stage are
OUT1
8, 10
This pin connects to the motor and outputs source/sync current depending on conditions at IN1 and IN2.
OUT2
4, 6
This pin connects to the motor and outputs source/sync current depending on conditions at IN1 and IN2.
latched off.
This pin limits the peak current when motor startup.
The current setting voltage, Vref, is set to the value of 4.9 times the voltage drop of the external current
Vref
19
GND
1, 2, 3
Power system ground
S.GND
14
Control system ground
VCC
7, 9
Motor system supply voltage
VDD
15
Control system supply voltage.
detection resistor.
The internal overcurrent detection level is 0.48V, so setting Vref < 2.0V is recommended.
No. A1591-8/14
STK681-332-E
Technical Information
1.Configuration of each pins <Configuration of the IN1, IN2, and ENABLE input pins>
Input pins: 16, 17, 18 pin
5V
10kΩ
100kΩ
VSS
The input pins of this driver all use Schmitt input. Typical specifications at Tc=25°C are given below. Hysteresis
voltage is 0.3V (VIHa-VILa).
When rising
When falling
1.8V typ
1.5V typ
Input voltage
VIHa
VILa
Input voltage specifications are as follows.
VIH=2.5V min
VIL=0.8V max
<Configuration of the FAULT input pin>
Output pin
5V
Pin 16
VSS
<Configuration of the Vref input pin>
To 1, 2, 3 pins
VDD
Vref/4.9
Pin 19
PWM control
To MOSFET
gate
Amplifier
VSS
No. A1591-9/14
STK681-332-E
[Reduced voltage detection]
(1) VDD
The internal control IC of the driver has a function that detects reduced voltage when VDD is supplied. This reduced
voltage threshold level is set to 4V (typ.), and the MOSFET gate voltage specification is 5V ±5%. So, a current flow
through the output when VDD is rising results in the power stress to the MOSFET due to insufficient gate voltage.
To prevent this power stress, set ENABLE = Low when VDD < 4.75V, which is outside the normal operating
supply voltage range of the MOSFET.
4Vtyp
Control IC power (VDD) rising edge
3.8Vtyp
Control IC power on reset
ENABLE signal input
VDD, ENABLE Signals Input Timing
(2) VCC
The internal control IC of the driver has a function that detects reduced voltage when VCC is supplied, to prevent
insufficient internal P-channel MOSFET gate voltage. The reduced voltage detection level is set to VCC = 8.8V
(typ.).
8.8V
VCC
MOSFET
off
MOSFET
off
No. A1591-10/14
STK681-332-E
2. Output short-circuit detection, Overcurrent Detection and Overheat Detection
Each detection function operates using a latch system and turns output off. To restore output operation, turn the VDD
power supply off and then on again to apply a power-on reset.
[Output Short-circuit Detection, Overcurrent Detection]
When the output pin is simply connected to the circuit GND or VCC, or when the output load is short-circuited, the
output short circuit detector must be activated and turn the output off.
Constant current PWM control can be performed by connecting a current detection resistor to pins 1, 2 and 3, and
setting the Vref pin voltage to less than 2.0V. In addition, when this current detection resistor voltage exceeds 0.48V
(typ.), the overcurrent detector is activated and shuts the output off.
[Overheat Detection]
Rather than directly detecting the temperature of the semiconductor device, overheat detection detects the temperature
of the aluminum substrate (144°C typ).
Within the allowed operating range of IO1 (6.1A) recommended in the specifications, if a heat sink attached for the
purpose of reducing the operating substrate temperature, Tc, comes loose, the semiconductor can operate without
breaking.
However, we cannot guarantee operations without breaking in the case of operation other than those recommended,
such as operations at a current exceeding IOH max (6.1A) that occurs before overcurrent detection is activated.
3. Mitigated Curve of Package Power Loss, PdPK, vs. Ambient Temperature, Ta
Package power loss, PdPK, refers to the average internal power loss, PdAV, allowable without a heat sink.
The figure below represents the allowable power loss, PdPK, vs. fluctuations in the ambient temperature, Ta.
Power loss of up to 2.8W is allowable at Ta=25°C, and of up to 1.5W at Ta=60°C.
Allowable power dissipation, PdPK (no heat sink) - Ambient temperature, Ta
PdPK - Ta
Allowable power dissipation, PdPK - W
3.0
2.5
2.0
1.0
1.5
0.5
0
0
20
40
60
80
Ambient temperature, Ta - °C
100
120
ITF02714
No. A1591-11/14
STK681-332-E
4. Data
Vsat1, Vsat2 - IO
Output saturation voltage, Vsat1,Vsat2 - mV
1600
VDD=5.0V
Tc=25°C
1400
1200
1000
800
at1
Vs
at2
Vs
600
400
200
0
0
1
2
3
4
5
6
7
8
9
10
11
Output current, IO - A(DC)
Vdf - IO
1.1
Diode forward voltage, Vdf - V
12
ITF02715
Tc=25°C
1.0
)
side
ig h
H
(
f
Vd
)
side
ow
L
(
Vdf
0.9
0.8
0.7
0.6
0.5
0
1
2
3
4
5
6
7
8
Output current, IO - A(DC)
9
10
11
12
ITF02716
No. A1591-12/14
STK681-332-E
5. Other Notes on Use
In addition to the “Notes” indicated in the Sample Application Circuit, care should also be given to the following
contents during use.
(1) Allowable operating range
Operation of this product assumes use within the allowable operating range. If a supply voltage or an input voltage
outside the allowable operating range is applied, an overvoltage may damage the internal control IC or the MOSFET.
If a voltage application mode that exceeds the allowable operating range is anticipated, connect a fuse or take other
measures to cut off power supply to the product.
(2) Input pins
If the input pins are connected directly to the PC board connectors, electrostatic discharge or other overvoltage
outside the specified range may be applied from the connectors and may damage the product. Current generated by
this overvoltage can be suppressed to effectively prevent damage by inserting 100Ω to 1kΩ resistors in lines
connected to the input pins.
Take measures such as inserting resistors in lines connected to the input pins
(3) Power connectors
If the motor power supply VCC is applied by mistake without connecting the GND part of the power connector
when the product is operated, such as for test purposes, an overcurrent flows through the VCC decoupling capacitor,
C1, to the parasitic diode between the VDD of the internal control IC and GND, and may damage the power supply
pin block of the internal control IC.
Always connect the GND pin before supplying VCC.
5V
Reg.
15
8
Logic level Control Block
10
9
7
4
6
VDD
F1
IN1
F2
IN2
VCC
ENABLE
24V
Reg.
C1
F3
FAULT
F4
Vref
1
14
S.GND
2
VSS
3
Open
Over-current path
(4) Input Signal Lines
1) Do not use an IC socket to mount the driver, and instead solder the driver directly to the PC board to minimize
fluctuations in the GND potential due to the influence of the resistance component and inductance component of
the GND pattern wiring.
2) To reduce noise due to electromagnetic induction to small signal lines, do not design small signal lines (sensor
signals, 5V or 3.3V power supply signal lines) that run parallel near the motor output lines OUT1 and OUT2.
3) Pins 5, 11 and 12 of this product are N.C pins. Do not connect any wiring to these pins.
No. A1591-13/14
STK681-332-E
(5) When mounting multiple drivers on a single PC board
When mounting multiple drivers on a single PC board, the GND design should mount a VCC decoupling capacitor,
C1, for each driver to stabilize the GND potential of the other drivers. The key wiring points are as follows.
24V
5V
15 7 9
16
Input
Signals
17
IC1
18
Motor
1
Input
Signals
C1 for IC1
15 7 9
16
17
Motor
2
IC2
18
1
2
19 14 3
1
2
19 14 3
15 7 9
16
Input
Signals
C1 for IC2
17
18
IC3
Motor
3
C1 for IC3
1
2
19 14 3
GND
GND
Short
Thick and short
Thick
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products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
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product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
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This catalog provides information as of July, 2011. Specifications and information herein are subject
to change without notice.
PS No. A1591-14/14