SEMTECH SX8650_10

SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
4
KEY PRODUCT FEATURES
GENERAL DESCRIPTION
The SX8650 is an ultra low power 4-wire resistive
touchscreen controller optimized for portable equipment
where power and board-space are at a premium.
It incorporates a highly accurate 12-bit ADC for data
conversion and operates from a single 1.65 to 3.7V supply
voltage.
The SX8650 features a built-in preprocessing algorithm for
data measurements, which greatly reduces the host
processing overhead and bus activity. This complete
touchscreen solution includes four user-selectable
operation modes which offer programmability on different
configurations such as conversion rate and settling time,
thus enable optimization in throughput and power
consumption for a wide range of touch sensing applications.
The touch screen inputs have been specially designed to
provide robust on-chip ESD protection of up to ±15kV in
both HBM and Contact Discharge, and eliminates the need
for external protection devices.
The SX8650 supports the Fast-mode I²C (400kbit/s) serial
bus data protocol and includes 2 user-selectable slave
addresses. A custom I2C address is possible on request.
The SX8650 is offered in two tiny packages: 3.0 mm x
3.0 mm DFN and a 1.5 mm x 2.0 mm wafer-level chip-scale
package (WLCSP).
APPLICATIONS
Extremely Low Power Consumption: [email protected] 8kSPS
Superior On-chip ESD Protection
±15kV HBM (X+,X-,Y+,Y-)
±2kV CDM
±25kV Air Gap Discharge
±15kV Contact Discharge
±300V MM
Single 1.65V to 3.7V Supply/Reference
Integrated Preprocessing Block to Reduce Host Loading
and Bus Activity
Four User Programmable Operation Modes provides
Flexibility to address Different Application Needs
Manual, Automatic, Pen Detect, Pen Trigger
High Precision 12-bit Resolution
Low Noise Ratiometric Conversion
Selectable Polling or Interrupt Modes
Touch Pressure Measurement
400kHz Fast-Mode I²C Interface
Hardware Reset & I²C Software Reset
-40°C to 85°C Operation
12-LD (3.0 mm x 3.0 mm) DFN Package
12-Ball (1.5 mm x 2.0 mm) WLCSP Package
Pin-compatible with SX8651
Pb-Free, Halogen Free, RoHS/WEEE compliant product
Windows CE 6.0, Linux Driver Support Available
ORDERING INFORMATION
Portable Equipment
Mobile Communication Devices
Part Number
Cell phone, PDA, MP3, GPS, DSC
Touch Screen Monitors
Block Diagram
Package
SX8650ICSTRT1
12 - Ball WLCSP (1.5 mm x 2.0 mm)
SX8650IWLTRT1
12 - Lead DFN (3.0 mm x 3.0 mm)
1. 3000 Units / reel
SX8650
VDD
AUX
Control
A0
X+
NRST
POR
OSC
I2C
Y+
XYGND
Revision V2.19/October 2010
©2010 Semtech Corp.
Touch
Screen
Interface
Vref
SCL
HOST
ref+
in
ADC out
ref-
Page 1
SDA
Digital
Filter
NIRQ
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SX8650
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Table of contents
Section
1.
2.
3.
General Description ................................................................................................................................................. 4
1.1.
DFN Pinout Diagram and Marking Information (Top View).............................................................................. 4
1.2.
WLCSP Pinout Diagram and Marking Information (Top View) ........................................................................ 4
1.3.
Pin Description................................................................................................................................................. 5
1.4.
Simplified Block Diagram ................................................................................................................................. 5
Electrical Characteristics ......................................................................................................................................... 6
2.1.
Recommended Operating Conditions.............................................................................................................. 6
2.2.
Thermal Characteristics ................................................................................................................................... 6
2.3.
Electrical Specifications ................................................................................................................................... 7
2.4.
Host Interface Specifications ........................................................................................................................... 9
2.5.
Host Interface Timing Waveforms.................................................................................................................. 10
2.6.
Typical Operating Characteristics .................................................................................................................. 11
Functional Description ........................................................................................................................................... 13
3.1.
General Introduction ..................................................................................................................................... 13
3.2.
Channel Pins.................................................................................................................................................. 13
3.2.1.
X+, X-, Y+. Y- .......................................................................................................................................... 13
3.2.2.
AUX ......................................................................................................................................................... 13
3.3.
5.
Host Interface and Control Pins ..................................................................................................................... 14
3.3.1.
NIRQ ....................................................................................................................................................... 14
3.3.2.
SCL ......................................................................................................................................................... 14
3.3.3.
SDA ......................................................................................................................................................... 14
3.3.4.
A0 ............................................................................................................................................................ 15
3.3.5.
NRST ...................................................................................................................................................... 15
3.4.
4.
Page
Power Management Pins............................................................................................................................... 15
3.4.1.
VDD......................................................................................................................................................... 15
3.4.2.
GND ........................................................................................................................................................ 15
Detailed Description............................................................................................................................................... 16
4.1.
Touch Screen Operation................................................................................................................................ 16
4.2.
Coordinates Measurement............................................................................................................................. 17
4.3.
Pressure Measurement.................................................................................................................................. 17
4.4.
Pen Detection ................................................................................................................................................ 18
Data Processing .................................................................................................................................................... 19
5.1.
Host Interface and Control ............................................................................................................................. 19
5.1.1.
I2C Address ............................................................................................................................................ 19
5.1.2.
I2C Write Registers ................................................................................................................................. 20
5.1.3.
I2C Read Registers ................................................................................................................................. 21
5.1.4.
I2C Host Commands ............................................................................................................................... 21
5.1.5.
I2C Read Channels ................................................................................................................................ 22
5.1.6.
Data Channel Format ............................................................................................................................. 23
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SX8650
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Table of contents
Section
Page
5.1.7.
6.
7.
8.
Invalid Qualified Data .............................................................................................................................. 23
5.2.
I2C Register Map .......................................................................................................................................... 23
5.3.
Host Control Writing....................................................................................................................................... 24
5.4.
Host Commands ............................................................................................................................................ 26
5.5.
Power-Up ....................................................................................................................................................... 27
5.6.
Reset.............................................................................................................................................................. 27
Modes of Operation .............................................................................................................................................. 27
6.1.
Manual Mode ................................................................................................................................................. 28
6.2.
Automatic mode ............................................................................................................................................. 29
6.3.
PENDET Mode .............................................................................................................................................. 30
6.4.
PENTRIG Mode ............................................................................................................................................. 30
Application Information .......................................................................................................................................... 31
7.1.
Acquisition Setup ........................................................................................................................................... 31
7.2.
Channel Selection.......................................................................................................................................... 31
7.3.
Noise Reduction............................................................................................................................................. 31
7.3.1.
POWDLY................................................................................................................................................. 31
7.3.2.
SETDLY .................................................................................................................................................. 32
7.3.3.
AUX Input ................................................................................................................................................ 32
7.4.
Interrupt Generation....................................................................................................................................... 32
7.5.
Coordinate Throughput Rate ......................................................................................................................... 32
7.5.1.
I2C Communication Time........................................................................................................................ 33
7.5.2.
Conversion Time ..................................................................................................................................... 33
7.5.3.
AUTO MODE .......................................................................................................................................... 33
7.6.
ESD event...................................................................................................................................................... 33
7.7.
Application Schematic.................................................................................................................................... 34
7.8.
Application Examples..................................................................................................................................... 34
7.8.1.
Soft Keyboard ......................................................................................................................................... 34
7.8.2.
Slider Controls......................................................................................................................................... 34
7.8.3.
Game ...................................................................................................................................................... 35
7.8.4.
Handwriting Application........................................................................................................................... 35
Packaging Information ........................................................................................................................................... 36
8.1.
DFN Package................................................................................................................................................. 36
8.2.
WLCSP Package ........................................................................................................................................... 38
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
1. General Description
1.1. DFN Pinout Diagram and Marking Information (Top View)
VDD
1
X+
2
Y+
3
SX8650
TOP VIEW
12
AUX
11
A0
10
NRST
8650
YYWW
13
X-
4
9
SCL
Y-
5
8
SDA
GND
6
7
NIRQ
XXXX
PIN 1
IDENTIFIER
Figure 1. SX8650SX8650 DFN Top View, Pad on Bottom Side
YYWW : date code
XXXXX: Lot Number
1.2. WLCSP Pinout Diagram and Marking Information (Top View)
SX8650 TOP VIEW
solder bumps on bottom side
X+
Y+
X-
Y-
VDD
A0
NRST
GND
AUX
NIRQ
SDA
SCL
C
D
3
8650
Eyww
2
1
A
B
BALL A1
IDENTIFIER
Figure 2. SX8650 WLCSP Top View, Solder Bumps on Bottom Side
YYWW : date code
XXXXX: Lot Number
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
1.3. Pin Description
Pin Number #
Name
Type
Description
DFN
WLCSP
1
A2
VDD
Power
Input power supply connect to a 0.1uF capacitor to GND
2
A3
X+
Analog
X+ channel input
3
B3
Y+
Analog
Y+ channel input
4
C3
X-
Analog
X- channel input
5
D3
Y-
Analog
Y- channel input
6
D2
GND
Ground
Ground
7
B1
NIRQ
Digital Output / Open Drain Output
Interrupt output, active low. Need external pull-up resistor
8
C1
SDA
Digital Input / Open Drain Output
I2C data input/output
9
D1
SCL
Digital Input / Open Drain Output
I2C clock, input/output
10
C2
NRST
Digital Input / Output
Reset Input, active low. Need external 50k pull-up resistor
11
B2
A0
Digital Input
I2C slave address selection input
12
A1
AUX
Digital Input/Analog Input
Analog auxiliary input or conversion synchronization
13
GND
Ground
Die attach paddle, connect to Ground
Table 1
Pin description
1.4. Simplified Block Diagram
The SX8650 simplified block diagram is shown in Figure 3.
SX8650
VDD
AUX
Control
X+
A0
Y+
NRST
POR
X-
YGND
OSC
I2C
SCL
Touch
Screen
Interface
Vref
ref+
in
ADC out
ref-
SDA
Digital
Filter
NIRQ
Figure 3. Simplified block diagram of the SX8650
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
2. Electrical Characteristics
Stresses above the values listed in “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these, or any other conditions beyond the “Recommended Operating
Conditions”, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameter
Symbol
Min.
Max.
Unit
Supply Voltage
VDDABS
-0.5
3.9
V
Input voltage (non-supply pins)
VIN
-0.5
3.9
V
Input current (non-supply pins)
IIN
10
mA
Operating Junction Temperature
TJCT
125
°C
Reflow temperature
TRE
260
°C
Storage temperature
TSTOR
150
°C
High ESD pins: X+, X-,Y+,YESD HBM
(Human Body Model)
All pins except high ESD pins:
AUX,A0,NRST,NIRQ,SDA,SCL
ESD (Contact Discharge)
High ESD pins: X+, X-,Y+,Y-
Latchup
-50
± 15(i)
kV
± 8(ii)
kV
ESDHBM2
±2
kV
ESDCD
± 15
kV
ILU
± 100(iii)
mA
ESDHBM1
Table 2. Absolute Maximum Ratings
(i)
(ii)
(iii)
Tested to TLP (10A)
Tested to JEDEC standard JESD22-A114
Tested to JEDEC standard JESD78
2.1. Recommended Operating Conditions
Parameter
Supply Voltage
Ambient Temperature Range
Symbol
Min.
Max
Unit
VDD
1.65V
3.7
V
TA
-40
85
°C
Symbol
Min.
Max
Unit
2.2. Thermal Characteristics
Parameter
Thermal Resistance with DFN package - Junction to Ambient (i)
θJA
39
°C/W
Thermal Resistance with WLCSP package - Junction to Ambient (i)
θJA
65
°C/W
(iii) θJA is calculated from a package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under exposed pad (if applicable)
per JESD51 standards.
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
2.3. Electrical Specifications
Parameter
Symbol
Conditions
Min.
Typ
Max
Unit
Current consumption
Manual
Ipwd
Manual (converter stopped, pen
detection off, I2C listening, OSC
stopped)
0.4
0.75
uA
Pen Detect
Ipndt
Pen detect mode (converter
stopped, pen detection activated,
device will generate interrupt upon
detection, I2C listening, OSC
stopped).
0.4
0.75
uA
Pen Trigger
Ipntr
Pen trigger mode (converter
stopped, pen detection activated,
device will start conversion upon
pen detection. I2C listening, OSC
stopped
0.4
0.75
uA
Automatic
Iwt
Automatic (converter stopped, pen
detection off, I2C listening, OSC and
timer on, device is waiting for timer
expiry)
1.5
Operation @8kSPS, VDD=1.8V
Iopl
X,Y Conv. RATE=4kSPS, Nfilt=1
PowDly=0.5us, SetDly=0.5us
23
50
uA
Operation @42kSPS, VDD=3.3V Ioph
X,Y Conv. RATE=3kSPS, Nfilt=7
PowDly=0.5us, SetDly=0.5us
105
140
uA
uA
Digital I/O
High-level input voltage 1
VIH
0.7VDD
VDD+0.5
V
Low-level input voltage
VIL
VSS-0.3
0.3VDD
V
SDA / SCL Hysteresis of Schmitt Vhys
trigger inputs
VDD > 2 V
VDD < 2 V
Low-level output voltage
Input leakage current
VOL
LI
0.05VDD
0.1VDD
IOL=3mA, VDD>2V
IOL=3mA, VDD<2V
V
0
0
0.4
0.2VDD
CMOS input
V
±1
uA
VDD
V
AUX
Input voltage range
VIAUX
Input capacitance
CX+,CX-,CY+,
CY-
50
pF
CAUX
5
pF
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Symbol
Parameter
Input leakage current
Conditions
IIAUX
Min.
Typ
-1
Max
Unit
1
uA
1
ms
Startup
Power-up time
(Delay
tPOR
Time between rising edge VDD and
rising NIRQ
Reset
tNRST
50
ns
Resolution
Ares
12
bits
Offset
Aoff
Gain error
Age
Differential nonlinearity
Integral nonlinearity
Reset low time
ADC
±1
LSB
0.5
LSB
Adnl
±1
LSB
Ainl
±1.5
LSB
5
Ohm
At full scale
Resistors
X+, X-, Y+, Y- resistance
Rchn
Touch Pad Biasing Resistance
Pen detect resistance
RPNDT_00
RPNDT = 0
100
kOhm
RPNDT_01
RPNDT = 1
200
kOhm
RPNDT_10
RPNDT = 2
50
kOhm
RPNDT_11
RPNDT = 3
25
kOhm
0.1
uF
External components
Capacitor between VDD, GND
recommendations
Cvdd
Type 0402, tolerance +/-50%
1. SCL, SDA, NRST and NIRQ can be pulled up to a potential higher than the chip VDD but must not exceed the maximun voltage of 3.7V.
All values are valid within the recommended operating conditions unless otherwise specified.
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
2.4. Host Interface Specifications
Parameter
Symbol
Condition
Min
Typ
Max
Unit
400
kHz
I2C TIMING SPECIFICATIONS (i)
SCL clock frequency
fSCL
0
SCL low period
tLOW
1.3
us
SCL high period
tHIGH
0.6
us
Data setup time
tSU;DAT
100
ns
Data hold time
tHD;DAT
0
ns
Repeated start setup time
tSU;STA
0.6
us
Start condition hold time
tHD;STA
0.6
us
Stop condition setup time
tSU;STO
0.6
us
Bus free time between stop and start
tBUF
1.3
us
Data valid time
tVD;DAT
0.9
us
Data valid ack time
tVD;ACK
0.9
us
Pulse width of spikes that must be
suppressed by the input filter
tSP
50
ns
Capacitive Load on each bus line SCL, SDA Cb
400
pF
I2C BUS SPECIFICATIONS
Table 3
Host Interface Specifications
Notes:
(i)
All timing specifications refer to voltage levels (VIL, VIH, VOL) defined in Table 3 unless otherwise mentioned.
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
2.5. Host Interface Timing Waveforms
70%
30%
SDA
70%
SCL
tSU;STA
tHD;STA
tSU;STO
tBUF
Figure 4. I2C Start and Stop timing
SDA
70%
30%
SCL
70%
30%
tLOW
tHIGH
tHD;DAT
tSU;DAT
tSP
Figure 5. I2C Data timing
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
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2.6. Typical Operating Characteristics
At Ta= -40°C to +85°C, VDD=1.7V to 3.7V, PowDly=0.5 us, SetDly=0.5us, Filt=1, Resistive touch screen sensor current not
taking in account, unless otherwise noted.
SUPPLY CURRENT in MANUAL MODE
vs TEMPERATURE
CURRENT IN PEN TRIGGER MODE
500
700
V DD=3.3V
Manual Mode Supply Current (nA)
TOUCH SENSOR
NOT ACTIVATED
Supply Current (nA)
400
300
200
100
600
VDD=1.85V
500
400
300
200
100
0
0
1.5
2
2.5
3
-40
3.5
-20
0
40
60
80
100
SUPPLY CURRENT VS CONVERSION RATE
VDD=1.8V - X,Y, Z1, Z2 CONVERSION
SUPPLY CURRENT VS CONVERSION RATE
VDD=1.8V - X,Y CONVERSION
130
100
90
120
Filt=7
Supply Current (uA)
Filt=5
70
60
50
Filt=3
40
30
Filt=5
110
100
80
Supply Current (uA)
20
Temperature (C)
V DD (V)
Filt=1
90
Filt=3
80
70
60
50
Filt=1
40
20
30
20
10
10
0
Filt=7
0
0
1
2
3
4
5
0
Conversion Rate (kCPS)
1
2
3
4
5
Conversion Rate (kCPS)
SUPPLY CURRENT vs SAMPLE RATE
500
TOUCH SENSOR
X+ to X- =1000 Ohm
Y+ to Y- =1000 Ohm
400
V DD=3.3V
Supply Current (uA)
V DD=2.5V
300
V DD=1.65V
200
100
0
0
1
2
3
4
5
Sample Rate (kCPS)
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Typical Operating Characteristics (continued)
At Ta= -40°C to +85°C, VDD=1.7V to 3.7V, PowDly=0.5 us, SetDly=0.5us, Filt=1, Resistive touch screen sensor current not
taking in account, unless otherwise noted.
CHANGE IN ADC OFFSET vs. TEMPERATURE
2
2
1
1
Delta from +25C (LSB)
Delta from +25C (LSB)
CHANGE IN ADC GAIN vs. TEMPERATURE
0
-1
-2
-40
-20
0
20
40
60
80
0
-1
-2
-40
100
Temperature (C)
-20
0
20
40
60
80
100
Temperature (C)
ADC INL @ VDD=3.3V
1
0.75
Error (LSB)
0.5
0.25
0
-0.25
-0.5
-0.75
-1
0
0.5
1
1.5
2
2.5
3
VX+(V)
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
3. Functional Description
3.1. General Introduction
This section provides an overview of the SX8650 architecture, device pinout and a typical application.
The SX8650 is designed for 4-wire resistive touch screen applications (Figure 6).The touch screen or touch panel is the
resistive sensor and can be activated by either a finger or stylus. The touch screen coordinates and touch pressure are
converted into I2C format by the SX8650 for transfer to the host.
SX8650
VDD
AUX
Control
VDD_HOST
A0
NRST
X+
POR
OSC
I2C
Y+
XY-
SCL
Touch
Screen
Interface
GND
Vref
HOST
SDA
ref+
in
ADC out
ref-
Digital
Filter
NIRQ
Figure 6. SX8650 with screen
3.2. Channel Pins
3.2.1. X+, X-, Y+. YThe SX8650's channel pins (X+, X-, Y+, Y-) directly
connect to standard touch screen X and Y resistive
layers. The SX8650 separately biases each of these
layers and converts the resistive values into (X,Y)
coordinates.
VDD
X+
XY+
Y-
Rchn
Touch Screen
Interface
The channel pins are protected to VDD and GROUND.
Figure 7 shows the simplified diagram of the X+, X-, Y+,
Y- pins.
Figure 7. Simplified diagram of X+, X-, Y+, Y- pins
3.2.2. AUX
The SX8650 interface includes an AUX pin that serves
two functions: an ADC input; and a start of conversion
trigger. When used as an ADC, the single ended input
range is from GND to VDD, referred to GND. When
the AUX input is configured to start conversions, the
AUX input can be further configured as a rising and /
or falling edge trigger.
VDD
ADC
AUX
The AUX is protected to VDD and GROUND.
Control
Figure 8 shows a simplified diagram of the AUX pin.
Figure 8. Simplified diagram of AUX
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SX8650
World’s Lowest Power & Smallest Footprint 4-wire
Resistive Touchscreen Controller with 15kV ESD
ADVANCED COMMUNICATIONS & SENSING
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3.3. Host Interface and Control Pins
The SX8650 host and control interface consists of: NIRQ, I2C pins SCL and SDA, A0, and NRST.
3.3.1. NIRQ
The NIRQ pin is an active low, open drain output
to facilitate interfacing to different supply voltages
and thus requires an external pull-up resistor (110 kOhm). The NIRQ pin does not have
protection to VDD.
HOST
VDD
IRQ
Control
NIRQ
The NIRQ function is designed to provide an
interrupt to the host processor. Interrupts may
occur when a pen is detected, or when channel
data is available.
Figure 9 shows a simplified diagram of the NIRQ
pin.
Figure 9. Simplified diagram of NIRQ
3.3.2. SCL
The SCL pin is a high-impedance input and opendrain output pin. The SCL pin does not have
protection to VDD to conform to I2C slave
specifications. An external pull-up resistor (1-10
kOhm) is required.
HOST
VDD
Figure 10 shows the simplified diagram of the
SCL pin.
SCL
IN
SCL
I2C
OUT
Figure 10. Simplified diagram of SCL
3.3.3. SDA
SDA is an I/O pin. It can be used as an open-drain
output (with external pull-up resistor) or as an
input. An external pull-up resistor (1-10 kOhm) is
required.
HOST
VDD
SDA
IN
SDA
I2C
OUT
The SDA I/O pin does not have protection to VDD
to conform to I2C slave specifications.
Figure 11 shows a simplified diagram of the SDA
pin.
Figure 11. Simplified diagram of SDA
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3.3.4. A0
The A0 pin is connected to the I2C address select control
circuitry and is used to modify the device I2C address.
A0
The A0 pin is protected to GROUND.
I2C
Figure 12 shows a simplified diagram of the A0 pin.
Figure 12. Simplified diagram of A0
3.3.5. NRST
The NRST pin is an active low input that provides a
hardware reset of the SX8650's control circuitry.
HOST
VDD
The NRST pin is protected GROUND to enable
interfacing with devices at a different supply
voltages.
Control
NRST
Figure 13 shows a simplified diagram of the NRST
pin.
Figure 13. Simplified diagram of NRST
3.4. Power Management Pins
The SX8650's power management input consists of the following Power and Ground pins.
3.4.1. VDD
VDD
The VDD is a power pin and is the power supply for the SX8650.
The VDD has ESD protection to GROUND.
Figure 14 shows a simplified diagram of the VDD pin.
VDD
Figure 14. Simplified diagram of VDD
3.4.2. GND
VDD
The SX8650 has one power management ground pin, GND.
(The die attach paddle on DFN is also connected to GND.)
The GND has ESD protection to VDD.
Figure 15 shows a simplified diagram of the GND pin.
GND
Figure 15. Simplified diagram of GND
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4. Detailed Description
4.1. Touch Screen Operation
A resistive touch screen consists of two (resistive) conductive sheets separated by an insulator when not pressed. Each
sheet is connected through 2 electrodes at the border of the sheet (Figure 16). When a pressure is applied on the top
sheet, a connection with the lower sheet is established. Figure 17 shows how the Y coordinate can be measured. The
electrode plates are connected through terminals X+, X- and Y+, Y- to an analog to digital converter (ADC) and a reference
voltage. The resistance between the terminals X+ and X- is defined by Rxtot. Rxtot will be split in 2 resistors, R1 and R2, in
case the screen is touched. The resistance between the terminals Y+ and Y- is represented by R3 and R4. The connection
between the top and bottom sheet is represented by the touch resistance (RT).
Y+
top conductive sheet
electrodes
Y-
electrodes
X+
X-
bottom conductive sheet
Figure 16. 4-wire Touch Screen
Y+
R3
X-
+
Vref
-
RT
R2
R1 X+
+
-
ADC
Ypos
R4
YFigure 17. Touch Screen Operation ordinate measurement (Y)
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4.2. Coordinates Measurement
The top resistive sheet (Y) is biased with a voltage source. Resistors R3 and R4 determine a voltage divider proportional to
the Y position of the contact point. Since the converter has a high input impedance, no current flows through R1 so that the
voltage X+ at the converter input is given by the voltage divider created by R3 and R4.
The X coordinate is measured in a similar fashion with the bottom resistive sheet (X) biased to create a voltage divider by
R1 and R2, while the voltage on the top sheet is measured through R3. Figure 18 shows the coordinates measurement
setup. The resistance RT is the resistance obtained when a pressure is applied on the screen. RT is created by the contact
area of the X and Y resistive sheet and varies with the applied pressure.
Ypos
X+
Y+
R1
X+
R3
RT
R2
R1
+
Vref
-
+
Vref
-
R4
X-
Y+
Xpos
R3
RT
R2
Y-
R4
X-
Y-
Figure 18. Ordinate (Y) and abscissa (X) coordinates measurement setup
The X and Y position are found by: Xpos
R2
= 4095 ⋅ -------------------R1 + R2
R4
Ypos = 4095 ⋅ -------------------R3 + R4
4.3. Pressure Measurement
The pressure measurement consists of two additional setups: z1 and z2 (see Figure 19).
X+
Y+
R1
+
Vref
-
z1
X+
R1
R3
+
Vref
-
RT
R2
Y+
R3
RT
R2
R4
R4
z2
X-
Y-
X-
Y-
Figure 19. z1 and z2 pressure measurement setup
The corresponding equations for the pressure:
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z1 = 4095 ⋅ --------------------------------R1 + R4 + R T
Page 17
R4 + Rt
z2 = 4095 ⋅ --------------------------------R1 + R4 + R T
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The X and Y total sheet resistance (Rxtot, Rytot) are known from the touch screen
supplier.
Rxtot = R1 + R2
Rytot = R3 + R4
R4 is proportional to the Y coordinate.
The R4 value is given by the total Y plate resistance multiplied by the fraction of the Y
Ypos
R4 = Rytot ⋅ -----------position over the full coordinate range.
4095
z2
R T = R4 ⋅ ----- – 1
By re-arranging z1 and z2 one obtains
z1
Ypos
R T = Rytot ⋅ ------------ ⋅
4095
Which results in:
z2
----- – 1
z1
The touch resistance calculation above requires three channel measurements (Ypos, z2 and z1) and one specification data
(Rytot).An alternative calculation method is using Xpos, Ypos, one z channel and both Rxtot and Rytot shown in the next
calculations
R1 is inverse proportional to the X coordinate.
Xpos
R1 = Rxtot ⋅ 1 – ------------4095
Substituting R1 and R4 into z1 and rearranging terms
Rytot ⋅ Y pos 4095
Xpos
R T = ------------------------------- ⋅ ------------ – 1 – Rxtot ⋅ 1 – ------------gives:
4095
z1
4095
4.4. Pen Detection
RPNDT
Y+
+
Vref
-
Y-
X+
R3
RT
R1
R4
R2
X-
The pen detection circuitry is used both to detect a user action and generate an
interrupt or start an acquisition in PENDET and PENTRG mode respectively.
Doing a pen detection prior to conversion avoids feeding the host with dummy
data and saves power.
If the touchscreen is powered between X+ and Y- through a resistor RPNDT, no
current will flow so long as pressure is not applied to the surface (see
Figure 20). When some pressure is applied, a current path is created and brings
X+ to the level defined by the resistive divider determined by RPNDT and the
sum of R1, RT and R4.
The level is detected by a comparator.
Figure 20. Pen detection
RPNDT should be set to the greatest value 200 kOhm for optimal detection (see Table 6). Increasing PowDly settings can
also improve the detection on panel with high resistance.
The pen detection will set the PENIRQ bit of the RegStat register.
In PENDET mode, the pen detection will set NIRQ low. The PENIRQ bit will be cleared and the NIRQ will be de-asserted
as soon as the host reads the status register.
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5. Data Processing
NFILT
The SX8650 offers 4 types of data processing
which allows the user to make trade-offs between
data throughput, power consumption and noise
rejection.
Preprocessing
ADC
cn,cn-1,cn-2,... Sort: .>.>.>.>.
sn
The parameter FILT is used to select the filter
order Nfilt . The noise rejection will be improved
with a high order to the detriment of the power
consumption. The K coefficient in Table 4 is a filter
constant. Its value is K=4079/4095.
I2C
N−1
1
sn = ⋅∑cn−i
N i=0
Figure 21. Filter structure
.
FILT
Nfilt
0
1
Processing
sn = cn
No average.
1
3
2
5
1--- 4079
-----------n = 3 ⋅ 4095 ( c n + c n – 1 + c n – 2 )
3 ADC samples are averaged
1 4079
s n = --- ⋅ ------------ ( c n + c n – 1 + c n – 2 + c n – 3 + c n – 4 )
5 4095
5 ADC samples are averaged
3
7
c max1 ≥ c max2 ≥ c a ≥ c b ≥ c c ≥ c min1 ≥ c min2
1 4079
--- -----------n = 3 ⋅ 4095 ( c a + c b + c c )
7 ADC samples are sorted and the 3 center samples are averaged
Table 4. Filter order
5.1. Host Interface and Control
The host interface consists of I2C (SCL and SDA) and the NIRQ, A0, NRST signals.
The I2C implemented on the SX8650 is compliant with:
Standard Mode (100 kbit/s) & Fast Mode (400 kbit/s)
Slave mode
7 bit slave address
5.1.1. I2C Address
Pin A0 defines the LSB of the I2C address. It is shown on Figure 22.
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.
1 0 0 1 0 0 0
with pin A0 connected to ground
1 0 0 1 0 0 1
with pin A0 connected to VDD
SX8650 Slave Address(7:1) =
Figure 22. I2C slave address
Upon request of the customer, a custom I2C address can be burned in the NVM.
The host uses the I2C to read and write data and commands to the configuration and status registers. During a conversion,
the I2C clock can be stretched until the end of the processing.
Channel data read is done by I2C throughput optimized formats.
The supported I2C access formats are described in the next sections:
I2C Write Registers
I2C Read Registers
I2C Host Commands
I2C Read Channels
5.1.2. I2C Write Registers
The format for I2C write is given in Figure 23.
After the start condition [S], the SX8650 slave address (SA) is sent, followed by an eighth bit (W=‘0’) indicating a Write.
The SX8650 then Acknowledges [A] that it is being addressed, and the host sends 8-bit Command and Register address
consisting of the command bits ‘000’ followed by the SX8650 Register Address (RA).
The SX8650 Acknowledges [A] and the host sends the appropriate 8-bit Data Byte (WD0) to be written.
Again the SX8650 Acknowledges [A].
In case the host needs to write more data, a succeeding 8-bit Data Byte will follow (WD1), acknowledged by the slave [A].
This sequence will be repeated until the host terminates the transfer with the Stop condition [P].
S
SA
W A
CR
A
WD0
A
A
Optional
Clock stretching
S:
SA:
W:
A:
CR:
WDn:
P:
WD1
Start condition
SX8650 Slave Address(7:1)
'0'
Acknowledge
'000' + Register Address(4:0)
Write Data byte(7:0), 0...n
Stop condition
WDn
A
P
Optional
From host to SX8650
From SX8650 to host
Figure 23. I2C write register
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The register address increments automatically when successive register data (WD1...WDn) is supplied by the host. This
automatic increment can be used for the first 4 register addresses (see Table 6).
The correct sampling of the screen by the SX8650 and the host I2C bus traffic are events that might occur simultaneously.
The SX8650 will synchronize these events by the use of clock stretching if that is required. The stretching occurs directly
after the last received command bit (see Figure 23).
5.1.3. I2C Read Registers
The format for incremental I2C read for registers is given in Figure 24. The read has to start with a write of the read
address.
After the start condition [S], the SX8650 Slave Address (SA) is sent, followed by an eighth bit (W=‘0’) indicating a Write.
The SX8650 then Acknowledges [A] that it is being addressed, and the host responds with a 8-bit CR Data consisting of
‘010’ followed by the Register Address (RA). The SX8650 responds with an Acknowledge [A] and the host sends the
Repeated Start Condition [Sr]. Once again, the SX8650 Slave Address (SA) is sent, followed by an eighth bit (R=‘1’)
indicating a Read.
The SX8650 responds with an Acknowledge [A] and the read Data byte (RD0). If the host needs to read more data it will
acknowledge [A] and the SX8650 will send the next read byte (RD1). This sequence can be repeated until the host
terminates with a NACK [N] followed by a stop [P].
S
SA
W
A
CR
A
Sr
SA
R
A
RD0
A
RD1
A
RDn
N
P
Optional
S:
Sr:
SA:
W:
R:
A:
N:
CR:
RDn:
P:
Start Condition
Repeated Start Condition
SX8650 Slave Address(7:1)
'0'
'1'
ACKnowledge
Not ACKnowledge (terminating read stream)
'010' + Register Address(4:0)
Read Data byte(7:0), 0...n
Stop Condition
From Host to SX8650
From SX8650 to Host
Figure 24. I2C read registers
The I2C read register format of Figure 24 is maintained until the Stop Condition. After the Stop Condition the SX8650 is
performing succeeding reads by the compact read format of the I2C read channels described in the next section.
No clock stretching will occur for the I2C read registers.
5.1.4. I2C Host Commands
The format for I2C commands is given in Figure 25.
After the start condition [S], the SX8650 Slave Address (SA) is sent, followed by an eighth bit (W=‘0’) indicating a Write.
The SX8650 then Acknowledges [A] that it is being addressed, and the host responds with an 8-bit Data consisting of a ‘1’
+ command(6:0). The SX8650 Acknowledges [A] and the host sends a stop [P].
The exact definition of command(6:0) can be found in Table 8.
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S
SA
W A
CR
A
P
Clock stretching
S:
SA:
W:
A:
CR:
P:
Start condition
SX8650 Slave Address(7:1)
'0'
Acknowledge
'1' + Command(6:0)
Stop condition
From host to SX8650
From SX8650 to host
Figure 25. I2C host command
The sampling of the screen by the SX8650 and the host I2C bus traffic are events that might occur simultaneously. The
SX8650 will synchronize these events by the use of clock stretching if that is required. The stretching occurs directly after
the last received command bit (see Figure 25).
5.1.5. I2C Read Channels
The host is able to read the channels with a high throughput, by the format shown in Figure 26.
After the start condition [S], the SX8650 Slave Address (SA) is sent, followed by an eighth bit (R=‘1’) indicating a read. The
SX8650 responds with an Acknowledge [A] and the Read Data byte (RD0). The host sends an Acknowledge [A] and the
SX8650 responds with the Read Data byte (RD1). If the host needs to read more data, it will acknowledge [A] and the
SX8650 will send the next read bytes. This sequence can be repeated until the host terminates with a NACK [N] followed
immediately by a stop [P]. The NACK [N] releases the NIRQ line. The stop [P] must occur before the end of the conversion.
The channel data that can be read is defined by the last conversion sequence.
A maximum number of 10 data bytes is passed when all channels (X, Y, z1, z2 and AUX) are activated in the
“I2CRegChanMsk”.
The channel data is sent with the following order: X, Y, Z1, Z2, AUX. The first byte of the data contains the channel
information as shown in Figure 27.
Typical applications require only X and Y coordinates, thus only 4 bytes of data will be read.
S
SA
R
A
RD0
A
RD1
A RDn-1 A
Channel (i)
Clock stretching
S:
SA:
R:
A:
N:
RDn:
P:
Start condition
SX8650 Slave Address(7:1)
'1'
Acknowledge
Not Acknowledge (terminating read stream)
Read Data byte(7:0), 0...n
Stop condition
RDn
N
P
Channel (i+1)
From host to SX8650
From SX8650 to host
Figure 26. I2C read channels
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The sampling of the screen by the SX8650 and the host I2C bus traffic are events that might occur simultaneously. The
SX8650 will synchronize these events by the use of clock stretching if that is required. The stretching occurs directly after
the address and read bit have been sent for the I2C read channels command (see Figure 26).
5.1.6. Data Channel Format
Channel data is coded on 16 bits as shown in Figure 27
0
C H A N (2:0)
D (7:0)
D (11:8)
RD1
RD0
Figure 27. data channel format
The 3 bits CHAN(2:0) are defined in Table 9 and show which channel data is referenced. The channel data D(11:0) is of
unsigned format and corresponds to a value between 0 and 4095.
5.1.7. Invalid Qualified Data
The SX8650 will return 0xFFFF data in case of invalid qualified data.
This occurs:
when the SX8650 converted channels and the host channel readings do not correspond. E.g. the host converts X and Y
and the host tries to read X, Y and z1 and z2.
when a conversion is done without a pen being detected.
5.2. I2C Register Map
I2C register address RA(4:0)
Register
Description
0 0000
I2CRegCtrl0
Write, Read
0 0001
I2CRegCtrl1
Write, Read
0 0010
I2CRegCtrl2
Write, Read
0 0100
I2CRegChanMsk
Write, Read
0 0101
I2CRegStat
Read
1 1111
I2CRegSoftReset
Write
Table 5. I2C Register address
The details of the registers are described in the next sections.
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5.3. Host Control Writing
The host control writing allows the host to change SX8650 settings. The control data goes from the host towards the
SX8650 and may be read back for verification.
register
bits
default
description
Set rate in coordinates per sec (cps) (± 20%)
If RATE equals zero then Manual mode.
if RATE is larger than zero then Automatic mode
7:4
0000
0000: Timer disabled -Manual mode
0001: 10 cps
0010: 20 cps
0011: 40 cps
0100: 60 cps
0101: 80 cps
0110: 100 cps
0111: 200 cps
RATE
I2CRegCtrl0
1000: 300 cps
1001: 400 cps
1010: 500 cps
1011: 1k cps
1100: 2k cps
1101: 3k cps
1110: 4k cps
1111: 5k cps
Settling time (± 10%): The channel will be biased for a time of POWDLY
before each channel conversion
3:0
7:6
0000
00
POWDLY
0000: Immediate (0.5 us)
0001: 1.1 us
0010: 2.2 us
0011: 4.4 us
0100: 8.9 us
0101: 17.8 us
0110: 35.5 us
0111: 71.0 us
1000: 0.14 ms
1001: 0.28 ms
1010: 0.57 ms
1011: 1.14 ms
1100: 2.27 ms
1101: 4.55 ms
1110: 9.09 ms
1111: 18.19 ms
00: AUX is used as an analog input
01: On rising AUX edge, wait
POWDLY and start acquisition
10: On falling AUX edge, wait
POWDLY and start acquisition
11: On rising and falling AUX
edges, wait POWDLY and start
acquisition
AUXAQC
The AUX trigger requires the manual mode.
I2CRegCtrl1
5
1
CONDIRQ
4
0
reserved
3:2
1:0
00
00
Enable conditional interrupts
0: interrupt always generated at end of conversion cycle. If no pen is
detected the data is set to ‘invalid qualified’.
1: interrupt generated when pen detect is successful
RPDNT
Select the Pen Detect Resistor
00: 100 KOhm
01: 200 KOhm
10: 50 KOhm
11: 25 KOhm
FILT
Digital filter control
00: Disable
01: 3 sample averaging
10: 5 sample averaging
11: 7 sample acquisition, sort, average 3 middle samples
Table 6. I2C registers
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register
bits
default
7:4
0
description
reserved
Settling time while filtering (± 10%)
When filtering is enabled, the channel will initially bias for a time of
POWDLY for the first conversion, and for a time of SETDLY for each
subsequent conversion in a filter set.
0000: Immediate (0.5 us)
0001: 1.1 us
0010: 2.2 us
0011: 4.4 us
0100: 8.9 us
0101: 17.8 us
0110: 35.5 us
0111: 71.0 us
I2CRegCtrl2
I2CRegChanMsk
3:0
0000
SETDLY
7
1
XCONV
0: no sample
1: sample, report X channel
6
1
YCONV
0: no sample
1: sample, report Y channel
5
0
Z1CONV
0: no sample
1: sample, report Z1 channel
4
0
Z2CONV
0: no sample
1:sample, report Z2 channel
3
0
AUXCONV
0: no sample
1: sample, report AUX channel
0
0
reserved
0
0
reserved
0
0
reserved
1000: 0.14 ms
1001: 0.28 ms
1010: 0.57 ms
1011: 1.14 ms
1100: 2.27 ms
1101: 4.55 ms
1110: 9.09 ms
1111: 18.19 ms
The host status reading allows the host to read the status of the SX8650. The data goes from the SX8650
towards the host. Host writing to this register is ignored.
I2CRegStat
7
0
CONVIRQ
0: no IRQ pending
1: End of conversion sequence IRQ pending
IRQ is cleared by the I2C channel reading
6
0
PENIRQ
operational in pen detect mode
0: no IRQ pending
1: Pen detected IRQ pending
IRQ is cleared by the I2C status reading
5:0
I2CRegSoftReset
7:0
000000 reserved
0x00
If the host writes the value 0xDE to this register, then the SX8650 will be reset.
Any other data will not affect the SX8650
Table 6. I2C registers
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5.4. Host Commands
The host can write to and read from registers of the SX8650 by the write and read commands as defined in Table 7.
W/R command name
CR(7:0)
4
Function
7
6
5
3
2
1
0
WRITE(RA)
0
0
0
RA(4:0)
Write register (see Table 5 for RA)
READ(RA)
0
1
0
RA(4:0)
Read register (see Table 5 for RA)
Table 7. I2C W/R commands
.The host can issue commands to change the operation mode or perform manual actions as defined in Table 8.
command name
CR(7:0)
Function
7
6
5
4
3
2
1
0
SELECT(CHAN)
1
0
0
0
x
CHAN(2:0)
Bias channel (see Table 9 for CHAN)
CONVERT(CHAN)
1
0
0
1
x
CHAN(2:0)
Bias channel (see Table 9 for CHAN)
Wait POWDLY settling time
Run conversion
MANAUTO
1
0
1
1
x
x
x
x
Enter manual or automatic mode.
PENDET
1
1
0
0
x
x
x
x
Enter pen detect mode.
PENTRG
1
1
1
0
x
x
x
x
Enter pen trigger mode.
Table 8. I2C commands
The channels are defined as in Table 9.
Channel
CHAN(2:0)
Function
2
1
0
X
0
0
0
X channel
Y
0
0
1
Y channel
Z1
0
1
0
First channel for pressure measurement
Z2
0
1
1
Second channel for pressure measurement
AUX
1
0
0
Auxiliary channel
reserved
1
0
1
reserved
1
1
0
SEQ
1
1
1
Channel sequentially selected from
I2CRegChanMsk register, (see Table 8)
Table 9. channel definition
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5.5. Power-Up
The NIRQ pin is kept low during SX8650 power-up.
voltage
During power-up, the SX8650 is not accessible and I2C
communications are ignored.
VDD
VDD/2
time
After startup, the host must wait tpor before any communication
with the SX8650.
t POR
voltage
As soon as NIRQ rises, the SX8650 is ready for I2C
communication.
The POR of the SX8650 will reset all registers and states of the
SX8650 at power-up.
NIRQ
time
Figure 28.
Power-up, NIRQ
5.6. Reset
Additionally the host can reset the SX8650 by asserting the
NRST pin (active low) and also via the I2C bus.
voltage
NRST
t NRST
time
voltage
If NRST is driven LOW, then NIRQ will be driven low by the
SX8650. When NRST is released (or set to high) then NIRQ will
be released by the SX8650.
The circuit has also a soft reset capability. When writing the
code 0xDE to the register RegSoftReset, the circuit will be
reset.
NIRQ
t POR
time
Figure 29.
Reset
6. Modes of Operation
The SX8650 has four operation modes that are configured using the I2C commands as defined in Table 8 and Table 6.
These 4 modes are:
manual (command ‘MANAUTO’ and RATE=0),
automatic (command ‘MANAUTO’ and RATE>0),
pen detect (command ‘PENDET’),
pen trigger mode (command ‘PENTRG’).
At startup the SX8650 is set in manual mode.
In the manual mode the SX8650 is entirely stopped except for the I2C peripheral which accepts host commands. This
mode requires RATE equal to be zero (RATE = 0, see Table 6).
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In the automatic mode the SX8650 will sequence automatic channel conversions. This mode requires RATE to be larger
than zero (RATE > 0, see Table 6).
In the PENDET mode the pen detection is activated. The SX8650 will generate an interrupt (NIRQ) upon pen detection and
set the PENIRQ bit in the I2C status register. To quit the PENDET mode the host needs to configure the manual mode.
In the PENTRG mode the pen detection is activated and a channel conversion will start after the detection of a pen. The
SX8650 will generate an interrupt (NIRQ) upon pen detection and set the CONVIRQ bit in the I2C status register. To quit
the PENTRIG mode the host needs to configure the manual mode. The PENTRG mode offers the best compromise
between power consumption and coordinate throughput.
6.1. Manual Mode
In manual mode (RATE=0) single actions are triggered by the I2C commands described in Table 10.
When a command is received, the SX8650 executes the associated task and waits for the next command. It is up to the
host to sequence all actions.
Command
CONVERT(CHAN)
Action
Select and bias a channel
Wait for the programmed settling time (POWDLY)
Start conversion
SELECT(CHAN)
Select and bias a channel
Table 10 CONVERT and SELECT command
The channel can be biased for an arbitrary amount of time by first sending a SELECT command and then a CONVERT
command once the settling time requirement is met.
The SELECT command can be omitted if the large range of POWDLY settings cover the requirements. In the latter case,
the CONVERT command alone is enough to perform an acquisition.
With CHAN=SEQ, multiple channels are sampled. This requires programming the POWDLY field in register RegCTRL0.
The selected channel will be powered during POWDLY before a conversion is started. The channel bias is automatically
removed after the conversion has completed.
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6.2. Automatic mode
In automatic mode (RATE > 0), SX8650 will automatically decide when to start
acquisition, sequence all the acquisitions and alerts the host if data is available
for download with a NIRQ. The host will read the channels and the SX8650 will
start again with the next conversion cycle.
AUTO MODE
The fastest coordinate rate is obtained if the host reads the channels
immediately after the NIRQ.
yes
CONDIRQ=1 ?
Touch Detected ?
To not loose data, the SX8650 will not begin conversion before the host read the
channels. If after the NIRQ a delay superior to the sampling period is made by
the host to read the channels a slower coordinate rate is obtained.
When the control CONDIRQ bit (see register I2CRegStat Table 6) is set to ‘1’
then the interrupts will only be generated if the pen detect occurred. This result in
a regular interrupt stream, as long as the host performs the read channel
commands, and the screen is touched. When the screen is not touched,
interrupts does not occur.
no
yes
Set timer=RATE
Start timer
Start channel conversion
If the control CONDIRQ bit is cleared to ‘0’, the interrupts will always be
generated. In case there is no pen detected on the screen then the coordinate
data will be qualified as invalid, see section [5.1.7]. This result in a regular
interrupt stream, as long as the host performs the read channel commands,
independent of the screen being touched or not.
All conversion
finished
Set interrupt
NIRQ=0
All channel
data read
This working is illustrated in Figure 30.
Release Interrupt
NIRQ=1
Timer expire
Figure 30. AUTO Mode Flowchart
Figure 31 shows the I2C working in automatic mode. After the first sentence send throught the I2C to make the
initialization, traffic is reduced as only reads are required.
The processing time is the
necessary time for the SX8650 to
makes the pendetection, the
settling time (POWDLY) and the
conversion. This time increases
with the number of channel
selected and the filter used.All
succeeding conversions notifies
the host by an interrupt signal and
the host only needs to issue the
I2C read command.
TOUCH
NIRQ
I2C Read Channels
Conversion time
Time is 1/ RATE
NAK
The reads occur at the RATE
interval.
Figure 31.
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I2C working in AUTO mode
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6.3. PENDET Mode
The PENDET mode can be used if the host only needs to know if the screen has been
touched or not and take from that information further actions. When pen detect circuitry is
triggered the interrupt signal NIRQ will be generated and the status register bit ‘PENIRQ’ will
be set. The bit is cleared by reading the status register RegStat.
PENDET MODE
Touch Detected ?
no
yes
Set interrupt
NIRQ=0
RegStat read
Release Interrupt
NIRQ=1
Figure 32. PENDET Mode Flowchart
6.4. PENTRIG Mode
The PENTRIG mode offers the best compromise between power consumption and coordinate throughput.
In this mode the SX8650 will wait until a pen is detected on the screen and then starts the coordinate conversions. The
host will be signalled only when the screen is touched and coordinates are available.
The coordinate rate in pen trigger mode is determined by the speed of the host reading the channels and the conversion
times of the channels. The host performs the minimum number of I2C commands in this mode.
The host has to wait for the NIRQ interrupt to make the acquisition of the datas.
The flowchart and the I2C working is illustrated in Figure 33.
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PENTRIG MODE
Touch Detected ?
no
TOUCH
yes
NIRQ
Start channel conversion
All conversion
finished
I2C bus
I2C Read Channels
Set interrupt
NIRQ=0
Conversion time
NAK
All channel
data read
Release Interrupt
NIRQ=1
Figure 33. PENTRIG Mode Flowchart and I2C working in PENTRIG mode
7. Application Information
This section describes in more detail application oriented data.
7.1. Acquisition Setup
Prior to an acquisition, the SX8650 can be setup by writing the control registers. Registers are written by issuing the
register write command. They can be read by issuing the read command. Please refer to the section [5.3].
If no registers are written, the circuit will start in manual mode.
7.2. Channel Selection
The SX8650 can be setup to start a single channel conversion or to convert several channels in sequence. For a single
conversion, the channel to be converted is determined from the CHAN(2:0) field in the command word (defined in Table 9).
Several channels can be acquired sequentially by setting the CHAN(2:0) field to SEQ. The channels will be sampled in the
order defined by register RegChanMsk from MSB to LSB.
If a “one” is written in a channel mask, the corresponding channel will be sampled, in the opposite case, it is ignored and
the next selected channel is chosen.
7.3. Noise Reduction
A noisy environment can decrease the performance of the controller. For example, an LCD display located just under the
touch screen can adds a lot of noise on the high impedance A/D converter inputs.
7.3.1. POWDLY
In order to perform correct coordinates acquisition properly, some time must be given for the touch screen to reach a
proper level. It is a function of the PCB trace resistance connecting the SX8650 to the touchscreen and also the
capacitance of the touchscreen. If tau is this RC time constant then POWDLY duration must be programmed to 10 tau to
reach 12 bit accuracy.
Adding a capacitor from the touch screen drivers to ground is a solution to minimize external noise. A low-pass filter
created by the capacitor may increase settling time. Therefore, use POWDLY to stretch the acquisition period. POWDLY
can be estimated by the following formula :
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Rtouch is the sum of the panel resistances plus any significant series input resistance, Rxtot + Rytot + Ri.
Ctouch is the sum of the touch panel capacitance plus any noise filtering and routing capacitances.
7.3.2. SETDLY
A second method of noise filtering uses an
averaging filter as described in section [5]
(Data processing). In this case, the chip
will sequence up to 7 conversions on each
channel. The parameter SETDLY sets the
settling time between the consecutive
conversions.
X+
Start of the
conversion
5 successive
conversions
POWDLY
In most applications, SETDLY can be set
to 0. In some particular applications, where
accuracy of 1LSB is required and Ctouch
is less than 100nF a specific value should
be determined.
SETDLY
time
Figure 34. POWDLY and SETDLY timing with FILT=2
7.3.3. AUX Input
An alternate conversion trigger method can be used if the host system provides additional digital signals that indicate noisy
or noise-free periods. The SX8650 can be set up to start conversions triggered by the AUX pin. A rising edge, a falling
edge or both can trigger the conversion. To enter this mode, AUXACQ must be set to a different value than '00' as defined
in Table 6. The AUX edge will first trigger the bias delay (POWDLY). Following the programmed delay, the channel
acquisition takes place.
7.4. Interrupt Generation
An interrupt (NIRQ=0) will be generated:
During the power-up phase or after a reset
After completion of a conversion in MANUAL, PENTRIG or AUTO mode. CONVIRQ (bit [7] of RegStat) will be set at the
same time.
After a touch on the panel is detected in PENDET mode. PENIRQ (bit [6] of RegStat) will be set at the same time.
The NIRQ will be released and pulled high(NIRQ=1) by the external pull-up resistor:
When the power-up phase is finished
When the host read all channels data that were previously converted by the SX8650 in MANUAL, PENTRIG or AUTO
mode. CONVIRQ will be cleared at the same time.
When the host read the status register in PENDET mode. PENIRQ, will be cleared at the same time.
An active NIRQ (low) needs to be cleared before any new conversions will occur.
7.5. Coordinate Throughput Rate
The coordinate throughput rate depends on the following factors:
The I2C communication time : Tcom
The conversion time : Tconv
1
The coordinate rate is the frequency to get the X, Y, Z1 and Z2 coordinate: CoordRate = ------------------------------T com + T conv
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7.5.1. I2C Communication Time
The minimun time to read the channel data in PENTRIG mode is : T com
= ( 8 + 16 × N chan ) × T SPI
The highest throughput will be obtained with a I2C frequency of 5MHz when the host read the channel data as quickly as
possible after the NIRQ falling edge.
7.5.2. Conversion Time
The maximum possible throughput can be estimated with the following equation
Tconv ( us ) = 47 ⋅ Tosc + N chan ⋅ ( POWDLY + ( N filt – 1 ) ⋅ SETDLY + ( 21N filt + 1 ) ⋅ Tosc )
with:
Nfilt = {1,3,5,7} based on the order defined for the filter FILT (see Figure 4).
Nchan = {1,2,3,4,5} based on the number of channels defined in RegChanMsk
POWDLY = 0.5us to 18.19ms, settling time as defined in RegCtrl0
SETDLY = 0.5us to 18.19ms, settling time when filtering as defined in RegCtrl2
Tosc is the oscillator period (555ns +/- 15%)
Table 11 gives some examples of Coordinate Rate and Sample Rate for various setting in PENTRIG mode.
Nch
[1..5 ]
Nfilt
[1 3 5 7]
PowDly
[uS]
SetDly
[uS]
Tconv
[uS]
Tcomm
[uS]
2.0
1.0
0.5
0.5
51.7
91.2
2.0
3.0
35.5
0.5
170.6
2.0
5.0
2.2
0.5
4.0
3.0
35.5
0.5
Total
[uS]
CR
[kCPS]
ECR
[kCPS]
SR
[kSPS]
ESR
[kSPS]
142.9
7.0
14.0
7.0
14.0
91.2
261.8
3.8
7.6
11.5
22.9
152.8
91.2
244.0
4.1
8.2
20.5
41.0
315.0
181.2
496.2
2.0
8.1
6.0
24.2
Table 11Coordinate throughput examples
7.5.3. AUTO MODE
In AUTO mode, the coordinate throughput rate is the RATE set in RegCtrl0 if the host retrieve channel data at this RATE.
The RATE set should be superior or equal to the CoordRate.
7.6. ESD event
In case of ESD event, the chip can reset to protect its internal circuitry. Polling a register may be used to check the chip
reset event.
ESD event may trig the pen detection circuitry. In this case wrong data will be send to the host. To detect this false
coordinates on 4-wire touchscreen, a pressure measurement can be done. When reading the values Z1<10 and Z2>4070,
the data may not be valid and indicate an ESDevent or a
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7.7. Application Schematic
A typical application schematic is shown in Figure 35
VDD
SX8651
VDD
0.1 uF
VDD_HOST
AUX
VDD_HOST
POR
OSC
R1
R2
R3
R4
NRST
2.2k
2.2k
2.2k
X+
A0
2.2k
Control
I2C
HOST
DO
XYTOUCH
SCREN
GND
SCL
Touch
Screen
Interface
Vref
ref+
in
ADC out
ref-
Figure 35.
SDA
Digital
Filter
NIRQ
SCL
SDA
I2C
Interface
Y+
INT
Typical application
VDD_HOST can be higher than VDD but must not exceed the maximun voltage of 3.7V.
The host GPIO D0 output is connected to the SX8650 NRST input to allows SX8650 hardware reset.
The host D0 may be a totem pole output. In this configuration and if the host and the SX8650 are supply with the same
VDD, the R1 pull-up resistor is not required.
NIRQ pin is connected to a host interrupt pin. Once NIRQ event happens, the host read the data by a I2C read register.
7.8. Application Examples
7.8.1. Soft Keyboard
A keyboard application can be designed with the help of the
SX8650. The data are entered by tapping keys on the
keyboard with a stylus. The SX8650 send the key
coordinates to the microcontroller which interpret them as a
symbol.
When the keyboard is not activated, the chip stays in low
power mode to save power.
Figure 36. Keyboard
7.8.2. Slider Controls
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Every kind of controls such as rotative knob,
slider, button could be emulated with a SX8650
associated to a touchscreen.
Figure 37. Slider controls
7.8.3. Game
Many kinds of game can be designed with touchscreen. With its high
data throughput and its ability to sense pressure, SX8650 is the perfect
controller for this kind of application.
Figure 38. Game
7.8.4. Handwriting Application
An handwriting application needs a powerful microcontroller to run
recognition algorithms. The SX8650 includes a preprocessing block
to reduce host activity.
Figure 39. Handwriting application
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8. Packaging Information
8.1. DFN Package
D
A
DIMENSIONS
INCHES
MILLIMETERS
DIM
MIN NOM MAX MIN NOM MAX
B
A
A1
A2
b
D
D1
E
E1
e
L
N
aaa
bbb
E
PIN 1
INDICATOR
(LASER MARK)
A
.028
.000
.030 .031
.001 .002
(.008)
.006 .008 .010
.114 .118 .122
.074 .079 .083
.114 .118 .122
.042 .048 .052
.018 BSC
.012 .016 .020
12
.003
.004
0.70
0.00
0.75 0.80
0.02 0.05
(0.20)
0.15 0.20 0.25
2.90 3.00 3.10
1.87 2.02 2.12
2.90 3.00 3.10
1.06 1.21 1.31
0.45 BSC
0.30 0.40 0.50
12
0.08
0.10
SEATING
PLANE
aaa C
C
A1
A2
D1
1
2
e/2
LxN
E/2
E1
N
e
bxN
D/2
bbb
C A B
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.
Figure 40. DFN Package Outline Drawing
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K
DIM
(C)
Z
G
H
Y
X
P
C
G
H
K
P
X
Y
Z
DIMENSIONS
INCHES
MILLIMETERS
(.112)
.075
.055
.087
.018
.010
.037
.150
(2.85)
1.90
1.40
2.20
0.45
0.25
0.95
3.80
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Figure 41. DFN Package Land Pattern
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8.2. WLCSP Package
B
1.5±0.10
A
INDEX AREA
A1 CORNER
2.0±0.10
0.10 C
0.625 Max.
0.25±0.02
SEATING
PLANE
C
1.00
0.08 C
0.50
D
0.50
C
1.50
B
0.25
A
1
2
3
12X Ø0.315±0.03
0.05
C A B
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS
Figure 42. WLCSP Package Outline Drawing
1.00
0.50
0.50
0.25
1.50
12X Ø0.25
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS
2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Figure 43. WLCSP Land Pattern
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ADVANCED COMMUNICATIONS & SENSING
© S e m te c h 2 0 1 0
A ll rig h ts re s e rv e d . R e p ro d u c tio n in w h o le o r in p a rt is p ro h ib ite d w ith o u t th e p rio r w ritte n c o n s e n t o f th e c o p y rig h t o w n e r. T h e
in fo rm a tio n p re s e n te d in th is d o c u m e n t d o e s n o t fo rm p a rt o f a n y q u o ta tio n o r c o n tra c t, is b e lie v e d to b e a c c u ra te a n d re lia b le
a n d m a y b e c h a n g e d w ith o u t n o tic e . N o lia b ility w ill b e a c c e p te d b y th e p u b lis h e r fo r a n y c o n s e q u e n c e o f its u s e . P u b lic a tio n
th e re o f d o e s n o t c o n v e y n o r im p ly a n y lic e n s e u n d e r p a te n t o r o th e r in d u s tria l o r in te lle c tu a l p ro p e rty rig h ts . S e m te c h a s s u m e s
n o re s p o n s ib ility o r lia b ility w h a ts o e v e r fo r a n y fa ilu re o r u n e x p e c te d o p e ra tio n re s u ltin g fro m m is u s e , n e g le c t im p ro p e r
in s ta lla tio n , re p a ir o r im p ro p e r h a n d lin g o r u n u s u a l p h y s ic a l o r e le c tric a l s tre s s in c lu d in g , b u t n o t lim ite d to , e x p o s u re to
p a ra m e te rs b e y o n d th e s p e c ifie d m a x im u m ra tin g s o r o p e ra tio n o u ts id e th e s p e c ifie d ra n g e .
S E M T E C H P R O D U C T S A R E N O T D E S IG N E D , IN T E N D E D , A U T H O R IZ E D O R W A R R A N T E D T O B E S U IT A B L E F O R U S E IN
L IF E -S U P P O R T A P P L IC A T IO N S , D E V IC E S O R S Y S T E M S O R O T H E R C R IT IC A L A P P L IC A T IO N S . IN C L U S IO N O F
S E M T E C H P R O D U C T S IN S U C H A P P L IC A T IO N S IS U N D E R S T O O D T O B E U N D E R T A K E N S O L E L Y A T T H E C U S T O M E R ’S
O W N R IS K . S h o u ld a c u s to m e r p u rc h a s e o r u s e S e m te c h p ro d u c ts fo r a n y s u c h u n a u th o riz e d a p p lic a tio n , th e c u s to m e r s h a ll
in d e m n ify a n d h o ld S e m te c h a n d its o ffic e rs , e m p lo y e e s , s u b s id ia rie s , a ffilia te s , a n d d is trib u to rs h a rm le s s a g a in s t a ll c la im s ,
c o s ts d a m a g e s a n d a tto rn e y fe e s w h ic h c o u ld a ris e .
A ll re fe re n c e d b ra n d s , p ro d u c t n a m e s , s e rv ic e n a m e s a n d tra d e m a rk s a re th e p ro p e rty o f th e ir re s p e c tiv e o w n e rs .
Contact information
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E-mail: [email protected]@semtech.comInternet: http://www.semtech.com
USA
200 Flynn Road, Camarillo, CA 93012-8790.
Tel: +1 805 498 2111 Fax: +1 805 498 3804
FAR EAST
12F, No. 89 Sec. 5, Nanking E. Road, Taipei, 105, TWN, R.O.C.
Tel: +886 2 2748 3380 Fax: +886 2 2748 3390
EUROPE
Semtech Ltd., Units 2 & 3, Park Court, Premier Way, Abbey Park Industrial Estate, Romsey, Hampshire, SO51 9DN.
Tel: +44 (0)1794 527 600 Fax: +44 (0)1794 527 601
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