FAN2560 350mA Low-VIN LDO with Fast Transient Response Features Description The FAN2560 is a linear low-dropout (LDO) regulator with a split-supply architecture. Separate bias and supply inputs allow bias to be taken directly from the battery, while the input is taken from a lower preregulated source. This allows a smaller differential voltage between input and output, which provides greater efficiency over a wider VBAT range. 55µA Typical Quiescent Current Up to 350mA Output Current 2.9V to 5.5V Bias Supply Voltage VOUT+0.1V to 5.5V Power Input Supply Voltage Fixed Voltage Options: 1.3V and 1.5V The FAN2560 is available in a fixed-voltage output, 5-bump, WLCSP package. Thermal Shutdown Protection (TSD) Input Under-Voltage Lockout (UVLO) Short-Circuit Current Protection (SCP) 5-bump 0.96 x 1.33mm WLCSP Applications Moderate Current Digital Loads DVB-H, DMB Processors Handsets, Smart Phones WLAN DC-DC Converter Modules PDA, DSC, PMP, and MP3 Players Portable Hard Disk Drives Typical Applications 2.9 to 5.5V VOUT +0.3V 2.9 to 5.5V VIN VOUT CIN 1 F VBAT VBAT FAN2560 GND VIN VOUT CIN 1μF COUT 2.2 F GND FAN2560 COUT 2.2μF EN EN Figure 1. Separate Supply and Bias Line Figure 2. Connected Supply and Bias Line Ordering Information Part Number Operating Temperature Range Package FAN2560UC13X -40°C to 85°C WLCSP-5 0.96 x 1.33mm Green Tape and Reel FAN2560UC15X -40°C to 85°C WLCSP-5 0.96 x 1.33mm Green Tape and Reel Eco Status Packing Method For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com FAN2560 — 350mA Low-VIN LDO with Fast Transient Response August 2009 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Block Diagram Figure 3. IC Block Diagram Pin Configuration VIN A1 GND A3 VOUT VOUT A3 B2 VBAT C1 A1 VIN GND B2 C3 EN EN C3 TOP VIEW C1 VBAT BOTTOM VIEW Figure 4. 0.96 x 1.33mm WLCSP package Pin Definitions Pin # Name Description A1 VIN A3 VOUT Output Voltage. A typical COUT=1μF to 2.2μF MLCC is required to GND, placed close to the VOUT terminal. C1 VBAT Battery bias supply input. No capacitor is required unless another bulk capacitor is more than few inches away. C3 EN B2 GND Power supply input. A minimum 1μF MLCC is required to GND. Enable input. The device is in shutdown mode when the voltage at this pin is <0.4V and enabled when >1.1V. The EN latches the LOW logic state once externally forced. Do not leave this pin floating when the device is turned ON. Ground pin. Connect to a PCB GND plane. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VOUT Parameter Min. Max. Units VBAT, VIN, EN -0.3 6.0 V Output Voltage -0.3 VIN + 0.3V V TJ Junction Temperature -40 +150 °C TSTG Storage Temperature -65 +150 °C +260 °C TL ESD Lead Soldering Temperature, 10 Seconds Electrostatic Discharge Protection Level Human Body Model per JESD22-A114 3.5 Charged Device Model per JESD22-C101 1.5 kV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VBAT Parameter Bias Supply Range, (VOUT + 1.4V) < VBAT VIN Power Supply Range, (VIN < VBAT) IOUT Output Current CIN COUT Min. Input Capacitor (Effective Capacitance) Max. Units 2.9 5.5 V VOUT + VDO VBAT V 0 350 mA 300 mΩ 12.0 μF 300 mΩ 0.7 Equivalent Series Resistance (ESR) Typ. Output Capacitor (Effective Capacitance) 0.7 Equivalent Series Resistance (ESR) μF 1.0 0 2.2 3 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Absolute Maximum Ratings TA Operating Ambient Temperature Range -40 +85 °C TJ Operating Junction Temperature Range -40 +125 °C Max. Units Thermal Properties Symbol ΘJA Parameter Min. Typ. (1) Junction-to-Ambient Thermal Resistance 180 °C/W Note: 1 Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer boards in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperature TA. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 3 VBAT=2.9V to 5.5V, VIN=VOUT + 0.3V, TA=-40°C to +85°C, Test Circuit Figure 1, unless otherwise noted. Typical values are at TA=25°C, VBAT=3.6V, ILOAD=1mA, VEN=1.8V. Symbol Parameter Conditions Min. Typ. Max. Units 2.9 5.5 V VOUT + VDO VBAT V Power Supplies VBAT Battery Input Supply (VOUT + 1.4V) < VBAT VIN Input Voltage Range VIN < VBAT IBAT VBAT Supply Current ILOAD=0µA 55 70 μA VIN Supply Current ILOAD=0µA 4 11 μA VBAT Shutdown Supply Current VBAT=3.6V, EN=GND 0.01 1.00 μA IVINSD VIN shutdown Supply Current VBAT=3.6V, EN=GND 0.01 1.00 μA VUVLO Under-voltage Lockout Threshold VBAT Falling Edge 2.0 2.4 Hysteresis 0.05 IIN IVBATSD V(EN) I(EN) Enable High-level Input Voltage V V 1.1 Enable Low-level Input Voltage V 0.4 Enable Input Leakage Current EN=VIN or GND 0 μA 0.5 Regulation IOUT VDO ∆VOUT Maximum Output Current Dropout Voltage with Respect to Output Voltage Accuracy ∆VOUTline Line Regulation ∆VOUTload Load Regulation ISCP ISU TSD PSRR en 350 (2) VIN ILOAD=350mA 70 Over Full VIN, IOUT, and Temperature Range Over Full VIN, VBAT, IOUT Range Short-circuit Current Limit Start-up Peak Current Thermal Shutdown Power Supply Rejection Ratio Output Noise Voltage VBAT and VIN applied, EN from L to H, no load, TA= -30C to +85C mA 3V<VBAT <4.5V -2 200 mV 2 % <6 mV 400 mA 130 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Electrical Characteristics 300 mA 2.9V<VBAT <5.5V 500 Rising Temperature 150 °C Hysteresis 10 °C VIN, 10Hz to 10kHz > 60 VBAT, 10Hz to 10kHz > 50 dB 10Hz to 100kHz 60 µVRMS Timing Characteristics Peak ∆VOUTline Line Transient Response 600mV, tRISE=tFALL=10µs ±2 mV Peak ∆VOUTload Load Transient Response 0 to 300mA, tRISE=tFALL=1µs ±15 mV tON Turn-on Time 70 200 µs Note: 2 Dropout voltage is the minimum input to output differential voltage needed to maintain VOUT in regulation, in specified conditions © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 4 Unless otherwise specified, CIN=1μF ceramic, COUT=2.2μF ceramic, VIN=VOUTnom + 0.3V, VBAT=3.6V, TA=25C, VEN=1.8V. 59.0 85ºC 80 25ºC 60 40 No Load 58.0 Battery Current (µA) Dro p o u t V IN (m V ) 100 -40ºC 20 0 57.0 56.0 85°C 55.0 25°C 54.0 53.0 52.0 -40ºC 51.0 0 50 100 150 200 250 300 350 400 2.5 3 3.5 4 4.5 5 5.5 Battery Voltage (V) Load Current (mA) Figure 5. Dropout Voltage vs. Load Current Figure 6. Battery Quiescent Supply Current 6 110 5 100 85ºC IBAT+IIN (nA) IGND(µA) 90 25ºC 80 -40ºC 70 60 3 2 1 50 0 0 50 100 150 200 250 300 350 2 3 3.5 4 4.5 VBAT=VIN(V), VEN=0V Figure 7. GND Current vs. Load Current Figure 8. Off Mode Current S h o rt-C i rc u i t C u rre n t (m A ) 7.0 6.0 2.5 Iload (mA) 8.0 V IN Current (µA) 4 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Typical Characteristics 85ºC No load 5.0 25ºC 4.0 3.0 2.0 -40ºC 1.0 0.0 1.6 2.1 2.6 3.1 3.6 4.1 4.6 5.1 VIN Voltage(V) 5.5 25°C -40ºC 2.5 3 85ºC 3.5 4 4.5 5 5.5 Battery Voltage (V) Figure 9. Input VIN Quiescent Current (VBAT=5.5V) © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 425 420 415 410 405 400 395 390 385 380 5 Figure 10. Output Short-Circuit Current www.fairchildsemi.com 5 Figure 11. Load Transient Response (5µs/div.) Figure 12. Load Transient Response (5µs/div.) Figure 13. Line Transient Response (50µs/div.) Figure 14. Line Transient Response (50µs/div.) Figure 15. Start-up and Inrush Current (20µs/div.) Figure 16. Start-up and Inrush Current (20µs/div.) © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Typical Characteristics (Continued) www.fairchildsemi.com 6 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Typical Characteristics (Continued) Figure 17. PSRR VIN, 10Hz to 10kHz, 1mA Figure 18. PSRR VIN, 10kHz to 10MHz, 1mA Figure 19. PSRR VBAT, 10Hz to 10kHz, 1mA Figure 20. Noise Spectral Power Density, 100mA 1600 1400 1400 1200 1200 1000 VOUT (mV) VOUT (mV) 1000 800 600 3.6VBAT 2.9VBAT 5.5VBAT 2.9VBAT 200 600 400 3.6VBAT 400 800 200 5.5VBAT 0 0 0 0 200 Iload (mA) 400 600 800 200 300 400 500 600 700 800 Iload (mA) Figure 21. Output Current Voltage Characteristic, 1.5V Option © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 100 Figure 22. Output Current Voltage Characteristic, 1.3V Option www.fairchildsemi.com 7 (1) ⎧ TJ(max) − TA ⎫ PD(max) = ⎨ ⎬ Θ JA ⎩ ⎭ ENABLE Latch A pull-down resistor latches the LOW state of the EN input after this input is externally forced LOW. A lowside switch turns ON a 370 kΩ pull-down resistance to keep the EN in LOW state, even if the EN input is subsequently left floating. where TJ(max) is the maximum allowable junction temperature of the die, which is 125°C, and TA is the ambient operating temperature. θJA is dependent on the surrounding PCB layout and can be improved by providing a heat sink of surrounding copper ground. Soft-Start The addition of backside copper with through-holes, stiffeners, and other enhancements can also aid in reducing θJA. The heat contributed by the dissipation of other devices located nearby must be included in design considerations. A soft-start function prevents an excessive input current flow during start-up. When the LDO is enabled, the softstart circuit limits the peak inrush current below the specified maximum value, which increases when COUT increases. To further reduce the peak inrush current, the output capacitance may be lowered to 1µF, taking advantage of FAN2560 stability over a wide range of COUT capacitance. Reverse Current Path During normal operation, VIN is higher than VOUT and the parasitic diode for the series power FET is reverse biased. If the output voltage is externally forced above the input voltage, the parasitic diode gets forward biased and starts to conduct. In this case, it is necessary to limit the reverse current to maximum 100mA to avoid adversely affecting reliability. Short-Circuit and Thermal Protection The FAN2560 output current voltage characteristic has a fold-back shape that indicates a short-circuit current limit lower than the maximum load current. Although the short-circuit current is limited to below 500mA, the device can supply high peak output currents of up to 1A for brief periods. However, this output overload may cause the die temperature to increase and exceed maximum ratings due to power dissipation. In such cases, depending upon the ambient temperature, VIN, load current, and the junction-to-air thermal resistance (θJA) of the die, the device may enter thermal shutdown. During output overload conditions, when the die temperature exceeds the shutdown limit temperature of 150°C, the onboard thermal protection disables the output until the temperature drops below this limit, at which point the output is re-enabled. Capacitors Selection The FAN2560 is stable with a wide range of ceramic output capacitors. An output capacitor of at least 0.7µF effective capacitance and the minimum ESR over the frequency range of 3 to 300mΩ is required to ensure stability over the full range of supply voltages and load currents. High-ESR tantalum or electrolytic capacitors may be used, but a low ESR ceramic capacitor has to be connected in parallel at the output, at a distance no more than 1-inch from the VOUT pin. The MLCC capacitors indicated in Table 1 have been successfully tested with the FAN2560. FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Application Information Thermal Considerations For best performance, the die temperature and the power dissipated should be kept at moderate values. The maximum power dissipated can be evaluated based on the following relationship: Table 1. Recommended Capacitors Capacitance Size Vendor Part number 1μF 0603 MURATA GRM188R71C105KA120 2.2μF 0603 MURATA GRM188R61A225KF340 2.2μF 0402 MURATA GRM155R60J225ME15 © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 8 efficiency and low noise output. As can be seen in the scope pictures below the schematic, the already-low output voltage ripple, inherent to a switching regulator, is significantly attenuated by the FAN2560 at any frequency within the switching operating range. VBAT The FAN2560 is an ideal choice for battery-powered equipment. The low quiescent bias current can be supplied directly from the battery, while the input voltage can come from a high-efficiency buck regulator, like FAN5350. This combination provides both best Figure 23. Post Regulator for a Switching Converter Figure 24. PFM Mode (100mA Load) Buck Ripple Rejection, Horizontal Scale: 500ns/div. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Application Example: Post Regulator for a Switching Converter Figure 25. PWM, 3MHz (300mA Load) Buck Ripple Rejection, Horizontal Scale: 200ns/div. www.fairchildsemi.com 9 F BALL A1 INDEX AREA A E (0.50) (Ø0.25) Cu PAD B 0.03 C (0.866) A1 2X D (Ø0.35) SOLDER MASK OPENING (0.433) F 0.03 C 2X TOP VIEW D 0.332±0.018 0.06 C 0.625 MAX 0.05 C RECOMMENDED LAND PATTERN (NSMD) E 0.250±0.025 SEATING PLANE C SIDE VIEWS (X)+/-.018 0.50 0.50 F 0.005 A. NO JEDEC REGISTRATION APPLIES B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D DATUM C, THE SEATING PLANE, IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E PACKAGE TYPICAL HEIGHT IS 582 MICRONS +/- 43 MICRONS (539-625 MICRONS) F FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. BALL COMPOSITION: Sn95.5Ag3.9Cu0.6 SAC405 ALLOY H. DRAWING FILENAME: MKT-UC005AArev5 C A B 5 X Ø0.315 +/- .025 C B A 0.433 F 123 (Y)+/-.018 BOTTOM VIEW FAN2560 — 350mA Low-VIN LDO with Fast Transient Response Physical Dimensions Figure 26. Wafer-Level Chip-Scale Packaging (WLCSP) Product Specific Dimensions Product D E X Y FAN2560UC13X 1.330 +/- 0.030 0.960 +/- 0.030 0.230 0.232 FAN2560UC15X 1.330 +/- 0.030 0.960 +/- 0.030 0.230 0.232 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 10 FAN2560 — 350mA Low-VIN LDO with Fast Transient Response © 2006 Fairchild Semiconductor Corporation FAN2560 • Rev. 1.0.1 www.fairchildsemi.com 11