UNISONIC TECHNOLOGIES CO., LTD CD4066 CMOS IC QUAD BILATERAL SWITCH DESCRIPTION The UTC CD4066 is a quad bilateral switch which can be applied for switching of analog signals and digital signals. When control input CONT is set to “H” level, the impedance between input and output of the switch becomes low and when it is set to “L” level, the impedance becomes high. It has a much lower “ON” resistance, and “ON” resistance is relatively constant over the input-signal range. DIP-14 FEATURES * 15V Digital or ±7.5V Peak-to-Peak Switching * 85-Ω Typical On-State Resistance for 15V Operation * High noise immunity 0.45 VDD (typ.) * Matched “ON” resistance ∆RON=5Ω (typ.) over 15V signal input * High degree linearity 0.1% distortion (typ.) @ fIS=1kHz, VIS=5VP-P, VDD-VSS=5V, RL=10kΩ * Extremely low “OFF” 0.1nA (typ.) switch leakage: @ VDD-VSS=10V, TA=25°C * Extremely high control input impedance 1012Ω (typ.) * Frequency response, switch “ON” 40 MHz (typ.) ORDERING INFORMATION Ordering Number Lead Free Halogen Free CD4066L-D14-T CD4066G-D14-T www.unisonic.com.tw Copyright © 2012 Unisonic Technologies Co., Ltd Package Packing DIP-14 Tube 1 of 8 QW-R502-739.A CD4066 CMOS IC PIN CONFIGURATION IN/OUT 1 14 VDD OUT/IN 2 13 CONTROL A OUT/IN 3 12 CONTROL D IN/OUT 4 11 IN/OUT CONTROL B 5 10 OUT/IN CONTROL C 6 9 OUT/IN VSS 7 8 IN/OUT PIN DESCRIPTION PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PIN NAME IN/OUT OUT/IN OUT/IN IN/OUT CONTROL B CONTROL C VSS IN/OUT OUT/IN OUT/IN IN/OUT CONTROL D CONTROL A VDD DESCRIPTION Signal IN/OUT A Signal OUT/IN A Signal OUT/IN B Signal IN/OUT B CONTROL B CONTROL C Ground Signal IN/OUT C Signal OUT/IN C Signal OUT/IN D Signal IN/OUT D CONTROL D CONTROL A Power supply UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 8 QW-R502-739.A CD4066 CMOS IC BLOCK DIAGRAM IN/OUT 1 OUT/IN 2 OUT/IN 3 IN/OUT 4 CONTROL B 14 VDD 13 CONTROL A 12 CONTROL D 11 IN/OUT 5 10 OUT/IN CONTROL C 6 9 9 OUT/IN VSS 7 8 IN/OUT SW A SW D SW B SW C SCHEMATIC DIAGRAM UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 8 QW-R502-739.A CD4066 ABSOLUTE MAXIMUM RATING (VSS=0V unless otherwise specified.) PARAMETER Supply Voltage Input Voltage Power Dissipation Storage Temperature CMOS IC SYMBOL VDD VIN PD TSTG RATINGS -0.5~+18 -0.5~ VCC+0.5 700 -65~+150 UNIT V V mW °C RECOMMENDED OPERATING CONDITIONS (VSS=0V unless otherwise specified.) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD 3~15 V Input Voltage VIN 0~VDD V Operating Temperature TA -40~+85 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. DC ELECTRICAL CHARACTERISTICS (TA=+25°C, VSS=0V unless otherwise specified.) PARAMETER Quiescent Device Current SYMBOL IDD TEST CONDITIONS VDD=5V VIN=VDD VDD=10V VDD=15V MIN TYP 0.01 0.01 0.01 MAX UNIT 1.0 µA 2.0 4.0 SINGAL INPUTS AND OUTPUTS “ON” Resistance ∆“ON” Resistance Between Any 2 of 4 Switches Input or Output Leakage Switch “OFF” CONTROL INPUTS RON ∆RON IIS LOW Level Input Voltage VILC HIGH Level Input Voltage VIHC Input Current IIN RL=10kΩ~(VDD-VSS/2), VCON=VDD,VSS~VDD RL=10kΩ~(VDD-VSS/2), VCC=VDD, VIS=VSS~VDD VCON=0 VDD=5V VIS=V SS and VDD, VOS=VDD and VSS, VDD=10V IIS=±10µA VDD=15V VDD=5V 3.5 VDD=10V (Note 5) 7.0 VDD=15V 11.0 VDD-VSS=15V, VDD≥VIS≥VSS, VDD≥VCON≥VSS UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw VDD=5V VDD=10V VDD=15V VDD=10V VDD=15V 240 1050 120 400 80 240 10 5 ±0.1 ±50 2.25 4.5 6.75 2.75 5.5 8.25 1.5 3.0 4.0 Ω Ω nA V V ±10-5 ±0.3 µA 4 of 8 QW-R502-739.A CD4066 CMOS IC AC ELECTRICAL CHARACTERISTICS (TA=25°C, tR=tF=20nS and VSS=0V, unless otherwise specified) (Note 1) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VDD=5V 25 55 ns VCON=VDD, CL=5pF, Propagation Delay Time Signal tPHL, tPLH VDD=10V 15 35 ns RL=200kΩ (Fig. 1) VDD=15V 10 25 ns VDD=5V 125 ns Propagation Delay Time RL=1kΩ, CL=50pF, Control Input to Signal tPZH, tPZL VDD=10V 60 ns (Fig. 2, 3) Output High Impedance to Logical Level VDD=15V 50 ns V =5V 125 ns Propagation Delay Time DD RL=1kΩ, CL=50pF, Control Input to Signal tPHZ, tPLZ VDD=10V 60 ns (Fig. 2, 3) Output Logical Level to High Impedance VDD=15V 50 ns VCON=VDD=5V, VSS=-5V, RL=10kΩ, 0.1 % Sine Wave Distortion VIS=5Vp-p, f=1kHz (Fig. 4) VCON=VDD=5V, VSS=-5V, RL=1kΩ, Frequency Response-Switch “ON” 20 Log10(VOS/VIS)=-3dB, 40 MHz (Frequency at -3dB) VIS=5.0Vp-p (Fig. 4) VDD=5.0V, VCC=VSS=-5.0V, Feedthrough - Switch “OFF” RL=1kΩ, VIS=5.0Vp-p, 1.25 MHz (Frequency at -50dB) 20 Log10(VOS/VIS)=-50dB (Fig. 4) Crosstalk Between Any Two Switches (Frequency at -50dB) Crosstalk, Control Input to Signal Output Maximum Control Input VDD=VCON(A)=5.0V, RL=1kΩ, VSS=VCON (B)=5.0V, VIS(A)=5.0Vp-p, 20 Log10(VOS(B)/VIS(A))=-50dB(Fig. 5) VDD=10V, RL=10kΩ, RIN=1kΩ, VCC=10V Square Wave, CL=50pF (Fig. 6) VDD=5V RL=1kΩ, CL=50pF, VOS(f)=½ VOS(1kHz) VDD=10V (Fig. 7) VDD=15V 0.9 150 6 8 8.5 8.0 8.0 0.5 5.0 MHz mVPP MHz MHz MHz pF pF pF pF Signal Input Capacitance CIS Signal Output Capacitance COS VDD=10V Feedthrough Capacitance CIOS VCON=0V Control Input Capacitance CIN 7.5 Notes: 1. AC Parameters are guaranteed by DC correlated testing. 2. These devices should not be connected to circuits with the power “ON”. 3. In all cases, there is approximately 5 pF of probe and jig capacitance in the output; however, this capacitance is included in CL wherever it is specified. 4. VIS is the voltage at the in/out pin and VOS is the voltage at the out/in pin. VCON is the voltage at the control input. 5. Conditions for VIHC: a) VIS=VDD, IOS=standard B series IOH b) VIS=0V, IOL= standard B series IOL UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 8 QW-R502-739.A CD4066 CMOS IC SPECIAL CONSIDERATION Using continuously under heavy loads may cause UTC CD4066 to decrease in the reliability even if the operating conditions are within the absolute maximum ratings and the operating ranges. In applications where separate power sources are used to drive VDD and the signal input, the VDD current capability should exceed VDD/RL. This provision avoids any permanent current flow or clamp action of the VDD supply when power is applied or removed from UTC CD4066. AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS VDD tr VCON=VDD VIS VDD VDD CONTROL VIS OUT/IN IN/OUT CL 50pF VSS VOS RL 200kΩ VOS tf 90% 50% 10% 0V tPLH VDD tPHL 50% 0V Fig. 1 tPHL, tPLH Propagation Delay Time Signal Input to Signal Output VDD VCON VDD VDD CONTROL OUT/IN VIS=0V IN/OUT tPZL RL 1kΩ VDD 50% VOS CL 50pF VSS tPLZ VDD 0V VDD 50% 0V tPZL 90% VOL VDD VOL tPLZ 10% Fig. 3 tPZL, tPLZ Propagation Delay Time Control to Signal Output UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 8 QW-R502-739.A CD4066 CMOS IC AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS(Cont.) 5V VCON(1)=VDD VIS(1) VDD CONTROL IN/OUT 2.5V VOS(1) OUT/IN RL 1kΩ VSS VIS(1) 0V -2.5V 1/f -5V 5V VCON(2)=VSS VIS(2)=0V VDD CONTROL IN/OUT VOS(2) OUT/IN VSS RL 1kΩ -5V Fig. 5 Crosstalk Between Any Two Switches UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 8 QW-R502-739.A CD4066 CMOS IC AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS(Cont.) UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 8 QW-R502-739.A