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'+ P 0(N+ N ??N >'0 %N?+N?'0'NE(N?.N+>'0P0N'FC'N$N0 .subckt mcp606 1 2 3 4 5 * | | | | | * | | | | Output * | | | Negative supply * | | Positive Supply * | Inverting input * Non-inverting input * * Macromodel for MCP606 (single), MCP607 (dual), MCP608 (single w/CS), and MCP609 (quad) * * The characteristics of the MCP606, MCP607, MCP608, and MCP609 have the same fundamental * performance and behavior. Consequently, this single op amp macromodel supports all four * devices. However, the chip select function of the MCP608 is not modeled. * * Revision History: * REV A : 6-30-99 created BCB * * This macromodel models typical amplifier offset voltage, DC power supply rejection, input * capacitance, open loop gain over frequency, phase margin with 60pF load, output swing, * power supply current, input voltage noise, slew rate. * * NOTICE: THE INFORMATION PROVIDED HEREIN IS BELIEVED TO BE RELIABLE, * HOWEVER, MICROCHIP ASSUMES NO RESPONSIBILITY FOR INACCURACIES OR * OMISSIONS. MICROCHIP ASSUMES NO RESPONSIBILITY FOR THE USE OF THIS * INFORMATION, AND ALL USE OF SUCH INFORMATION SHALL BE ENTIRELY AT * THE USER'S OWN RISK. NO INTELLECTURAL PROPERTY RIGHTS OR LICENSES * TO ANY OF THE TECNOLOGY DESCRIBED HEREIN ARE IMPLIED OR GRANTED TO * ANY THIRD PARTY. MICROCHIP RESERVES THE RIGHT TO CHANGE THIS MODEL * AT ANY TIME WITHOUT NOTICE. * * *Input Stage, pole at 300kHz M1 9 64 7 3 Ptype M2 8 2 7 3 Ptype CDIFF 1 2 3E-12 CCM1 1 4 6E-12 CCM2 2 4 6E-12 IDD 3 7 13.33e-6 RA 8 6 1.839e3 RB 9 6 1.839e3 CA 8 9 125e-12 ICOMP 3 4 -194.63e-6 *Input Stage Common-Mode Clampling VCMM 4 6 0.35 ECM 55 4 3 64 1 RCM DCMP VCMP 57 56 57 56 55 4 1E3 DY 1.2 0&3 RST DST VST 58 59 58 GCMP2 59 55 4 1E3 DX 1.6 23 4 POLY(2) 57 56 58 59 0 0 0;0 -0.5E-3 0.5E-3 *Input errors (vos, en, psr) ERR 64 1 poly(2) (67,4) (3, 4) -229.9e-6 1 23e-6 *Second GS R1 C2 Stage, pole at 0.183Hz 23 4 8 9 23 4 8.2144e9 23 4 110e-12 VSOM VSOP DSOM DSOP 3 25 23 25 24 4 24 23 *HCM 23 3 543.78e-6 4.784 -3.98 DY DY VCMP FS 3 4 POLY(11) VO3 VO5 VO4 VO6 VO1 VO2 VO9 VO10 VMID1 VSOP VSOM + 200E-6 -1 -1 -1 1 -1 -1 1 1 -1 -1 -1 *mid-supply reference RMID1 3 35 VMID1 35 34 RMID2 4 34 ELEVEL 34 4 61.62E3 0 61.62E3 23 4 *output DO3 DO4 DO5 DO6 DO7 DO8 VO3 VO4 stage 34 44 3 3 4 4 43 5 43 34 45 46 45 46 5 44 DY DY DY DY DY DY 0.1 0.03 GO5 VO5 GO6 VO6 GO1 VO1 3 47 4 48 49 49 47 5 48 5 4 45 3 0 34 0 5 0 GO2 VO2 RO9 VO9 RO10 VO10 50 50 3 51 52 52 4 46 51 5 4 5 34 0 100 0 100 0 * input VN1 DN1 RN1 voltage noise 65 4 65 67 67 4 -1 34 10E-3 4 10E-3 34 10E-3 5 10E-3 0.6 DX 10E3 .model Ptype PMOS L=2 W=105 .model DY D (IS=1e-15 BV =50) .model DX D (IS=1e-18 AF=0.6 KF=10e-17) .ENDS 6 0&3 , ". .( ;;11 6%11 XXXXXXXX XXXXXNNN YYWW MCP606 I/PNNN YYWW XXXXXXXX XXXXYYWW NNN MCP606 I/SNYYWW NNN XXXX YYWW NNN $&)MM***M QQ KK 444 * 606 IYWW NNN %!"(( U Q()0)( ),1 K@()0@V !,A@WAJ1 "/ !((.,() /& /!2((/"" !.( .@) .()&/ /! / !.&.(/( (!"(( * )) @ ( 2((/" " !. , () @ () (., () 0(, () @ &X ) ., ()1* ; @ ., ) / ( "( )) "",* (/(@/,!2((/"(* 9 0&3 ". .( /!0 XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP609-I/P XXXXXXXXXXXXXX YYWWNNN MCP6091SL XXXXXXXXXXX YYWWNNN XXXXXXXX YYWW 609IST YYWW NNN NNN 0&3 ,#"' /'0/'0 ! & ! $ ! α % φ + β = $+ 83 3 267 2 5 300 4 2 , 30, 2 + 1+ 1% +0 +, $% $%& <;3 4; :8 ! % %) %! ! $ + φ & α β "(# "(# """ !") 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